Patch set updated for coreboot: b485f25 Remove the misleading 0x100 from the limit.

[Zheng Bao]

Zheng Bao ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1265

-gerrit

commit b485f25c251f66eac763e1d38f93f432f4380709
Author: zbao 
Date:   Mon Jul 23 19:52:58 2012 +0800

Remove the misleading 0x100 from the limit.

I dont known if missed something, but why an extra 0x100 was added to limit?
    My board would get the wrong memory table entry 7f000000-7fffffff as RAM, which
    is higher than TOM.
    coreboot memory table:
     0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
     1. 0000000000001000-000000000009ffff: RAM
     2. 00000000000c0000-000000005e13efff: RAM
     3. 000000005e13f000-000000005effffff: CONFIGURATION TABLES
     4. 000000005f000000-000000007effffff: RESERVED
     5. 000000007f000000-000000007fffffff: RAM
     6. 00000000a0000000-00000000afffffff: RESERVED

Change-Id: I3848ed5f23001e5bd61a19833650fe13df26eef3
    Signed-off-by: Zheng Bao 
    Signed-off-by: zbao 
---
 src/northbridge/amd/agesa/family15tn/northbridge.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/src/northbridge/amd/agesa/family15tn/northbridge.c b/src/northbridge/amd/agesa/family15tn/northbridge.c
index 12aab33..8ad7841 100644
--- a/src/northbridge/amd/agesa/family15tn/northbridge.c
+++ b/src/northbridge/amd/agesa/family15tn/northbridge.c
@@ -790,7 +790,7 @@ static void domain_set_resources(device_t dev)

if (!(d.mask & 1)) continue;
    	basek = ((resource_t)(d.base & 0x1fffff00)) << 9; // could overflow, we may lost 6 bit here
-		limitk = ((resource_t)((d.mask + 0x00000100) & 0x1fffff00)) << 9 ;
+		limitk = ((resource_t)(d.mask & 0x1fffff00)) << 9 ;

sizek = limitk - basek;