New patch to review for coreboot: e3dee5e PCI(E) slots on Persimmon

[Zheng Bao]

Zheng Bao ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1098

-gerrit

commit e3dee5ecf44af9fce33deb44d6e1fa6a671587a6
Author: zbao <[e-mail]>
Date:   Fri Jun 8 12:46:36 2012 +0800

    PCI(E) slots on Persimmon
    
    (routine.asl):Set the correct device number in the pcie interrupt routine in ACPI asl.
    (devicetree.cb): Enable the PCIE bridge which is connected to the PCIE slot.
    
    Change-Id: I1b3fb59990e06d7bc7cf19639f2b93dbb7bf9b3e
    Signed-off-by: Zheng Bao <[e-mail]>
    Signed-off-by: zbao <[e-mail]>
---
 src/mainboard/amd/persimmon/acpi/routing.asl |   24 ++++++++++++------------
 src/mainboard/amd/persimmon/devicetree.cb    |   10 +++++-----
 2 files changed, 17 insertions(+), 17 deletions(-)

diff --git a/src/mainboard/amd/persimmon/acpi/routing.asl b/src/mainboard/amd/persimmon/acpi/routing.asl
index d7e4687..24bc809 100644
--- a/src/mainboard/amd/persimmon/acpi/routing.asl
+++ b/src/mainboard/amd/persimmon/acpi/routing.asl
@@ -391,17 +391,17 @@ Scope(\_SB) {
 
 	Name(PCIB, Package(){
 		/* PCI slots: slot 0, slot 1, slot 2 behind Dev14, Fun4. */
-		Package(){0x0005FFFF, 0, 0, 0x14 },
-		Package(){0x0005FFFF, 1, 0, 0x15 },
-		Package(){0x0005FFFF, 2, 0, 0x16 },
-		Package(){0x0005FFFF, 3, 0, 0x17 },
-		Package(){0x0006FFFF, 0, 0, 0x15 },
-		Package(){0x0006FFFF, 1, 0, 0x16 },
-		Package(){0x0006FFFF, 2, 0, 0x17 },
-		Package(){0x0006FFFF, 3, 0, 0x14 },
-		Package(){0x0007FFFF, 0, 0, 0x16 },
-		Package(){0x0007FFFF, 1, 0, 0x17 },
-		Package(){0x0007FFFF, 2, 0, 0x14 },
-		Package(){0x0007FFFF, 3, 0, 0x15 },
+		Package(){0x0003FFFF, 0, 0, 0x14 },
+		Package(){0x0003FFFF, 1, 0, 0x15 },
+		Package(){0x0003FFFF, 2, 0, 0x16 },
+		Package(){0x0003FFFF, 3, 0, 0x17 },
+		Package(){0x0004FFFF, 0, 0, 0x15 },
+		Package(){0x0004FFFF, 1, 0, 0x16 },
+		Package(){0x0004FFFF, 2, 0, 0x17 },
+		Package(){0x0004FFFF, 3, 0, 0x14 },
+		Package(){0x0005FFFF, 0, 0, 0x16 },
+		Package(){0x0005FFFF, 1, 0, 0x17 },
+		Package(){0x0005FFFF, 2, 0, 0x14 },
+		Package(){0x0005FFFF, 3, 0, 0x15 },
 	})
 }
diff --git a/src/mainboard/amd/persimmon/devicetree.cb b/src/mainboard/amd/persimmon/devicetree.cb
index e5bbca2..d89b809 100644
--- a/src/mainboard/amd/persimmon/devicetree.cb
+++ b/src/mainboard/amd/persimmon/devicetree.cb
@@ -28,12 +28,12 @@ chip northbridge/amd/agesa/family14/root_complex
 #					device pci 18.0 on #  northbridge
 					chip northbridge/amd/agesa/family14 # PCI side of HT root complex
 						device pci 0.0 on end # Root Complex
-						device pci 1.0 on end # Internal Graphics P2P bridge 0x9804
+						device pci 1.0 on end # Internal Graphics P2P bridge 0x980[2456]
 						device pci 1.1 on end # Internal Multimedia
-						device pci 4.0 on end # PCIE P2P bridge 0x9604
-						device pci 5.0 off end # PCIE P2P bridge 0x9605
-						device pci 6.0 off end # PCIE P2P bridge 0x9606
-						device pci 7.0 off end # PCIE P2P bridge 0x9607
+						device pci 4.0 on end # PCIE P2P bridge on-board NIC
+						device pci 5.0 off end # PCIE P2P bridge
+						device pci 6.0 on end # PCIE P2P bridge PCI slot
+						device pci 7.0 off end # PCIE P2P bridge
 						device pci 8.0 off end # NB/SB Link P2P bridge
 					end # agesa northbridge

New patch to review for coreboot: e3dee5e PCI(E) slots on Persimmon

[Paul Menzel]

Dear Zheng,


Am Freitag, den 08.06.2012, 05:16 +0200 schrieb Zheng Bao:
> Zheng Bao ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1098
>
> -gerrit
>
> commit e3dee5ecf44af9fce33deb44d6e1fa6a671587a6
> Author: zbao <[e-mail]>

please correct the author name to your real name.

    git config user.name Zheng Bao

Also your other commits all use your AMD address.
> Date:   Fri Jun 8 12:46:36 2012 +0800
>
> PCI(E) slots on Persimmon

That is not a good summary because you do not write, what you are doing.
> (routine.asl):Set the correct device number in the pcie interrupt routine in ACPI asl.
>     (devicetree.cb): Enable the PCIE bridge which is connected to the PCIE slot.

I prefer three patches. Could you please split this patch up? That would
be awesome.

1. Persimmon: routine.asl: Set correct device number in PCIE interrupt routine
2. Persimmon: devicetree.cb: change IDs to names
3. Persimmon: devicetree.cb: enable the PCIE bridge (and refer to [1] as
this is the fix for this problem?)

If it is Andy’s Tested-bys would also be appreciated.
> Change-Id: I1b3fb59990e06d7bc7cf19639f2b93dbb7bf9b3e
>     Signed-off-by: Zheng Bao <[e-mail]>
>     Signed-off-by: zbao <[e-mail]>
> ---
>  src/mainboard/amd/persimmon/acpi/routing.asl |   24 ++++++++++++------------
>  src/mainboard/amd/persimmon/devicetree.cb    |   10 +++++-----
>  2 files changed, 17 insertions(+), 17 deletions(-)

[…]


Thanks,

Paul


[1] http://www.coreboot.org/pipermail/coreboot/2012-June/070199.html