On 27.09.2010 22:24, ron minnich wrote:
On Mon, Sep 27, 2010 at 12:09 PM, Nils
You proposed removing the OLPC prototype boards and Peter voted for keeping
I personally don`t care either way and the rest doesn`t want to express their
opinion so i would like to let you decide. :)
Could i ask you to delete the boards (i don`t have SVN access) or dig up the
boards and give me the DRAM types?
well, let me retry my explanation. I can give you the DRAM types. But
the timing for each type is incompatible. So we'd have to make three
boards or do conditional compilation and Kconfig options for the three
types. This is for a board nobody has.
So maybe I'm missing something, but I just can't see the point of
keeping these boards.
I have various OLPC prototypes including one A-Test board which was the
original coreboot target for OLPC, but information from my board won't
help you at all because the DRAM soldered on my board had a too slow CL
(slower than the slowest allowed setting of the memory controller) and
thus it was considered to be unstable (worked for me, but hey...).
IIRC the firmware of the OLPC XO was a time-limited test version of
Insyde BIOS, replaced with coreboot developed for free, then replaced
with OpenFirmware which was apparently paid for. It is extremely
unlikely that coreboot will ever make any inroads at OLPC, and the
boards we could possibly support are not available to the general public
in sizable numbers. If you're looking for GeodeLX-based boards, check
out the Artec ThinCan DBE61/DBE62 models and the PCEngines Alix models.
Both vendors are helpful, and Artec even sponsored coreboot development.
The new VIA-based OLPC design could be supported by coreboot. AFAICS the
chipset support is there, and wiring up the rest should be possible, but
it again is a problem of hardware availability.
Given that the support for old Geode-based OLPC XO prototypes seems to
be holding back coreboot development, I vote for removing them from svn
unless someone with sufficient motivation takes care of them.