Patch set updated for coreboot: d088d0d I945: replace #if defined() by #if

[Sven Schnelle]

Sven Schnelle ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/293

-gerrit

commit d088d0d4acbd8e3b0c6c410aed9ed5bde2018cd5
Author: Sven Schnelle 
Date:   Tue Oct 18 07:58:10 2011 +0200

I945: replace #if defined() by #if

config.h defines also unset config options (as "0") so #ifdef
    matches both settings, which isn't what we want.

Change-Id: I694e1b8a8ec4c20225d7af1a13a2a336f900e643
    Signed-off-by: Sven Schnelle 
---
 src/northbridge/intel/i945/early_init.c |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/northbridge/intel/i945/early_init.c b/src/northbridge/intel/i945/early_init.c
index 197c58f..14c66c4 100644
--- a/src/northbridge/intel/i945/early_init.c
+++ b/src/northbridge/intel/i945/early_init.c
@@ -91,7 +91,7 @@ static void i945m_detect_chipset(void)
    	printk(BIOS_INFO, "unknown max. RAM clock (%02x).", reg8);	/* Others reserved. */
    }
    printk(BIOS_DEBUG, "\n");
-#if defined(CONFIG_NORTHBRIDGE_INTEL_I945GC)
+#if CONFIG_NORTHBRIDGE_INTEL_I945GC
    printk(BIOS_ERR, "coreboot is compiled for the wrong chipset.\n");
 #endif
 }
@@ -140,7 +140,7 @@ static void i945_detect_chipset(void)
    	printk(BIOS_INFO, "unknown max. RAM clock (%02x).", reg8);	/* Others reserved. */
    }
    printk(BIOS_DEBUG, "\n");
-#if defined(CONFIG_NORTHBRIDGE_INTEL_I945GM)
+#if CONFIG_NORTHBRIDGE_INTEL_I945GM
    printk(BIOS_ERR, "coreboot is compiled for the wrong chipset.\n");
 #endif
 }