Doubt about SPD init in Skylake

[王翔]

The system must initialize some arrays before initializing the SPD in order to execute FspMemoryInit. 
I do not know what these arrays do,  and how do I get these values when porting new motherboard.

These codes exist on the SKYLAKE platform which using FSP2.0.  Call path : 
fsp_memory_init->do_fsp_memory_init->platform_fsp_memory_init_params_cb->mainboard_memory_init_params

array list :
    FSPM_UPD->FspmConfig->DqByteMapCh0
    FSPM_UPD->FspmConfig->DqByteMapCh1
    FSPM_UPD->FspmConfig->DqsMapCpu2DramCh0
    FSPM_UPD->FspmConfig->DqsMapCpu2DramCh1
    FSPM_UPD->FspmConfig->RcompResistor
    FSPM_UPD->FspmConfig->RcompTarget

If you can help me extremely grateful ! ! !

------------------

王翔

安全研究员

广州市腾御安信息科技有限公司

广州市天河区珠江新城华穗路406号保利克洛维二期中景A座1020-1024

[Zoran Stojsavljevic]

> The system must initialize some arrays before initializing
> the SPD in order to execute FspMemoryInit. I do not know
> what these arrays do, and how do I get these values when
> porting new motherboard.

It is, actually, vice versa (SPD is used for the IMC initialization).
Serial Presence Detect is a small flash, mounted on the DDR2/DDR3/DDR4
SIMM/DIMM modules, from where MRC algorithms read DDRx parameters, RAS
and CAS latencies, and configure IMC, as my best understanding is.

Please, refer to: https://en.wikipedia.org/wiki/Serial_presence_detect

This page also says: "Coreboot reads and uses SPD information to
initialize all memory controllers in a computer with timing, size and
other properties."

To find out yours SPD parameters, please, use the following tool for
WIN: https://www.cpuid.com/softwares/cpu-z.html

For Linux, please, use dmidecode Linux command.

Zoran

On Sat, Dec 30, 2017 at 8:56 AM, 王翔  wrote:
> The system must initialize some arrays before initializing the SPD in order
> to execute FspMemoryInit.
> I do not know what these arrays do,  and how do I get these values when
> porting new motherboard.
>
> These codes exist on the SKYLAKE platform which using FSP2.0.  Call path :
> fsp_memory_init->do_fsp_memory_init->platform_fsp_memory_init_params_cb->mainboard_memory_init_params
>
> array list :
>     FSPM_UPD->FspmConfig->DqByteMapCh0
>     FSPM_UPD->FspmConfig->DqByteMapCh1
>     FSPM_UPD->FspmConfig->DqsMapCpu2DramCh0
>     FSPM_UPD->FspmConfig->DqsMapCpu2DramCh1
>     FSPM_UPD->FspmConfig->RcompResistor
>     FSPM_UPD->FspmConfig->RcompTarget
>
> If you can help me extremely grateful ! ! !
>
> 王翔
>
> 安全研究员
>
> 广州市腾御安信息科技有限公司
>
> 广州市天河区珠江新城华穗路406号保利克洛维二期中景A座1020-1024

[Nico Huber]

Hi,

On 30.12.2017 08:56, 王翔 wrote:
> The system must initialize some arrays before initializing the SPD in
> order to execute FspMemoryInit.  I do not know what these arrays do,
> and how do I get these values when porting new motherboard.
>
> These codes exist on the SKYLAKE platform which using FSP2.0.  Call path
> :
> fsp_memory_init->do_fsp_memory_init->platform_fsp_memory_init_params_cb->mainboard_memory_init_params
>
> array list : FSPM_UPD->FspmConfig->DqByteMapCh0
> FSPM_UPD->FspmConfig->DqByteMapCh1
> FSPM_UPD->FspmConfig->DqsMapCpu2DramCh0
> FSPM_UPD->FspmConfig->DqsMapCpu2DramCh1
> FSPM_UPD->FspmConfig->RcompResistor FSPM_UPD->FspmConfig->RcompTarget

These have nothing to do with the SPD information for your memory chips.
These settings are about board specific routing (and calibration, I
guess). The former four are only needed for soldered-down LPDDR3 memory,
AIUI, so if you have DIMMs with SPD they don't apply for your board.

The `RcompResistor` settings are chipset dependent. IIRC, you can find
these in the respective Platform Design Guide for your chipset. The
`RcompTarget` I've never really figured out. I can only guess, that this
is a board specific calibration target. You should ask your Intel con-
tacts about it.

For further assistance we'd need to know your exact target chipset (SKU)
and what kind of memory (e.g. DDR3/DDR4, DIMMs or soldered down) you use
on your board.

Hope that helps,
Nico