Can someone explain the usage of chip & device keywords in the mainboard Config file?
Also can someone explain the invocation of __pci_driver ops like pci_dev_enable_resources?
How should these ( and pci_domain ) be structured, i.e. would one list each chip (with its pci devices) and a corresponding 'end' statement ? It appears we have northbridge as the highest level (chip) block with everything inside, including chips such as CPU. However, I get multiple initialization of my southbridge.
Also, how are these related to the chip_operations .enable_dev functions, and device_operations functions such as .init?
We have made much progress on the Via EPIA-SP but these are some of the lingering questions. Doug
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Doug Bell