[RFC] Successful build with GCC 7.2 and IASL 20170831 for coreboot 4.7

[Paul Menzel]

Dear coreboot folks,


I’d like to propose the following goal for the upcoming coreboot 4.7
release.

All boards have to build with GCC 7.2 [1] and IASL 20170831 [2].

For the latter, several Intel boards fail to build [3]. It’d be great
if the maintainers looked into it.


Thanks,

Paul


[1] https://review.coreboot.org/20809/
[2] https://review.coreboot.org/21156/
[3] https://ticket.coreboot.org/issues/138

[Paul Menzel]

Dear coreboot folks,


Am Mittwoch, den 20.09.2017, 08:17 +0200 schrieb Paul Menzel:
> I’d like to propose the following goal for the upcoming coreboot 4.7
> release.
>
> All boards have to build with GCC 7.2 [1] and IASL 20170831 [2].
>
> For the latter, several Intel boards fail to build [3]. It’d be great
> if the maintainers looked into it.

Unfortunately, there was no reply yet. Patrick already blocked the
change-set, and commented that it’ll only go in after the coreboot 4.7
release, which is fine. But the boards should still build in my
opinion.

The boards below are affected by the IASL update.

```
$ git grep TEVT
src/ec/google/chromeec/acpi/ec.asl:External (\_SB.DPTF.TEVT, MethodObj)
src/ec/google/chromeec/acpi/ec.asl:                     If (CondRefOf (\_SB.DPTF.TEVT)) {
src/ec/google/chromeec/acpi/ec.asl:                             \_SB.DPTF.TEVT (Local0)
src/mainboard/google/cyan/variants/terra/include/variant/acpi/thermal.asl:Method (TEVT, 1, NotSerialized)
src/soc/intel/baytrail/acpi/dptf/thermal.asl:Method (TEVT, 1, NotSerialized)
src/soc/intel/braswell/acpi/dptf/thermal.asl:Method (TEVT, 1, NotSerialized)
src/soc/intel/common/acpi/dptf/thermal.asl:Method (TEVT, 1, NotSerialized)
src/soc/intel/skylake/acpi/dptf/thermal.asl:Method (TEVT, 1, NotSerialized)
```

What is the process for this? Are the maintainers of the board that
fail to build subscribed on this mailing list?


Kind regards,

Paul
> [1] https://review.coreboot.org/20809/
> [2] https://review.coreboot.org/21156/
> [3] https://ticket.coreboot.org/issues/138

How to work with Chrome EC? (was: Successful build with GCC 7.2 and IASL 20170831 for coreboot 4.7)

[Paul Menzel]

Dear coreboot folks,


GCC 7.2 found several issues in the Chromium EC code base, like #770209
[4], and I prepared  patches, but unfortunately, I do not know how to
push them for review.

1. The instructions don’t work for me [5]. I can’t find the manifest
file, which seems to be required by the utility `repo`.

2. Also, in the preferences menu of the Google Chromium review system,
I cannot find a way to upload my SSH key.

3. Is there a mailing list for the Chromium Embedded Controller
development?


Thanks,

Paul


[4] https://bugs.chromium.org/p/chromium/issues/detail?id=770209
[5] https://dev.chromium.org/chromium-os/ec-development
[6] https://chromium-review.googlesource.com/admin/projects/chromiumos/platform/...

How to work with Chrome EC? (was: Successful build with GCC 7.2 and IASL 20170831 for coreboot 4.7)

[Vadim Bendebury]

Hi Paul,

I don't think there is an external mailing list for chromium OS EC
development.

To see the manifest which the repo utility requires you need to setup the
Chrome OS chroot environment first (aka cros SDK), I am not sure if you did
that, but this is a pretty expensive procedure, requiring a lot of disk
space and time.

You should be able to clone the EC git repository and run pre-upload checks
and push patches to the EC gerrit server, but you'd need an account on the
server for that.

To be honest with you, I don't know the exact procedure to follow to get
the account created, you could inquire at [e-mail]

the entry threshold is a big high, but I am sure the Chome OS EC team would
appreciate your contributions.

--vb




On Mon, Oct 2, 2017 at 12:04 AM, Paul Menzel <
[e-mail]> wrote:
> Dear coreboot folks,
>
> GCC 7.2 found several issues in the Chromium EC code base, like #770209
> [4], and I prepared  patches, but unfortunately, I do not know how to
> push them for review.
>
> 1. The instructions don’t work for me [5]. I can’t find the manifest
> file, which seems to be required by the utility `repo`.
>
> 2. Also, in the preferences menu of the Google Chromium review system,
> I cannot find a way to upload my SSH key.
>
> 3. Is there a mailing list for the Chromium Embedded Controller
> development?
>
> Thanks,
>
> Paul
>
> [4] https://bugs.chromium.org/p/chromium/issues/detail?id=770209
> [5] https://dev.chromium.org/chromium-os/ec-development
> [6] https://chromium-review.googlesource.com/admin/
> projects/chromiumos/platform/ec,access
> --
> coreboot mailing list: [e-mail]
> https://mail.coreboot.org/mailman/listinfo/coreboot

[Matt DeVillier]

hi Paul,

I took a look at this, and the error appears to be the result of a change
in IASL 20170531:

"Improved the behavior of the iASL compiler and disassembler to detect
improper use of external declarations"

According to the ACPI 6.2 spec, "The External directive informs the ASL
compiler that the object is declared external to this table.."  This reads
to me that if an object is declared External in one table (eg, the DSDT),
then its declaration must be in another table, not in the table in which
contains the External reference.  As _SB.DPTF.TEVT is declared in the DSDT
(in SoC .asl code), then the External declaration in the
chromeec/acpi/ec.asl is invalid.

To test this, I removed the External declaration in ec.asl, and the
previously failing boards now build properly with iASL 20170831.  I also
retested using the current iASL version (20161222), and the aforementioned
boards still build correctly.

If someone wants to corroborate my analysis, then I'm happy to submit a
patch to correct the issue

cheers,
Matt

On Mon, Oct 2, 2017 at 1:56 AM, Paul Menzel <
[e-mail]> wrote:
> Dear coreboot folks,
>
> Am Mittwoch, den 20.09.2017, 08:17 +0200 schrieb Paul Menzel:
> > I’d like to propose the following goal for the upcoming coreboot 4.7
> > release.
> >
> > All boards have to build with GCC 7.2 [1] and IASL 20170831 [2].
> >
> > For the latter, several Intel boards fail to build [3]. It’d be great
> > if the maintainers looked into it.
>
> Unfortunately, there was no reply yet. Patrick already blocked the
> change-set, and commented that it’ll only go in after the coreboot 4.7
> release, which is fine. But the boards should still build in my
> opinion.
>
> The boards below are affected by the IASL update.
>
> ```
> $ git grep TEVT
> src/ec/google/chromeec/acpi/ec.asl:External (\_SB.DPTF.TEVT, MethodObj)
> src/ec/google/chromeec/acpi/ec.asl:                     If (CondRefOf
> (\_SB.DPTF.TEVT)) {
> src/ec/google/chromeec/acpi/ec.asl:
>  \_SB.DPTF.TEVT (Local0)
> src/mainboard/google/cyan/variants/terra/include/variant/acpi/thermal.asl:Method
> (TEVT, 1, NotSerialized)
> src/soc/intel/baytrail/acpi/dptf/thermal.asl:Method (TEVT, 1,
> NotSerialized)
> src/soc/intel/braswell/acpi/dptf/thermal.asl:Method (TEVT, 1,
> NotSerialized)
> src/soc/intel/common/acpi/dptf/thermal.asl:Method (TEVT, 1, NotSerialized)
> src/soc/intel/skylake/acpi/dptf/thermal.asl:Method (TEVT, 1,
> NotSerialized)
> ```
>
> What is the process for this? Are the maintainers of the board that
> fail to build subscribed on this mailing list?
>
> Kind regards,
>
> Paul
> > [1] https://review.coreboot.org/20809/
> > [2] https://review.coreboot.org/21156/
> > [3] https://ticket.coreboot.org/issues/138

[Martin Roth]

I'd say that it doesn't make sense to require that coreboot builds
with anything other than the coreboot toolchain.
Additionally, It isn't reasonable to introduce a new requirement this
close to the release.

Martin

On Wed, Sep 20, 2017 at 12:17 AM, Paul Menzel
<[e-mail]> wrote:
> Dear coreboot folks,
>
> I’d like to propose the following goal for the upcoming coreboot 4.7
> release.
>
> All boards have to build with GCC 7.2 [1] and IASL 20170831 [2].
>
> For the latter, several Intel boards fail to build [3]. It’d be great
> if the maintainers looked into it.
>
> Thanks,
>
> Paul
>
> [1] https://review.coreboot.org/20809/
> [2] https://review.coreboot.org/21156/
> [3] https://ticket.coreboot.org/issues/138
> --
> coreboot mailing list: [e-mail]
> https://mail.coreboot.org/mailman/listinfo/coreboot