one thought just occured to me that might be useful.
We have a utility, called utk, that lets you script edits to UEFI
firmware volumes. I use it all the time to slice and dice and strip
these firmware volumes down. There are hundreds (500+) DXE in these
UEFI volumes that are not needed. I've removed in one case 214 out of
what you might do: use utk to remove lots of the DXEs until you get to
the bare minimum. Then, try to work from there to find out which DXE
is setting the parameters in sata. Then, from there, you might RE what
it does so you can figure out what coreboot needs to do.
The goal is not to shrink UEFI down, but to isolate the thing in UEFI
that adjusts tuning registers and figure out what it does, and get
that into coreboot.
On Mon, Oct 7, 2019 at 5:43 AM werner.zeh(a)siemens.com
> Hi Christian.
> In APL there are special tuning registers for the SATA lanes which may need an
> The fact that stock UEFI runs without issues may be explained that UEFI touches this
> Do you have access to related intel docs? Otherwise have a look at
line 71 and following for an example.
> You may need this, too if your HW design needs some help to run stable.
> -----Ursprüngliche Nachricht-----
> Von: Christian Gmeiner <christian.gmeiner(a)gmail.com>
> Gesendet: Montag, 30. September 2019 16:10
> An: coreboot <coreboot(a)coreboot.org>
> Betreff: [coreboot] Apollolake: SATA issues
> Hi all
> I have ported coreboot to a custom design based on APL and have random SATA problems
with CFast cards. I am using the latest public APL FSP from github with the latest
> From time to time the SATA link 'dies' during runtime or I it is not possible
to establish the SATA link at all (in the used u-boot payload). At the moment I am running
out of ideas and I hope someone can point me in the right direction.
> Btw. with the vendor blob SATA works with out any problems :/
> Christian Gmeiner, MSc
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