New patch to review for coreboot: 14a777d h8qgi: add enable_cache() to load fallback/coreboot_ram

[Siyuan Wang]

Siyuan Wang ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1600

-gerrit

commit 14a777d130b6a04a0391846554d03bfcf8972ced
Author: Siyuan Wang 
Date:   Mon Oct 22 16:35:07 2012 +0800

h8qgi: add enable_cache() to load fallback/coreboot_ram

h8qgi stop at 'loading stage fallback/coreboot_ram'.
    I add enable_cache() in src/mainboard/supermicro/h8qgi/romstage.c
    to resolve this issue.

Change-Id: I82c028abc650f0ac3061d110e10a47e6bb97e6d7
    Signed-off-by: Siyuan Wang 
    Signed-off-by: Siyuan Wang 
---
 src/mainboard/supermicro/h8qgi/romstage.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/src/mainboard/supermicro/h8qgi/romstage.c b/src/mainboard/supermicro/h8qgi/romstage.c
index d4354fd..d4eb039 100644
--- a/src/mainboard/supermicro/h8qgi/romstage.c
+++ b/src/mainboard/supermicro/h8qgi/romstage.c
@@ -33,6 +33,7 @@
 #include <sb_cimx.h>
 #include "superio/nuvoton/wpcm450/wpcm450.h"
 #include "superio/winbond/w83627dhg/w83627dhg.h"
+#include <cpu/x86/cache.h>

extern void disable_cache_as_ram(void); /* cache_as_ram.inc */

@@ -128,6 +129,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
    disable_cache_as_ram();
    print_debug("done\n");

+	enable_cache();
    post_code(0x51);
    copy_and_run(0);