On 26.04.2011, at 07:40, Den nis dnns187@gmail.com wrote:
Hi,
Im trying to "port" the iwave RainbowG6 coreboot code to a platform with the same CPU (Intel Atom Z530) and chipset (Intel US15W), 1GB RAM (2 ranks, 1024 Mbits device density, x16 device width) and a winbond WPCN381U superio chip.
Meanwhile the basic functionalities of Coreboot seems to works well. But when i jump to my payload everthing become quiet. I suspect that something went wrong with the tables. I have include the build process and the serial port output (debug level = SPEW).
I hope someone has a tip so I can go further.
Your log claims in ramstage you have 0mb memory. That's fishy.
Stefan
Many thanks in advance!
Dennis <console_process.txt>
<build_process.txt>
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