Hello Coreboot,

 

I work for a company that makes a board containing an Elkhart Lake CPU and we use Coreboot to boot it.

 

We have started from Intel's document #626123 source files and document #641906 for instructions. Release notes say „This is the main release of the coreboot Boot Loader Proof of Concept for the Elkhart Lake (EHL) series. Date: May 2021; revision: PR 1; description: PR 1 release“

We have already asked Intel for assistance, but they redirected us here.

 

The final Coreboot binary works, but we are having some issues that so far we were unable to solve on our own.

We are using latest Linux Mint x64 for most of our tests and soon we'll switch to Yocto.

 

1. There are roughly about 200 configurable pins on the CPU. We would like to use some as GPIOs. We can configure pin functionalities according to our needs in Coreboot source code (gpio.c, gpio_table[] definition), but Linux doesn't seem to know what to do with GPIO pins: in /sys/class/gpio we only see gpiochip445. To which of the EHL pins does 445 correspond? What should we do to see the rest of the pins? Some comments in the code suggest there can't be more than 32 pins per 'gpiochip'.
2. We have enabled CAN controllers in devicetree.cb:
                              device pci 18.1 on           end # Intel Programmable Services Engine CAN0
                              device pci 18.2 on           end # Intel Programmable Services Engine CAN1
   … but in Linux we don't see devices 0:18.1 and 0:18.2. What else should we do to enable CAN controllers?
3. How do we enable eSPI in Coreboot and how it should be accessible afterwards in Linux? We did:
                              device pci 1f.0 on           end # eSPI Interface
   Device 0:1f.0 is visible. How should we access this bus in Linux or declare a device in SSDT table on this bus?
4. We have a TPM chip SLB9670 connected to FSPI, CS2.
   device pci 1f.5 on           end # PCH SPI (flash & TPM)
   … and device 0:1f.5 is visible, but Linux kernel reports it couldn't find any TPM chip. What do we need to do to get it working?
   $ dmesg | grep -i tpm
   [    0.006614] ACPI: TPM2 0x0000000075AEF4B0 00004C (v04 COREv4 COREBOOT 00000000 CORE 20200717)
   [    0.006640] ACPI: Reserving TPM2 table memory at [mem 0x75aef4b0-0x75aef4fb]
   [    0.771703] ima: No TPM chip found, activating TPM-bypass!
5. We can't get audio to work.
   device pci 1f.3 on           end # cAVS/HDA
   … and device 0:1f.3 is visible. This is output from kernel:
   $ dmesg | grep -i hda
   [    5.559993] snd_hda_intel 0000:00:1f.3: DSP detected with PCI class/subclass/prog-if info 0x040100
   [    5.560003] snd_hda_intel 0000:00:1f.3: NHLT table not found
   [   66.698806] snd_hda_intel 0000:00:1f.3: couldn't bind with audio component
   [   66.731030] snd_hda_codec_hdmi hdaudioC0D2: No i915 binding for Intel HDMI/DP codec
   [   66.731465] snd_hda_intel 0000:00:1f.3: Cannot probe codecs, giving up
   We think Linux should see (up to) 3 audio devices: HDMI, DisplayPort and analog codec CS4207.

 

Thank you in advance for any advice.