Hi Mike,


Sorry, my last answer was very short.

As M2N-E has a RS232 port, I am using cutecom on another computer connected through RS232/serial/com port.

You could use a USB/RS232 too.


Best regards.

M



De : Mike Banon <mikebdp2@gmail.com>
Envoyé : mercredi 28 juin 2017 14:08
À : Martin A
Objet : Re: [coreboot] Asus M2N-E
 
Hi Martin,

I just was curious about how the coreboot debugging process looks like, my experience is too small in this field. Please tell, with what hardware tools you are using a cutecom software?
https://www.coreboot.org/EHCI_Debug_Port
^^^ sadly Ajays NET20DC is end-of-life and AMIDebug Rx is way too expensive (don't remember if it costs $500 or $5000, still a lot of money)
Please tell, are you using any of these devices? Or you made your own DIY dongle using this manual:
https://www.coreboot.org/DIY_EHCI_debug_dongle
What your coreboot debugging setup looks like, in addition to cutecom?

wish good luck to your projects
Best regards,
Mike Banon

On Mon, Jun 5, 2017 at 10:24 PM, Martin A <tintinsansmilou@hotmail.com> wrote:

Hi Mike,


I use Cutecom.

Why ?


Martin



De : Mike Banon <mikebdp2@gmail.com>
Envoyé : lundi 5 juin 2017 17:03
À : Martin A

Objet : Re: [coreboot] Asus M2N-E
 
Hi Martin! Please tell: what tools are you using to receive this coreboot booting log?

On Wed, May 24, 2017 at 12:14 AM, Martin A <tintinsansmilou@hotmail.com> wrote:

Ok Timothy,


Thanks a lot for your help, really appreciate.


I tried try with a dual core Athlon 64 X2 and the boot log is an exact copy of the Opteron's.

So it has something to do with the mainboard.


Hope Uwe Hermann see this.


Martin.



De : Timothy Pearson <tpearson@raptorengineering.com>
Envoyé : mardi 23 mai 2017 19:56
À : Martin A
Cc : coreboot@coreboot.org
Objet : Re: [coreboot] Asus M2N-E
 
-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA1

On 05/23/2017 03:37 AM, Martin A wrote:
>
>
> Sorry, here is the "not so perfect" boot log.
>
> Many weirds points, no ?
>
> Thank you very much
>
>
> Martin
>
>
> -----------------------------------------------------------------------------------------------------------------------------------------------
>
> BSP overran lower stack boundary.  Undefined behaviour may result!

<snip>

This is probably the issue right here.  This means a coreboot developer
(preferably with access to this hardware) needs to take a look at the
stack allocation for the 0xf Opteron chips to see why coreboot is
overrunning the stack space.

- --
Timothy Pearson
Raptor Engineering
+1 (415) 727-8645 (direct line)
+1 (512) 690-0200 (switchboard)
https://www.raptorengineering.com
Let Raptor Engineering handle your next high-performance digital design! We offer consulting services in: Embedded systems design; Boot firmware development (e.g ...

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