Hi Nico,
The change you pointed do the trick!
How can I submit a little patch to Coreboot in order to add this change?
--- a/src/northbridge/amd/pi/00660F01/northbridge.c 2018-05-10 09:39:18.647612837 +0200
+++ b/src/northbridge/amd/pi/00660F01/northbridge.c 2018-07-03 07:56:12.794972857 +0200
@@ -796,12 +796,21 @@
}
}
+static const char *domain_acpi_name(const struct device *dev)
+{
+ if (dev->path.type == DEVICE_PATH_DOMAIN)
+ return "PCI0";
+
+ return NULL;
+}
+
static struct device_operations pci_domain_ops = {
.read_resources = domain_read_resources,
.set_resources = domain_set_resources,
.enable_resources = domain_enable_resources,
.init = NULL,
.scan_bus = pci_domain_scan_bus,
+ .acpi_name = domain_acpi_name,
};
static void sysconf_init(device_t dev) // first node