coreboot-4.0-4402-g0744d1e tor jul 4 22:44:38 CEST 2013 starting... BSP Family_Model: 00600f12 cpu_init_detectedx = 00000000 agesawrapper_amdinitreset passed. rs780_early_setup() rs780_por_init agesawrapper_amdinitearly coreboot-4.0-4402-g0744d1e tor jul 4 22:44:38 CEST 2013 starting... BSP Family_Model: 00600f12 cpu_init_detectedx = 00000001 agesawrapper_amdinitreset passed. rs780_early_setup() rs780_por_init agesawrapper_amdinitearly coreboot-4.0-4402-g0744d1e tor jul 4 22:44:38 CEST 2013 starting... BSP Family_Model: 00600f12 cpu_init_detectedx = 00000002 agesawrapper_amdinitreset passed. rs780_early_setup() rs780_por_init agesawrapper_amdinitearly coreboot-4.0-4402-g0744d1e tor jul 4 22:44:38 CEST 2013 starting... BSP Family_Model: 00600f12 cpu_init_detectedx = 00000003 agesawrapper_amdinitreset passed. rs780_early_setup() rs780_por_init agesawrapper_amdinitearly coreboot-4.0-4402-g0744d1e tor jul 4 22:44:38 CEST 2013 starting... BSP Family_Model: 00600f12 cpu_init_detectedx = 00000004 agesawrapper_amdinitreset passed. rs780_early_setup() rs780_por_init agesawrapper_amdinitearly coreboot-4.0-4402-g0744d1e tor jul 4 22:44:38 CEST 2013 starting... BSP Family_Model: 00600f12 cpu_init_detectedx = 00000005 agesawrapper_amdinitreset passed. rs780_early_setup() rs780_por_init agesawrapper_amdinitearly coreboot-4.0-4402-g0744d1e tor jul 4 22:44:38 CEST 2013 starting... BSP Family_Model: 00600f12 cpu_init_detectedx = 00000006 agesawrapper_amdinitreset passed. rs780_early_setup() rs780_por_init agesawrapper_amdinitearly coreboot-4.0-4402-g0744d1e tor jul 4 22:44:38 CEST 2013 starting... BSP Family_Model: 00600f12 cpu_init_detectedx = 00000007 agesawrapper_amdinitreset passed. rs780_early_setup() rs780_por_init agesawrapper_amdinitearly BSP Frequency: 3100MHz passed. rs780_htinit cpu_ht_freq=c. rs780_htinit: HT3 mode ...WARM RESET... coreboot-4.0-4402-g0744d1e tor jul 4 22:44:38 CEST 2013 starting... BSP Family_Model: 00600f12 cpu_init_detectedx = 00000000 agesawrapper_amdinitreset passed. rs780_early_setup() rs780_por_init agesawrapper_amdinitearly coreboot-4.0-4402-g0744d1e tor jul 4 22:44:38 CEST 2013 starting... BSP Family_Model: 00600f12 cpu_init_detectedx = 00000001 agesawrapper_amdinitreset passed. rs780_early_setup() rs780_por_init agesawrapper_amdinitearly coreboot-4.0-4402-g0744d1e tor jul 4 22:44:38 CEST 2013 starting... BSP Family_Model: 00600f12 cpu_init_detectedx = 00000002 agesawrapper_amdinitreset passed. rs780_early_setup() rs780_por_init agesawrapper_amdinitearly coreboot-4.0-4402-g0744d1e tor jul 4 22:44:38 CEST 2013 starting... BSP Family_Model: 00600f12 cpu_init_detectedx = 00000003 agesawrapper_amdinitreset passed. rs780_early_setup() rs780_por_init agesawrapper_amdinitearly coreboot-4.0-4402-g0744d1e tor jul 4 22:44:38 CEST 2013 starting... BSP Family_Model: 00600f12 cpu_init_detectedx = 00000004 agesawrapper_amdinitreset passed. rs780_early_setup() rs780_por_init agesawrapper_amdinitearly coreboot-4.0-4402-g0744d1e tor jul 4 22:44:38 CEST 2013 starting... BSP Family_Model: 00600f12 cpu_init_detectedx = 00000005 agesawrapper_amdinitreset passed. rs780_early_setup() rs780_por_init agesawrapper_amdinitearly coreboot-4.0-4402-g0744d1e tor jul 4 22:44:38 CEST 2013 starting... BSP Family_Model: 00600f12 cpu_init_detectedx = 00000006 agesawrapper_amdinitreset passed. rs780_early_setup() rs780_por_init agesawrapper_amdinitearly coreboot-4.0-4402-g0744d1e tor jul 4 22:44:38 CEST 2013 starting... BSP Family_Model: 00600f12 cpu_init_detectedx = 00000007 agesawrapper_amdinitreset passed. rs780_early_setup() rs780_por_init agesawrapper_amdinitearly BSP Frequency: 3100MHz passed. rs780_htinit cpu_ht_freq=c. rs780_htinit: HT3 mode agesawrapper_amdinitpost BSP Frequency: 3100MHz passed. agesawrapper_amdinitenv passed. Disabling cache as ram done Loading image. CBFS: loading stage fallback/coreboot_ram @ 0x200000 (1605688 bytes), entry @ 0x200000 Jumping to image. coreboot-4.0-4402-g0744d1e tor jul 4 22:44:38 CEST 2013 booting... BS: BS_PRE_DEVICE times (us): entry 0 run 0 exit 0 BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 0 exit 0 Enumerating buses... Show all devs...Before device enumeration. Root Device: enabled 1 CPU_CLUSTER: 0: enabled 1 APIC: 10: enabled 1 DOMAIN: 0000: enabled 1 PCI: 00:18.0: enabled 1 PCI: 00:00.0: enabled 1 PCI: 00:01.0: enabled 1 PCI: 00:02.0: enabled 1 PCI: 00:03.0: enabled 0 PCI: 00:04.0: enabled 1 PCI: 00:05.0: enabled 0 PCI: 00:06.0: enabled 0 PCI: 00:07.0: enabled 0 PCI: 00:08.0: enabled 0 PCI: 00:09.0: enabled 1 PCI: 00:0a.0: enabled 1 PCI: 00:11.0: enabled 1 PCI: 00:12.0: enabled 1 PCI: 00:12.2: enabled 1 PCI: 00:13.0: enabled 1 PCI: 00:13.2: enabled 1 PCI: 00:14.0: enabled 1 I2C: 00:50: enabled 1 I2C: 00:51: enabled 1 I2C: 00:52: enabled 1 I2C: 00:53: enabled 1 PCI: 00:14.1: enabled 1 PCI: 00:14.2: enabled 1 PCI: 00:14.3: enabled 1 PNP: 002e.0: enabled 0 PNP: 002e.1: enabled 0 PNP: 002e.2: enabled 1 PNP: 002e.3: enabled 1 PNP: 002e.5: enabled 1 PNP: 002e.6: enabled 0 PNP: 002e.7: enabled 0 PNP: 002e.8: enabled 0 PNP: 002e.9: enabled 0 PNP: 002e.a: enabled 1 PNP: 002e.b: enabled 1 PCI: 00:14.4: enabled 0 PCI: 00:14.5: enabled 1 PCI: 00:14.6: enabled 0 PCI: 00:15.0: enabled 1 PCI: 00:15.1: enabled 1 PCI: 00:15.2: enabled 1 PCI: 00:15.3: enabled 1 PCI: 00:16.0: enabled 1 PCI: 00:16.2: enabled 1 PCI: 00:18.1: enabled 1 PCI: 00:18.2: enabled 1 PCI: 00:18.3: enabled 1 PCI: 00:18.4: enabled 1 PCI: 00:18.5: enabled 1 Compare with tree... Root Device: enabled 1 CPU_CLUSTER: 0: enabled 1 APIC: 10: enabled 1 DOMAIN: 0000: enabled 1 PCI: 00:18.0: enabled 1 PCI: 00:00.0: enabled 1 PCI: 00:01.0: enabled 1 PCI: 00:02.0: enabled 1 PCI: 00:03.0: enabled 0 PCI: 00:04.0: enabled 1 PCI: 00:05.0: enabled 0 PCI: 00:06.0: enabled 0 PCI: 00:07.0: enabled 0 PCI: 00:08.0: enabled 0 PCI: 00:09.0: enabled 1 PCI: 00:0a.0: enabled 1 PCI: 00:11.0: enabled 1 PCI: 00:12.0: enabled 1 PCI: 00:12.2: enabled 1 PCI: 00:13.0: enabled 1 PCI: 00:13.2: enabled 1 PCI: 00:14.0: enabled 1 I2C: 00:50: enabled 1 I2C: 00:51: enabled 1 I2C: 00:52: enabled 1 I2C: 00:53: enabled 1 PCI: 00:14.1: enabled 1 PCI: 00:14.2: enabled 1 PCI: 00:14.3: enabled 1 PNP: 002e.0: enabled 0 PNP: 002e.1: enabled 0 PNP: 002e.2: enabled 1 PNP: 002e.3: enabled 1 PNP: 002e.5: enabled 1 PNP: 002e.6: enabled 0 PNP: 002e.7: enabled 0 PNP: 002e.8: enabled 0 PNP: 002e.9: enabled 0 PNP: 002e.a: enabled 1 PNP: 002e.b: enabled 1 PCI: 00:14.4: enabled 0 PCI: 00:14.5: enabled 1 PCI: 00:14.6: enabled 0 PCI: 00:15.0: enabled 1 PCI: 00:15.1: enabled 1 PCI: 00:15.2: enabled 1 PCI: 00:15.3: enabled 1 PCI: 00:16.0: enabled 1 PCI: 00:16.2: enabled 1 PCI: 00:18.1: enabled 1 PCI: 00:18.2: enabled 1 PCI: 00:18.3: enabled 1 PCI: 00:18.4: enabled 1 PCI: 00:18.5: enabled 1 Mainboard ASUS M5A88-V Enable. dev=0x002b4604 scan_static_bus for Root Device setup_bsp_ramtop, TOP MEM: msr.lo = 0xe0000000, msr.hi = 0x00000000 setup_bsp_ramtop, TOP MEM2: msr.lo = 0x1f000000, msr.hi = 0x00000004 setup_uma_memory: uma size 0x20000000, memory start 0xc0000000 CPU_CLUSTER: 0 enabled DOMAIN: 0000 enabled CPU_CLUSTER: 0 scanning... PCI: 00:18.5 family15h, core_max=0x10, core_nums=0xf, siblings=0x7 lpaicid_start=0x10 node 0x0 core 0x0 apicid=0x10 CPU: APIC: 10 enabled lpaicid_start=0x10 node 0x0 core 0x1 apicid=0x11 CPU: APIC: 11 enabled lpaicid_start=0x10 node 0x0 core 0x2 apicid=0x12 CPU: APIC: 12 enabled lpaicid_start=0x10 node 0x0 core 0x3 apicid=0x13 CPU: APIC: 13 enabled lpaicid_start=0x10 node 0x0 core 0x4 apicid=0x14 CPU: APIC: 14 enabled lpaicid_start=0x10 node 0x0 core 0x5 apicid=0x15 CPU: APIC: 15 enabled lpaicid_start=0x10 node 0x0 core 0x6 apicid=0x16 CPU: APIC: 16 enabled lpaicid_start=0x10 node 0x0 core 0x7 apicid=0x17 CPU: APIC: 17 enabled DOMAIN: 0000 scanning... PCI: pci_scan_bus for bus 00 PCI: 00:18.0 [1022/1600] bus ops PCI: 00:18.0 [1022/1600] enabled PCI: 00:18.1 [1022/1601] enabled PCI: 00:18.2 [1022/1602] enabled PCI: 00:18.3 [1022/1603] enabled PCI: 00:18.4 [1022/1604] enabled PCI: 00:18.5 [1022/1605] enabled PCI: pci_scan_bus for bus 00 rs780_enable: dev=002b4ed0, VID_DID=0x96011022 Bus-0, Dev-0, Fun-0. enable_pcie_bar3() gpp_sb_init nb_dev=0x0, dev=0x40, port=0x8 NB_PCI_REG04 = 6. NB_PCI_REG84 = 3000095. NB_PCI_REG4C = 52042. PCI: 00:00.0 [1022/9601] enabled rs780_enable: dev=002b5390, VID_DID=0x96021022 Bus-0, Dev-1, Fun-0. GC is accessible from now on. Capability: type 0x08 @ 0x44 Capability: type 0x0d @ 0xb0 Capability: type 0x08 @ 0x44 Capability: type 0x08 @ 0x44 Capability: type 0x0d @ 0xb0 Capability: type 0x08 @ 0x44 Capability: type 0x0d @ 0xb0 PCI: 00:01.0 [1022/9602] enabled rs780_enable: dev=002b5720, VID_DID=0x96031022 Bus-0, Dev-2,3, Fun-0. enable=1 rs780_gfx_init, nb_dev=0x002b4ed0, dev=0x002b5720, port=0x2. misc 28 = 0 rs780_gfx_init step5.9.12.1. rs780_gfx_init step5.9.12.3. rs780_gfx_init step5.9.12.9. rs780_gfx_init step1. device = 2 rs780_gfx_init single_port_configuration. PcieLinkTraining port=2:lc current state=2030400 rs780_gfx_init single_port_configuration step12. rs780_gfx_init single_port_configuration step13. rs780_gfx_init single_port_configuration step14. PCI: Static device PCI: 00:02.0 not found, disabling it. rs780_enable: dev=002b5a18, VID_DID=0xffffffff Bus-0, Dev-2,3, Fun-0. enable=0 rs780_enable: dev=002b5c78, VID_DID=0xffffffff Bus-0, Dev-4,5,6,7, Fun-0. enable=1 gpp_sb_init nb_dev=0x0, dev=0x20, port=0x4 PcieLinkTraining port=4:lc current state=10203 PcieTrainPort port=0x4 result=0 PCI: Static device PCI: 00:04.0 not found, disabling it. rs780_enable: dev=002b5e40, VID_DID=0xffffffff Bus-0, Dev-4,5,6,7, Fun-0. enable=0 rs780_enable: dev=002b6008, VID_DID=0xffffffff Bus-0, Dev-4,5,6,7, Fun-0. enable=0 rs780_enable: dev=002b61d0, VID_DID=0xffffffff Bus-0, Dev-4,5,6,7, Fun-0. enable=0 rs780_enable: dev=002b6398, VID_DID=0x960a1022 Bus-0, Dev-8, Fun-0. enable=0 rs780_enable: dev=002b6560, VID_DID=0x96081022 Bus-0, Dev-9, 10, Fun-0. enable=1 gpp_sb_init nb_dev=0x0, dev=0x48, port=0x9 PcieLinkTraining port=9:lc current state=a0b0f10 addr=e0000000,bus=0,devfn=48 PcieTrainPort reg=0x10000 PcieTrainPort port=0x9 result=1 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 Capability: type 0x05 @ 0xa0 Capability: type 0x0d @ 0xb0 Capability: type 0x08 @ 0xb8 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 Capability: type 0x05 @ 0xa0 Capability: type 0x0d @ 0xb0 Capability: type 0x08 @ 0xb8 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 Capability: type 0x05 @ 0xa0 Capability: type 0x0d @ 0xb0 Capability: type 0x08 @ 0xb8 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 PCI: 00:09.0 subordinate bus PCI Express PCI: 00:09.0 [1022/9608] enabled rs780_enable: dev=002b6690, VID_DID=0x96091022 Bus-0, Dev-9, 10, Fun-0. enable=1 gpp_sb_init nb_dev=0x0, dev=0x50, port=0xa PcieLinkTraining port=a:lc current state=a0b0f10 addr=e0000000,bus=0,devfn=50 PcieTrainPort reg=0x10000 PcieTrainPort port=0xa result=1 disable_pcie_bar3() rs780 unused GPP ports bitmap=0x0fc, force disabled Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 Capability: type 0x05 @ 0xa0 Capability: type 0x0d @ 0xb0 Capability: type 0x08 @ 0xb8 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 Capability: type 0x05 @ 0xa0 Capability: type 0x0d @ 0xb0 Capability: type 0x08 @ 0xb8 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 Capability: type 0x05 @ 0xa0 Capability: type 0x0d @ 0xb0 Capability: type 0x08 @ 0xb8 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 PCI: 00:0a.0 subordinate bus PCI Express PCI: 00:0a.0 [1022/9609] enabled sb800_enable() SB800 - Smbus.c - alink_ab_indx - Start. SB800 - Smbus.c - alink_ab_indx - End. PCI: 00:11.0 [1002/4393] ops PCI: 00:11.0 [1002/4393] enabled sb800_enable() PCI: 00:12.0 [1002/4397] ops PCI: 00:12.0 [1002/4397] enabled sb800_enable() PCI: 00:12.2 [1002/4396] ops PCI: 00:12.2 [1002/4396] enabled sb800_enable() PCI: 00:13.0 [1002/4397] ops PCI: 00:13.0 [1002/4397] enabled sb800_enable() PCI: 00:13.2 [1002/4396] ops PCI: 00:13.2 [1002/4396] enabled sb800_enable() sm_init(). IOAPIC: Clearing IOAPIC at 0xfec00000 IOAPIC: 24 interrupts IOAPIC: reg 0x00000000 value 0x00000000 0x00010000 IOAPIC: reg 0x00000001 value 0x00000000 0x00010000 IOAPIC: reg 0x00000002 value 0x00000000 0x00010000 IOAPIC: reg 0x00000003 value 0x00000000 0x00010000 IOAPIC: reg 0x00000004 value 0x00000000 0x00010000 IOAPIC: reg 0x00000005 value 0x00000000 0x00010000 IOAPIC: reg 0x00000006 value 0x00000000 0x00010000 IOAPIC: reg 0x00000007 value 0x00000000 0x00010000 IOAPIC: reg 0x00000008 value 0x00000000 0x00010000 IOAPIC: reg 0x00000009 value 0x00000000 0x00010000 IOAPIC: reg 0x0000000a value 0x00000000 0x00010000 IOAPIC: reg 0x0000000b value 0x00000000 0x00010000 IOAPIC: reg 0x0000000c value 0x00000000 0x00010000 IOAPIC: reg 0x0000000d value 0x00000000 0x00010000 IOAPIC: reg 0x0000000e value 0x00000000 0x00010000 IOAPIC: reg 0x0000000f value 0x00000000 0x00010000 IOAPIC: reg 0x00000010 value 0x00000000 0x00010000 IOAPIC: reg 0x00000011 value 0x00000000 0x00010000 IOAPIC: reg 0x00000012 value 0x00000000 0x00010000 IOAPIC: reg 0x00000013 value 0x00000000 0x00010000 IOAPIC: reg 0x00000014 value 0x00000000 0x00010000 IOAPIC: reg 0x00000015 value 0x00000000 0x00010000 IOAPIC: reg 0x00000016 value 0x00000000 0x00010000 IOAPIC: reg 0x00000017 value 0x00000000 0x00010000 IOAPIC: Initializing IOAPIC at 0xfec00000 IOAPIC: Bootstrap Processor Local APIC = 0x10 IOAPIC: ID = 0x08 IOAPIC: Dumping registers reg 0x0000: 0x08000000 reg 0x0001: 0x00178021 reg 0x0002: 0x08000000 IOAPIC: 24 interrupts IOAPIC: Enabling interrupts on FSB IOAPIC: reg 0x00000000 value 0x10000000 0x00000700 IOAPIC: reg 0x00000001 value 0x00000000 0x00010000 IOAPIC: reg 0x00000002 value 0x00000000 0x00010000 IOAPIC: reg 0x00000003 value 0x00000000 0x00010000 IOAPIC: reg 0x00000004 value 0x00000000 0x00010000 IOAPIC: reg 0x00000005 value 0x00000000 0x00010000 IOAPIC: reg 0x00000006 value 0x00000000 0x00010000 IOAPIC: reg 0x00000007 value 0x00000000 0x00010000 IOAPIC: reg 0x00000008 value 0x00000000 0x00010000 IOAPIC: reg 0x00000009 value 0x00000000 0x00010000 IOAPIC: reg 0x0000000a value 0x00000000 0x00010000 IOAPIC: reg 0x0000000b value 0x00000000 0x00010000 IOAPIC: reg 0x0000000c value 0x00000000 0x00010000 IOAPIC: reg 0x0000000d value 0x00000000 0x00010000 IOAPIC: reg 0x0000000e value 0x00000000 0x00010000 IOAPIC: reg 0x0000000f value 0x00000000 0x00010000 IOAPIC: reg 0x00000010 value 0x00000000 0x00010000 IOAPIC: reg 0x00000011 value 0x00000000 0x00010000 IOAPIC: reg 0x00000012 value 0x00000000 0x00010000 IOAPIC: reg 0x00000013 value 0x00000000 0x00010000 IOAPIC: reg 0x00000014 value 0x00000000 0x00010000 IOAPIC: reg 0x00000015 value 0x00000000 0x00010000 IOAPIC: reg 0x00000016 value 0x00000000 0x00010000 IOAPIC: reg 0x00000017 value 0x00000000 0x00010000 PCI: 00:14.0 [1002/4385] enabled sb800_enable() PCI: Static device PCI: 00:14.1 not found, disabling it. sb800_enable() hda enabled PCI: 00:14.2 [1002/4383] ops PCI: 00:14.2 [1002/4383] enabled sb800_enable() PCI: 00:14.3 [1002/439d] bus ops PCI: 00:14.3 [1002/439d] enabled sb800_enable() PCI: 00:14.4 [1002/4384] bus ops PCI: 00:14.4 [1002/4384] disabled sb800_enable() PCI: 00:14.5 [1002/4399] ops PCI: 00:14.5 [1002/4399] enabled sb800_enable() gec disabled sb800_enable() Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 Capability: type 0x0d @ 0xb0 Capability: type 0x08 @ 0xb8 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 Capability: type 0x0d @ 0xb0 Capability: type 0x08 @ 0xb8 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 Capability: type 0x0d @ 0xb0 Capability: type 0x08 @ 0xb8 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 PCI: 00:15.0 subordinate bus PCI Express PCI: 00:15.0 [1002/43a0] enabled sb800_enable() Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 Capability: type 0x0d @ 0xb0 Capability: type 0x08 @ 0xb8 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 Capability: type 0x0d @ 0xb0 Capability: type 0x08 @ 0xb8 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 Capability: type 0x0d @ 0xb0 Capability: type 0x08 @ 0xb8 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 PCI: 00:15.1 subordinate bus PCI Express PCI: 00:15.1 [1002/43a1] enabled sb800_enable() Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 Capability: type 0x0d @ 0xb0 Capability: type 0x08 @ 0xb8 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 Capability: type 0x0d @ 0xb0 Capability: type 0x08 @ 0xb8 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 Capability: type 0x0d @ 0xb0 Capability: type 0x08 @ 0xb8 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 PCI: 00:15.2 subordinate bus PCI Express PCI: 00:15.2 [1002/43a2] enabled sb800_enable() Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 Capability: type 0x0d @ 0xb0 Capability: type 0x08 @ 0xb8 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 Capability: type 0x0d @ 0xb0 Capability: type 0x08 @ 0xb8 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 Capability: type 0x0d @ 0xb0 Capability: type 0x08 @ 0xb8 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 PCI: 00:15.3 subordinate bus PCI Express PCI: 00:15.3 [1002/43a3] enabled sb800_enable() PCI: 00:16.0 [1002/4397] ops PCI: 00:16.0 [1002/4397] enabled sb800_enable() PCI: 00:16.2 [1002/4396] ops PCI: 00:16.2 [1002/4396] enabled do_pci_scan_bridge for PCI: 00:01.0 PCI: pci_scan_bus for bus 01 PCI: 01:05.0 [1002/9715] enabled PCI: 01:05.1 [1002/970f] enabled PCI: pci_scan_bus returning with max=001 do_pci_scan_bridge returns max 1 do_pci_scan_bridge for PCI: 00:09.0 PCI: pci_scan_bus for bus 02 PCI: 02:00.0 [1106/3403] enabled PCI: 02:00.1 [1106/0415] enabled PCI: pci_scan_bus returning with max=002 Capability: type 0x01 @ 0x50 Capability: type 0x05 @ 0x80 Capability: type 0x10 @ 0x98 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 Capability: type 0x01 @ 0x50 Capability: type 0x05 @ 0x70 Capability: type 0x10 @ 0x90 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 do_pci_scan_bridge returns max 2 do_pci_scan_bridge for PCI: 00:0a.0 PCI: pci_scan_bus for bus 03 PCI: 03:00.0 [1b21/1042] enabled PCI: pci_scan_bus returning with max=003 Capability: type 0x05 @ 0x50 Capability: type 0x11 @ 0x68 Capability: type 0x01 @ 0x78 Capability: type 0x10 @ 0x80 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 do_pci_scan_bridge returns max 3 scan_static_bus for PCI: 00:14.3 PNP: 002e.0 disabled PNP: 002e.1 disabled PNP: 002e.2 enabled PNP: 002e.3 enabled PNP: 002e.5 enabled PNP: 002e.6 disabled PNP: 002e.7 disabled PNP: 002e.8 disabled PNP: 002e.9 disabled PNP: 002e.a enabled PNP: 002e.b enabled scan_static_bus for PCI: 00:14.3 done do_pci_scan_bridge for PCI: 00:15.0 PCI: pci_scan_bus for bus 04 PCI: pci_scan_bus returning with max=004 do_pci_scan_bridge returns max 4 do_pci_scan_bridge for PCI: 00:15.1 PCI: pci_scan_bus for bus 05 PCI: 05:00.0 [10ec/8168] enabled PCI: pci_scan_bus returning with max=005 Capability: type 0x01 @ 0x40 Capability: type 0x05 @ 0x50 Capability: type 0x10 @ 0x70 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 do_pci_scan_bridge returns max 5 do_pci_scan_bridge for PCI: 00:15.2 PCI: pci_scan_bus for bus 06 PCI: pci_scan_bus returning with max=006 do_pci_scan_bridge returns max 6 do_pci_scan_bridge for PCI: 00:15.3 PCI: pci_scan_bus for bus 07 PCI: pci_scan_bus returning with max=007 do_pci_scan_bridge returns max 7 PCI: pci_scan_bus returning with max=007 PCI: pci_scan_bus returning with max=007 scan_static_bus for Root Device done done BS: BS_DEV_ENUMERATE times (us): entry 0 run 1703365 exit 0 found VGA at PCI: 01:05.0 Setting up VGA for PCI: 01:05.0 Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:01.0 Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:18.0 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device Allocating resources... Reading resources... Root Device read_resources bus 0 link: 0 CPU_CLUSTER: 0 read_resources bus 0 link: 0 APIC: 10 missing read_resources APIC: 11 missing read_resources APIC: 12 missing read_resources APIC: 13 missing read_resources APIC: 14 missing read_resources APIC: 15 missing read_resources APIC: 16 missing read_resources APIC: 17 missing read_resources CPU_CLUSTER: 0 read_resources bus 0 link: 0 done fx_devs=0x1 DOMAIN: 0000 read_resources bus 0 link: 0 PCI: 00:18.0 read_resources bus 0 link: 0 PCI: 00:00.0 register 1c(00000004), read-only ignoring it PCI: 00:01.0 read_resources bus 1 link: 0 PCI: 00:01.0 read_resources bus 1 link: 0 done PCI: 00:09.0 read_resources bus 2 link: 0 PCI: 00:09.0 read_resources bus 2 link: 0 done PCI: 00:0a.0 read_resources bus 3 link: 0 PCI: 00:0a.0 read_resources bus 3 link: 0 done PCI: 00:14.0 read_resources bus 0 link: 0 I2C: 00:50 missing read_resources I2C: 00:51 missing read_resources I2C: 00:52 missing read_resources I2C: 00:53 missing read_resources PCI: 00:14.0 read_resources bus 0 link: 0 done SB800 - Lpc.c - lpc_read_resources - Start. SB800 - Lpc.c - lpc_read_resources - End. PCI: 00:14.3 read_resources bus 0 link: 0 PNP: 002e.3 missing read_resources PNP: 002e.a missing read_resources PNP: 002e.b missing read_resources PCI: 00:14.3 read_resources bus 0 link: 0 done PCI: 00:15.0 read_resources bus 4 link: 0 PCI: 00:15.0 read_resources bus 4 link: 0 done PCI: 00:15.1 read_resources bus 5 link: 0 PCI: 00:15.1 read_resources bus 5 link: 0 done PCI: 00:15.2 register 10(ffffffff), read-only ignoring it PCI: 00:15.2 register 14(ffffffff), read-only ignoring it PCI: 00:15.2 register 38(ffffffff), read-only ignoring it PCI: 00:15.2 read_resources bus 6 link: 0 PCI: 00:15.2 read_resources bus 6 link: 0 done PCI: 00:15.3 register 10(ffffffff), read-only ignoring it PCI: 00:15.3 register 14(ffffffff), read-only ignoring it PCI: 00:15.3 register 38(ffffffff), read-only ignoring it PCI: 00:15.3 read_resources bus 7 link: 0 PCI: 00:15.3 read_resources bus 7 link: 0 done PCI: 00:18.0 read_resources bus 0 link: 0 done PCI: 00:18.0 read_resources bus 0 link: 1 PCI: 00:18.0 read_resources bus 0 link: 1 done PCI: 00:18.0 read_resources bus 0 link: 2 PCI: 00:18.0 read_resources bus 0 link: 2 done PCI: 00:18.0 read_resources bus 0 link: 3 PCI: 00:18.0 read_resources bus 0 link: 3 done PCI: 00:18.0 read_resources bus 0 link: 4 PCI: 00:18.0 read_resources bus 0 link: 4 done PCI: 00:18.0 read_resources bus 0 link: 5 PCI: 00:18.0 read_resources bus 0 link: 5 done PCI: 00:18.0 read_resources bus 0 link: 6 PCI: 00:18.0 read_resources bus 0 link: 6 done PCI: 00:18.0 read_resources bus 0 link: 7 PCI: 00:18.0 read_resources bus 0 link: 7 done DOMAIN: 0000 read_resources bus 0 link: 0 done Root Device read_resources bus 0 link: 0 done Done reading resources. Show resources in subtree (Root Device)...After reading. Root Device child on link 0 CPU_CLUSTER: 0 CPU_CLUSTER: 0 child on link 0 APIC: 10 APIC: 10 APIC: 11 APIC: 12 APIC: 13 APIC: 14 APIC: 15 APIC: 16 APIC: 17 DOMAIN: 0000 child on link 0 PCI: 00:18.0 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100 PCI: 00:18.0 child on link 0 PCI: 00:00.0 PCI: 00:18.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80100 index 10d8 PCI: 00:18.0 resource base 0 size 0 align 20 gran 20 limit ffffffffff flags 81200 index 10b8 PCI: 00:18.0 resource base 0 size 0 align 20 gran 20 limit ffffffffff flags 80200 index 10b0 PCI: 00:18.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index c0010058 PCI: 00:00.0 PCI: 00:01.0 child on link 0 PCI: 01:05.0 PCI: 00:01.0 resource base 0 size 0 align 12 gran 12 limit 1ffffff flags 80102 index 1c PCI: 00:01.0 resource base 0 size 0 align 20 gran 20 limit ffffffffff flags 81202 index 24 PCI: 00:01.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 PCI: 01:05.0 PCI: 01:05.0 resource base 0 size 20000000 align 29 gran 29 limit ffffffff flags 1200 index 10 PCI: 01:05.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 14 PCI: 01:05.0 resource base 0 size 10000 align 16 gran 16 limit ffffffff flags 200 index 18 PCI: 01:05.0 resource base 0 size 100000 align 20 gran 20 limit ffffffff flags 200 index 24 PCI: 01:05.1 PCI: 01:05.1 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 10 PCI: 00:02.0 PCI: 00:03.0 PCI: 00:04.0 PCI: 00:05.0 PCI: 00:06.0 PCI: 00:07.0 PCI: 00:08.0 PCI: 00:09.0 child on link 0 PCI: 02:00.0 PCI: 00:09.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c PCI: 00:09.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 PCI: 00:09.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 PCI: 02:00.0 PCI: 02:00.0 resource base 0 size 800 align 11 gran 11 limit ffffffffffffffff flags 201 index 10 PCI: 02:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 18 PCI: 02:00.1 PCI: 02:00.1 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10 PCI: 02:00.1 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14 PCI: 02:00.1 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18 PCI: 02:00.1 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c PCI: 02:00.1 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20 PCI: 02:00.1 resource base 0 size 10000 align 16 gran 16 limit ffffffff flags 2200 index 30 PCI: 00:0a.0 child on link 0 PCI: 03:00.0 PCI: 00:0a.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c PCI: 00:0a.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 PCI: 00:0a.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 PCI: 03:00.0 PCI: 03:00.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10 PCI: 00:11.0 PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10 PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14 PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18 PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c PCI: 00:11.0 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20 PCI: 00:11.0 resource base 0 size 400 align 10 gran 10 limit ffffffff flags 200 index 24 PCI: 00:12.0 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 PCI: 00:12.2 PCI: 00:12.2 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 10 PCI: 00:13.0 PCI: 00:13.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 PCI: 00:13.2 PCI: 00:13.2 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 10 PCI: 00:14.0 child on link 0 I2C: 00:50 I2C: 00:50 I2C: 00:51 I2C: 00:52 I2C: 00:53 PCI: 00:14.1 PCI: 00:14.2 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10 PCI: 00:14.3 child on link 0 PNP: 002e.0 PCI: 00:14.3 resource base 0 size 1 align 0 gran 0 limit ffffffff flags 200 index a0 PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 PCI: 00:14.3 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100 PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 PNP: 002e.0 PNP: 002e.0 resource base 3f0 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 PNP: 002e.0 resource base 6 size 0 align 0 gran 0 limit 0 flags c0000400 index 70 PNP: 002e.0 resource base 2 size 0 align 0 gran 0 limit 0 flags c0000800 index 74 PNP: 002e.1 PNP: 002e.1 resource base 378 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 PNP: 002e.1 resource base 7 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 PNP: 002e.2 PNP: 002e.2 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 PNP: 002e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 PNP: 002e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 PNP: 002e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 75 PNP: 002e.3 PNP: 002e.3 resource base 2f8 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 PNP: 002e.3 resource base 3 size 0 align 0 gran 0 limit 0 flags c0000400 index 70 PNP: 002e.5 PNP: 002e.5 resource base 60 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 PNP: 002e.5 resource base 64 size 8 align 3 gran 3 limit 7ff flags c0000100 index 62 PNP: 002e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 PNP: 002e.5 resource base c size 0 align 0 gran 0 limit 0 flags c0000400 index 72 PNP: 002e.6 PNP: 002e.6 resource base 100 size 0 align 0 gran 0 limit 0 flags c0000100 index 62 PNP: 002e.7 PNP: 002e.7 resource base 220 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 PNP: 002e.7 resource base 300 size 0 align 0 gran 0 limit 0 flags c0000100 index 62 PNP: 002e.7 resource base 9 size 0 align 0 gran 0 limit 0 flags c0000400 index 70 PNP: 002e.8 PNP: 002e.9 PNP: 002e.a PNP: 002e.b PNP: 002e.b resource base 290 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 PNP: 002e.b resource base 5 size 0 align 0 gran 0 limit 0 flags c0000400 index 70 PCI: 00:14.4 PCI: 00:14.5 PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 PCI: 00:14.6 PCI: 00:15.0 PCI: 00:15.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c PCI: 00:15.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 PCI: 00:15.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 PCI: 00:15.1 child on link 0 PCI: 05:00.0 PCI: 00:15.1 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c PCI: 00:15.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 PCI: 00:15.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 PCI: 05:00.0 PCI: 05:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10 PCI: 05:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 1201 index 18 PCI: 05:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 1201 index 20 PCI: 00:15.2 PCI: 00:15.3 PCI: 00:16.0 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 PCI: 00:16.2 PCI: 00:16.2 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 10 PCI: 00:18.1 PCI: 00:18.2 PCI: 00:18.3 PCI: 00:18.4 PCI: 00:18.5 DOMAIN: 0000 compute_resources_io: base: 0 size: 0 align: 0 gran: 0 limit: ffff PCI: 00:18.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff PCI: 00:01.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: 1ffffff PCI: 01:05.0 14 * [0x0 - 0xff] io PCI: 00:01.0 compute_resources_io: base: 100 size: 1000 align: 12 gran: 12 limit: ffff done PCI: 00:09.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff PCI: 02:00.0 18 * [0x0 - 0xff] io PCI: 02:00.1 20 * [0x400 - 0x40f] io PCI: 02:00.1 10 * [0x410 - 0x417] io PCI: 02:00.1 18 * [0x418 - 0x41f] io PCI: 02:00.1 14 * [0x420 - 0x423] io PCI: 02:00.1 1c * [0x424 - 0x427] io PCI: 00:09.0 compute_resources_io: base: 428 size: 1000 align: 12 gran: 12 limit: ffff done PCI: 00:0a.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff PCI: 00:0a.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done PCI: 00:15.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff PCI: 00:15.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done PCI: 00:15.1 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff PCI: 05:00.0 10 * [0x0 - 0xff] io PCI: 00:15.1 compute_resources_io: base: 100 size: 1000 align: 12 gran: 12 limit: ffff done PCI: 00:01.0 1c * [0x0 - 0xfff] io PCI: 00:09.0 1c * [0x1000 - 0x1fff] io PCI: 00:15.1 1c * [0x2000 - 0x2fff] io PCI: 00:11.0 20 * [0x3000 - 0x300f] io PCI: 00:11.0 10 * [0x3010 - 0x3017] io PCI: 00:11.0 18 * [0x3018 - 0x301f] io PCI: 00:11.0 14 * [0x3020 - 0x3023] io PCI: 00:11.0 1c * [0x3024 - 0x3027] io PCI: 00:18.0 compute_resources_io: base: 3028 size: 4000 align: 12 gran: 12 limit: ffff done PCI: 00:18.0 10d8 * [0x0 - 0x3fff] io DOMAIN: 0000 compute_resources_io: base: 4000 size: 4000 align: 12 gran: 0 limit: ffff done DOMAIN: 0000 compute_resources_mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff PCI: 00:18.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffff PCI: 00:01.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffff PCI: 01:05.0 10 * [0x0 - 0x1fffffff] prefmem PCI: 00:01.0 compute_resources_prefmem: base: 20000000 size: 20000000 align: 29 gran: 20 limit: ffffffff done PCI: 00:09.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff PCI: 00:09.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done PCI: 00:0a.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff PCI: 00:0a.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done PCI: 00:15.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff PCI: 00:15.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done PCI: 00:15.1 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff PCI: 05:00.0 20 * [0x0 - 0x3fff] prefmem PCI: 05:00.0 18 * [0x4000 - 0x4fff] prefmem PCI: 00:15.1 compute_resources_prefmem: base: 5000 size: 100000 align: 20 gran: 20 limit: ffffffffffffffff done PCI: 00:01.0 24 * [0x0 - 0x1fffffff] prefmem PCI: 00:15.1 24 * [0x20000000 - 0x200fffff] prefmem PCI: 00:18.0 compute_resources_prefmem: base: 20100000 size: 20100000 align: 29 gran: 20 limit: ffffffff done PCI: 00:18.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffff PCI: 00:01.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff PCI: 01:05.0 24 * [0x0 - 0xfffff] mem PCI: 01:05.0 18 * [0x100000 - 0x10ffff] mem PCI: 01:05.1 10 * [0x110000 - 0x113fff] mem PCI: 00:01.0 compute_resources_mem: base: 114000 size: 200000 align: 20 gran: 20 limit: ffffffff done PCI: 00:09.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff PCI: 02:00.1 30 * [0x0 - 0xffff] mem PCI: 02:00.0 10 * [0x10000 - 0x107ff] mem PCI: 00:09.0 compute_resources_mem: base: 10800 size: 100000 align: 20 gran: 20 limit: ffffffff done PCI: 00:0a.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff PCI: 03:00.0 10 * [0x0 - 0x7fff] mem PCI: 00:0a.0 compute_resources_mem: base: 8000 size: 100000 align: 20 gran: 20 limit: ffffffff done PCI: 00:15.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff PCI: 00:15.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done PCI: 00:15.1 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff PCI: 00:15.1 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done PCI: 00:01.0 20 * [0x0 - 0x1fffff] mem PCI: 00:09.0 20 * [0x200000 - 0x2fffff] mem PCI: 00:0a.0 20 * [0x300000 - 0x3fffff] mem PCI: 00:14.2 10 * [0x400000 - 0x403fff] mem PCI: 00:12.0 10 * [0x404000 - 0x404fff] mem PCI: 00:13.0 10 * [0x405000 - 0x405fff] mem PCI: 00:14.5 10 * [0x406000 - 0x406fff] mem PCI: 00:16.0 10 * [0x407000 - 0x407fff] mem PCI: 00:11.0 24 * [0x408000 - 0x4083ff] mem PCI: 00:12.2 10 * [0x408400 - 0x4084ff] mem PCI: 00:13.2 10 * [0x408500 - 0x4085ff] mem PCI: 00:16.2 10 * [0x408600 - 0x4086ff] mem PCI: 00:14.3 a0 * [0x408700 - 0x408700] mem PCI: 00:18.0 compute_resources_mem: base: 408701 size: 500000 align: 20 gran: 20 limit: ffffffff done PCI: 00:18.0 10b8 * [0x0 - 0x200fffff] prefmem PCI: 00:18.0 10b0 * [0x20100000 - 0x205fffff] mem DOMAIN: 0000 compute_resources_mem: base: 20600000 size: 20600000 align: 29 gran: 0 limit: ffffffff done avoid_fixed_resources: DOMAIN: 0000 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff constrain_resources: DOMAIN: 0000 constrain_resources: PCI: 00:18.0 constrain_resources: PCI: 00:00.0 constrain_resources: PCI: 00:01.0 constrain_resources: PCI: 01:05.0 constrain_resources: PCI: 01:05.1 constrain_resources: PCI: 00:09.0 constrain_resources: PCI: 02:00.0 constrain_resources: PCI: 02:00.1 constrain_resources: PCI: 00:0a.0 constrain_resources: PCI: 03:00.0 constrain_resources: PCI: 00:11.0 constrain_resources: PCI: 00:12.0 constrain_resources: PCI: 00:12.2 constrain_resources: PCI: 00:13.0 constrain_resources: PCI: 00:13.2 constrain_resources: PCI: 00:14.0 constrain_resources: I2C: 00:50 constrain_resources: I2C: 00:51 constrain_resources: I2C: 00:52 constrain_resources: I2C: 00:53 constrain_resources: PCI: 00:14.2 constrain_resources: PCI: 00:14.3 constrain_resources: PNP: 002e.2 constrain_resources: PNP: 002e.3 skipping PNP: 002e.3@60 fixed resource, size=0! skipping PNP: 002e.3@70 fixed resource, size=0! constrain_resources: PNP: 002e.5 skipping PNP: 002e.5@72 fixed resource, size=0! constrain_resources: PNP: 002e.a constrain_resources: PNP: 002e.b skipping PNP: 002e.b@60 fixed resource, size=0! skipping PNP: 002e.b@70 fixed resource, size=0! constrain_resources: PCI: 00:14.5 constrain_resources: PCI: 00:15.0 constrain_resources: PCI: 00:15.1 constrain_resources: PCI: 05:00.0 constrain_resources: PCI: 00:15.2 constrain_resources: PCI: 00:15.3 constrain_resources: PCI: 00:16.0 constrain_resources: PCI: 00:16.2 constrain_resources: PCI: 00:18.1 constrain_resources: PCI: 00:18.2 constrain_resources: PCI: 00:18.3 constrain_resources: PCI: 00:18.4 constrain_resources: PCI: 00:18.5 avoid_fixed_resources2: DOMAIN: 0000@10000000 limit 0000ffff lim->base 00001000 lim->limit 0000ffff avoid_fixed_resources2: DOMAIN: 0000@10000100 limit ffffffff lim->base 00000000 lim->limit f7ffffff Setting resources... DOMAIN: 0000 allocate_resources_io: base:1000 size:4000 align:12 gran:0 limit:ffff Assigned: PCI: 00:18.0 10d8 * [0x1000 - 0x4fff] io DOMAIN: 0000 allocate_resources_io: next_base: 5000 size: 4000 align: 12 gran: 0 done PCI: 00:18.0 allocate_resources_io: base:1000 size:4000 align:12 gran:12 limit:ffff Assigned: PCI: 00:01.0 1c * [0x1000 - 0x1fff] io Assigned: PCI: 00:09.0 1c * [0x2000 - 0x2fff] io Assigned: PCI: 00:15.1 1c * [0x3000 - 0x3fff] io Assigned: PCI: 00:11.0 20 * [0x4000 - 0x400f] io Assigned: PCI: 00:11.0 10 * [0x4010 - 0x4017] io Assigned: PCI: 00:11.0 18 * [0x4018 - 0x401f] io Assigned: PCI: 00:11.0 14 * [0x4020 - 0x4023] io Assigned: PCI: 00:11.0 1c * [0x4024 - 0x4027] io PCI: 00:18.0 allocate_resources_io: next_base: 4028 size: 4000 align: 12 gran: 12 done PCI: 00:01.0 allocate_resources_io: base:1000 size:1000 align:12 gran:12 limit:ffff Assigned: PCI: 01:05.0 14 * [0x1000 - 0x10ff] io PCI: 00:01.0 allocate_resources_io: next_base: 1100 size: 1000 align: 12 gran: 12 done PCI: 00:09.0 allocate_resources_io: base:2000 size:1000 align:12 gran:12 limit:ffff Assigned: PCI: 02:00.0 18 * [0x2000 - 0x20ff] io Assigned: PCI: 02:00.1 20 * [0x2400 - 0x240f] io Assigned: PCI: 02:00.1 10 * [0x2410 - 0x2417] io Assigned: PCI: 02:00.1 18 * [0x2418 - 0x241f] io Assigned: PCI: 02:00.1 14 * [0x2420 - 0x2423] io Assigned: PCI: 02:00.1 1c * [0x2424 - 0x2427] io PCI: 00:09.0 allocate_resources_io: next_base: 2428 size: 1000 align: 12 gran: 12 done PCI: 00:0a.0 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff PCI: 00:0a.0 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done PCI: 00:15.0 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff PCI: 00:15.0 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done PCI: 00:15.1 allocate_resources_io: base:3000 size:1000 align:12 gran:12 limit:ffff Assigned: PCI: 05:00.0 10 * [0x3000 - 0x30ff] io PCI: 00:15.1 allocate_resources_io: next_base: 3100 size: 1000 align: 12 gran: 12 done DOMAIN: 0000 allocate_resources_mem: base:c0000000 size:20600000 align:29 gran:0 limit:f7ffffff Assigned: PCI: 00:18.0 10b8 * [0xc0000000 - 0xe00fffff] prefmem Assigned: PCI: 00:18.0 10b0 * [0xe0100000 - 0xe05fffff] mem DOMAIN: 0000 allocate_resources_mem: next_base: e0600000 size: 20600000 align: 29 gran: 0 done PCI: 00:18.0 allocate_resources_prefmem: base:c0000000 size:20100000 align:29 gran:20 limit:f7ffffff Assigned: PCI: 00:01.0 24 * [0xc0000000 - 0xdfffffff] prefmem Assigned: PCI: 00:15.1 24 * [0xe0000000 - 0xe00fffff] prefmem PCI: 00:18.0 allocate_resources_prefmem: next_base: e0100000 size: 20100000 align: 29 gran: 20 done PCI: 00:01.0 allocate_resources_prefmem: base:c0000000 size:20000000 align:29 gran:20 limit:f7ffffff Assigned: PCI: 01:05.0 10 * [0xc0000000 - 0xdfffffff] prefmem PCI: 00:01.0 allocate_resources_prefmem: next_base: e0000000 size: 20000000 align: 29 gran: 20 done PCI: 00:09.0 allocate_resources_prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff PCI: 00:09.0 allocate_resources_prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done PCI: 00:0a.0 allocate_resources_prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff PCI: 00:0a.0 allocate_resources_prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done PCI: 00:15.0 allocate_resources_prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff PCI: 00:15.0 allocate_resources_prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done PCI: 00:15.1 allocate_resources_prefmem: base:e0000000 size:100000 align:20 gran:20 limit:f7ffffff Assigned: PCI: 05:00.0 20 * [0xe0000000 - 0xe0003fff] prefmem Assigned: PCI: 05:00.0 18 * [0xe0004000 - 0xe0004fff] prefmem PCI: 00:15.1 allocate_resources_prefmem: next_base: e0005000 size: 100000 align: 20 gran: 20 done PCI: 00:18.0 allocate_resources_mem: base:e0100000 size:500000 align:20 gran:20 limit:f7ffffff Assigned: PCI: 00:01.0 20 * [0xe0100000 - 0xe02fffff] mem Assigned: PCI: 00:09.0 20 * [0xe0300000 - 0xe03fffff] mem Assigned: PCI: 00:0a.0 20 * [0xe0400000 - 0xe04fffff] mem Assigned: PCI: 00:14.2 10 * [0xe0500000 - 0xe0503fff] mem Assigned: PCI: 00:12.0 10 * [0xe0504000 - 0xe0504fff] mem Assigned: PCI: 00:13.0 10 * [0xe0505000 - 0xe0505fff] mem Assigned: PCI: 00:14.5 10 * [0xe0506000 - 0xe0506fff] mem Assigned: PCI: 00:16.0 10 * [0xe0507000 - 0xe0507fff] mem Assigned: PCI: 00:11.0 24 * [0xe0508000 - 0xe05083ff] mem Assigned: PCI: 00:12.2 10 * [0xe0508400 - 0xe05084ff] mem Assigned: PCI: 00:13.2 10 * [0xe0508500 - 0xe05085ff] mem Assigned: PCI: 00:16.2 10 * [0xe0508600 - 0xe05086ff] mem Assigned: PCI: 00:14.3 a0 * [0xe0508700 - 0xe0508700] mem PCI: 00:18.0 allocate_resources_mem: next_base: e0508701 size: 500000 align: 20 gran: 20 done PCI: 00:01.0 allocate_resources_mem: base:e0100000 size:200000 align:20 gran:20 limit:f7ffffff Assigned: PCI: 01:05.0 24 * [0xe0100000 - 0xe01fffff] mem Assigned: PCI: 01:05.0 18 * [0xe0200000 - 0xe020ffff] mem Assigned: PCI: 01:05.1 10 * [0xe0210000 - 0xe0213fff] mem PCI: 00:01.0 allocate_resources_mem: next_base: e0214000 size: 200000 align: 20 gran: 20 done PCI: 00:09.0 allocate_resources_mem: base:e0300000 size:100000 align:20 gran:20 limit:f7ffffff Assigned: PCI: 02:00.1 30 * [0xe0300000 - 0xe030ffff] mem Assigned: PCI: 02:00.0 10 * [0xe0310000 - 0xe03107ff] mem PCI: 00:09.0 allocate_resources_mem: next_base: e0310800 size: 100000 align: 20 gran: 20 done PCI: 00:0a.0 allocate_resources_mem: base:e0400000 size:100000 align:20 gran:20 limit:f7ffffff Assigned: PCI: 03:00.0 10 * [0xe0400000 - 0xe0407fff] mem PCI: 00:0a.0 allocate_resources_mem: next_base: e0408000 size: 100000 align: 20 gran: 20 done PCI: 00:15.0 allocate_resources_mem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff PCI: 00:15.0 allocate_resources_mem: next_base: f7ffffff size: 0 align: 20 gran: 20 done PCI: 00:15.1 allocate_resources_mem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff PCI: 00:15.1 allocate_resources_mem: next_base: f7ffffff size: 0 align: 20 gran: 20 done Root Device assign_resources, bus 0 link: 0 split: 128K table at =bffe0000 node 0: mmio_basek=00300000, basek=00400000, limitk=01060000 DOMAIN: 0000 assign_resources, bus 0 link: 0 VGA: PCI: 00:18.0 (aka node 0) link 0 has VGA device PCI: 00:18.0 10d8 <- [0x0000001000 - 0x0000004fff] size 0x00004000 gran 0x0c io PCI: 00:18.0 10b8 <- [0x00c0000000 - 0x00e00fffff] size 0x20100000 gran 0x14 prefmem PCI: 00:18.0 10b0 <- [0x00e0100000 - 0x00e05fffff] size 0x00500000 gran 0x14 mem PCI: 00:18.0 assign_resources, bus 0 link: 0 PCI: 00:01.0 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 01 io PCI: 00:01.0 24 <- [0x00c0000000 - 0x00dfffffff] size 0x20000000 gran 0x14 bus 01 prefmem PCI: 00:01.0 20 <- [0x00e0100000 - 0x00e02fffff] size 0x00200000 gran 0x14 bus 01 mem PCI: 00:01.0 assign_resources, bus 1 link: 0 PCI: 01:05.0 10 <- [0x00c0000000 - 0x00dfffffff] size 0x20000000 gran 0x1d prefmem PCI: 01:05.0 14 <- [0x0000001000 - 0x00000010ff] size 0x00000100 gran 0x08 io PCI: 01:05.0 18 <- [0x00e0200000 - 0x00e020ffff] size 0x00010000 gran 0x10 mem PCI: 01:05.0 24 <- [0x00e0100000 - 0x00e01fffff] size 0x00100000 gran 0x14 mem PCI: 01:05.1 10 <- [0x00e0210000 - 0x00e0213fff] size 0x00004000 gran 0x0e mem PCI: 00:01.0 assign_resources, bus 1 link: 0 PCI: 00:09.0 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 02 io PCI: 00:09.0 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 02 prefmem PCI: 00:09.0 20 <- [0x00e0300000 - 0x00e03fffff] size 0x00100000 gran 0x14 bus 02 mem PCI: 00:09.0 assign_resources, bus 2 link: 0 PCI: 02:00.0 10 <- [0x00e0310000 - 0x00e03107ff] size 0x00000800 gran 0x0b mem64 PCI: 02:00.0 18 <- [0x0000002000 - 0x00000020ff] size 0x00000100 gran 0x08 io PCI: 02:00.1 10 <- [0x0000002410 - 0x0000002417] size 0x00000008 gran 0x03 io PCI: 02:00.1 14 <- [0x0000002420 - 0x0000002423] size 0x00000004 gran 0x02 io PCI: 02:00.1 18 <- [0x0000002418 - 0x000000241f] size 0x00000008 gran 0x03 io PCI: 02:00.1 1c <- [0x0000002424 - 0x0000002427] size 0x00000004 gran 0x02 io PCI: 02:00.1 20 <- [0x0000002400 - 0x000000240f] size 0x00000010 gran 0x04 io PCI: 02:00.1 30 <- [0x00e0300000 - 0x00e030ffff] size 0x00010000 gran 0x10 romem PCI: 00:09.0 assign_resources, bus 2 link: 0 PCI: 00:0a.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 03 io PCI: 00:0a.0 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 03 prefmem PCI: 00:0a.0 20 <- [0x00e0400000 - 0x00e04fffff] size 0x00100000 gran 0x14 bus 03 mem PCI: 00:0a.0 assign_resources, bus 3 link: 0 PCI: 03:00.0 10 <- [0x00e0400000 - 0x00e0407fff] size 0x00008000 gran 0x0f mem64 PCI: 00:0a.0 assign_resources, bus 3 link: 0 PCI: 00:11.0 10 <- [0x0000004010 - 0x0000004017] size 0x00000008 gran 0x03 io PCI: 00:11.0 14 <- [0x0000004020 - 0x0000004023] size 0x00000004 gran 0x02 io PCI: 00:11.0 18 <- [0x0000004018 - 0x000000401f] size 0x00000008 gran 0x03 io PCI: 00:11.0 1c <- [0x0000004024 - 0x0000004027] size 0x00000004 gran 0x02 io PCI: 00:11.0 20 <- [0x0000004000 - 0x000000400f] size 0x00000010 gran 0x04 io PCI: 00:11.0 24 <- [0x00e0508000 - 0x00e05083ff] size 0x00000400 gran 0x0a mem PCI: 00:12.0 10 <- [0x00e0504000 - 0x00e0504fff] size 0x00001000 gran 0x0c mem PCI: 00:12.2 10 <- [0x00e0508400 - 0x00e05084ff] size 0x00000100 gran 0x08 mem PCI: 00:13.0 10 <- [0x00e0505000 - 0x00e0505fff] size 0x00001000 gran 0x0c mem PCI: 00:13.2 10 <- [0x00e0508500 - 0x00e05085ff] size 0x00000100 gran 0x08 mem PCI: 00:14.2 10 <- [0x00e0500000 - 0x00e0503fff] size 0x00004000 gran 0x0e mem64 SB800 - Lpc.c - lpc_set_resources - Start. PCI: 00:14.3 a0 <- [0x00e0508702 - 0x00e0508702] size 0x00000001 gran 0x00 mem PCI: 00:14.3 assign_resources, bus 0 link: 0 PNP: 002e.2 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io PNP: 002e.2 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq ERROR: PNP: 002e.2 74 drq size: 0x0000000001 not assigned ERROR: PNP: 002e.2 75 drq size: 0x0000000001 not assigned PNP: 002e.3 missing set_resources PNP: 002e.5 60 <- [0x0000000060 - 0x0000000067] size 0x00000008 gran 0x03 io PNP: 002e.5 62 <- [0x0000000064 - 0x000000006b] size 0x00000008 gran 0x03 io PNP: 002e.5 70 <- [0x0000000001 - 0x0000000001] size 0x00000001 gran 0x00 irq PNP: 002e.5 72 <- [0x000000000c - 0x000000000b] size 0x00000000 gran 0x00 irq PNP: 002e.b missing set_resources PCI: 00:14.3 assign_resources, bus 0 link: 0 SB800 - Lpc.c - lpc_set_resources - End. PCI: 00:14.5 10 <- [0x00e0506000 - 0x00e0506fff] size 0x00001000 gran 0x0c mem PCI: 00:15.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 04 io PCI: 00:15.0 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 04 prefmem PCI: 00:15.0 20 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 04 mem PCI: 00:15.1 1c <- [0x0000003000 - 0x0000003fff] size 0x00001000 gran 0x0c bus 05 io PCI: 00:15.1 24 <- [0x00e0000000 - 0x00e00fffff] size 0x00100000 gran 0x14 bus 05 prefmem PCI: 00:15.1 20 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 05 mem PCI: 00:15.1 assign_resources, bus 5 link: 0 PCI: 05:00.0 10 <- [0x0000003000 - 0x00000030ff] size 0x00000100 gran 0x08 io PCI: 05:00.0 18 <- [0x00e0004000 - 0x00e0004fff] size 0x00001000 gran 0x0c prefmem64 PCI: 05:00.0 20 <- [0x00e0000000 - 0x00e0003fff] size 0x00004000 gran 0x0e prefmem64 PCI: 00:15.1 assign_resources, bus 5 link: 0 PCI: 00:16.0 10 <- [0x00e0507000 - 0x00e0507fff] size 0x00001000 gran 0x0c mem PCI: 00:16.2 10 <- [0x00e0508600 - 0x00e05086ff] size 0x00000100 gran 0x08 mem PCI: 00:18.0 assign_resources, bus 0 link: 0 PCI: 00:18.0 c0010058 <- [0x00f8000000 - 0x00fbffffff] size 0x04000000 gran 0x00 mem DOMAIN: 0000 assign_resources, bus 0 link: 0 Root Device assign_resources, bus 0 link: 0 Done setting resources. Show resources in subtree (Root Device)...After assigning values. Root Device child on link 0 CPU_CLUSTER: 0 CPU_CLUSTER: 0 child on link 0 APIC: 10 APIC: 10 APIC: 11 APIC: 12 APIC: 13 APIC: 14 APIC: 15 APIC: 16 APIC: 17 DOMAIN: 0000 child on link 0 PCI: 00:18.0 DOMAIN: 0000 resource base 1000 size 4000 align 12 gran 0 limit ffff flags 40040100 index 10000000 DOMAIN: 0000 resource base c0000000 size 20600000 align 29 gran 0 limit f7ffffff flags 40040200 index 10000100 DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 10 DOMAIN: 0000 resource base c0000 size bff40000 align 0 gran 0 limit 0 flags e0004200 index 20 DOMAIN: 0000 resource base 100000000 size 318000000 align 0 gran 0 limit 0 flags e0004200 index 30 DOMAIN: 0000 resource base c0000000 size 20000000 align 0 gran 0 limit 0 flags f0000200 index 7 PCI: 00:18.0 child on link 0 PCI: 00:00.0 PCI: 00:18.0 resource base 1000 size 4000 align 12 gran 12 limit ffff flags 60080100 index 10d8 PCI: 00:18.0 resource base c0000000 size 20100000 align 29 gran 20 limit f7ffffff flags 60081200 index 10b8 PCI: 00:18.0 resource base e0100000 size 500000 align 20 gran 20 limit f7ffffff flags 60080200 index 10b0 PCI: 00:18.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index c0010058 PCI: 00:00.0 PCI: 00:01.0 child on link 0 PCI: 01:05.0 PCI: 00:01.0 resource base 1000 size 1000 align 12 gran 12 limit ffff flags 60080102 index 1c PCI: 00:01.0 resource base c0000000 size 20000000 align 29 gran 20 limit f7ffffff flags 60081202 index 24 PCI: 00:01.0 resource base e0100000 size 200000 align 20 gran 20 limit f7ffffff flags 60080202 index 20 PCI: 01:05.0 PCI: 01:05.0 resource base c0000000 size 20000000 align 29 gran 29 limit f7ffffff flags 60001200 index 10 PCI: 01:05.0 resource base 1000 size 100 align 8 gran 8 limit ffff flags 60000100 index 14 PCI: 01:05.0 resource base e0200000 size 10000 align 16 gran 16 limit f7ffffff flags 60000200 index 18 PCI: 01:05.0 resource base e0100000 size 100000 align 20 gran 20 limit f7ffffff flags 60000200 index 24 PCI: 01:05.1 PCI: 01:05.1 resource base e0210000 size 4000 align 14 gran 14 limit f7ffffff flags 60000200 index 10 PCI: 00:02.0 PCI: 00:03.0 PCI: 00:04.0 PCI: 00:05.0 PCI: 00:06.0 PCI: 00:07.0 PCI: 00:08.0 PCI: 00:09.0 child on link 0 PCI: 02:00.0 PCI: 00:09.0 resource base 2000 size 1000 align 12 gran 12 limit ffff flags 60080102 index 1c PCI: 00:09.0 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24 PCI: 00:09.0 resource base e0300000 size 100000 align 20 gran 20 limit f7ffffff flags 60080202 index 20 PCI: 02:00.0 PCI: 02:00.0 resource base e0310000 size 800 align 11 gran 11 limit f7ffffff flags 60000201 index 10 PCI: 02:00.0 resource base 2000 size 100 align 8 gran 8 limit ffff flags 60000100 index 18 PCI: 02:00.1 PCI: 02:00.1 resource base 2410 size 8 align 3 gran 3 limit ffff flags 60000100 index 10 PCI: 02:00.1 resource base 2420 size 4 align 2 gran 2 limit ffff flags 60000100 index 14 PCI: 02:00.1 resource base 2418 size 8 align 3 gran 3 limit ffff flags 60000100 index 18 PCI: 02:00.1 resource base 2424 size 4 align 2 gran 2 limit ffff flags 60000100 index 1c PCI: 02:00.1 resource base 2400 size 10 align 4 gran 4 limit ffff flags 60000100 index 20 PCI: 02:00.1 resource base e0300000 size 10000 align 16 gran 16 limit f7ffffff flags 60002200 index 30 PCI: 00:0a.0 child on link 0 PCI: 03:00.0 PCI: 00:0a.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c PCI: 00:0a.0 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24 PCI: 00:0a.0 resource base e0400000 size 100000 align 20 gran 20 limit f7ffffff flags 60080202 index 20 PCI: 03:00.0 PCI: 03:00.0 resource base e0400000 size 8000 align 15 gran 15 limit f7ffffff flags 60000201 index 10 PCI: 00:11.0 PCI: 00:11.0 resource base 4010 size 8 align 3 gran 3 limit ffff flags 60000100 index 10 PCI: 00:11.0 resource base 4020 size 4 align 2 gran 2 limit ffff flags 60000100 index 14 PCI: 00:11.0 resource base 4018 size 8 align 3 gran 3 limit ffff flags 60000100 index 18 PCI: 00:11.0 resource base 4024 size 4 align 2 gran 2 limit ffff flags 60000100 index 1c PCI: 00:11.0 resource base 4000 size 10 align 4 gran 4 limit ffff flags 60000100 index 20 PCI: 00:11.0 resource base e0508000 size 400 align 10 gran 10 limit f7ffffff flags 60000200 index 24 PCI: 00:12.0 PCI: 00:12.0 resource base e0504000 size 1000 align 12 gran 12 limit f7ffffff flags 60000200 index 10 PCI: 00:12.2 PCI: 00:12.2 resource base e0508400 size 100 align 8 gran 8 limit f7ffffff flags 60000200 index 10 PCI: 00:13.0 PCI: 00:13.0 resource base e0505000 size 1000 align 12 gran 12 limit f7ffffff flags 60000200 index 10 PCI: 00:13.2 PCI: 00:13.2 resource base e0508500 size 100 align 8 gran 8 limit f7ffffff flags 60000200 index 10 PCI: 00:14.0 child on link 0 I2C: 00:50 I2C: 00:50 I2C: 00:51 I2C: 00:52 I2C: 00:53 PCI: 00:14.1 PCI: 00:14.2 PCI: 00:14.2 resource base e0500000 size 4000 align 14 gran 14 limit f7ffffff flags 60000201 index 10 PCI: 00:14.3 child on link 0 PNP: 002e.0 PCI: 00:14.3 resource base e0508702 size 1 align 0 gran 0 limit f7ffffff flags 60000200 index a0 PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 PCI: 00:14.3 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100 PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 PNP: 002e.0 PNP: 002e.0 resource base 3f0 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 PNP: 002e.0 resource base 6 size 0 align 0 gran 0 limit 0 flags c0000400 index 70 PNP: 002e.0 resource base 2 size 0 align 0 gran 0 limit 0 flags c0000800 index 74 PNP: 002e.1 PNP: 002e.1 resource base 378 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 PNP: 002e.1 resource base 7 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 PNP: 002e.2 PNP: 002e.2 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60 PNP: 002e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 PNP: 002e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 PNP: 002e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 75 PNP: 002e.3 PNP: 002e.3 resource base 2f8 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 PNP: 002e.3 resource base 3 size 0 align 0 gran 0 limit 0 flags c0000400 index 70 PNP: 002e.5 PNP: 002e.5 resource base 60 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60 PNP: 002e.5 resource base 64 size 8 align 3 gran 3 limit 7ff flags e0000100 index 62 PNP: 002e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 PNP: 002e.5 resource base c size 0 align 0 gran 0 limit 0 flags e0000400 index 72 PNP: 002e.6 PNP: 002e.6 resource base 100 size 0 align 0 gran 0 limit 0 flags c0000100 index 62 PNP: 002e.7 PNP: 002e.7 resource base 220 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 PNP: 002e.7 resource base 300 size 0 align 0 gran 0 limit 0 flags c0000100 index 62 PNP: 002e.7 resource base 9 size 0 align 0 gran 0 limit 0 flags c0000400 index 70 PNP: 002e.8 PNP: 002e.9 PNP: 002e.a PNP: 002e.b PNP: 002e.b resource base 290 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 PNP: 002e.b resource base 5 size 0 align 0 gran 0 limit 0 flags c0000400 index 70 PCI: 00:14.4 PCI: 00:14.5 PCI: 00:14.5 resource base e0506000 size 1000 align 12 gran 12 limit f7ffffff flags 60000200 index 10 PCI: 00:14.6 PCI: 00:15.0 PCI: 00:15.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c PCI: 00:15.0 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24 PCI: 00:15.0 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60080202 index 20 PCI: 00:15.1 child on link 0 PCI: 05:00.0 PCI: 00:15.1 resource base 3000 size 1000 align 12 gran 12 limit ffff flags 60080102 index 1c PCI: 00:15.1 resource base e0000000 size 100000 align 20 gran 20 limit f7ffffff flags 60081202 index 24 PCI: 00:15.1 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60080202 index 20 PCI: 05:00.0 PCI: 05:00.0 resource base 3000 size 100 align 8 gran 8 limit ffff flags 60000100 index 10 PCI: 05:00.0 resource base e0004000 size 1000 align 12 gran 12 limit f7ffffff flags 60001201 index 18 PCI: 05:00.0 resource base e0000000 size 4000 align 14 gran 14 limit f7ffffff flags 60001201 index 20 PCI: 00:15.2 PCI: 00:15.3 PCI: 00:16.0 PCI: 00:16.0 resource base e0507000 size 1000 align 12 gran 12 limit f7ffffff flags 60000200 index 10 PCI: 00:16.2 PCI: 00:16.2 resource base e0508600 size 100 align 8 gran 8 limit f7ffffff flags 60000200 index 10 PCI: 00:18.1 PCI: 00:18.2 PCI: 00:18.3 PCI: 00:18.4 PCI: 00:18.5 Done allocating resources. BS: BS_DEV_RESOURCES times (us): entry 0 run 3588573 exit 0 Enabling resources... Fam15 - domain_enable_resources: AmdInitMid. AmdLateRunApTask on Core: 11 AmdLateRunApTask on Core: 12 AmdLateRunApTask on Core: 13 AmdLateRunApTask on Core: 14 AmdLateRunApTask on Core: 15 AmdLateRunApTask on Core: 16 AmdLateRunApTask on Core: 17 AmdLateRunApTask on Core: 11 AmdLateRunApTask on Core: 12 AmdLateRunApTask on Core: 13 AmdLateRunApTask on Core: 14 AmdLateRunApTask on Core: 15 AmdLateRunApTask on Core: 16 AmdLateRunApTask on Core: 17 Fam15 - leaving domain_enable_resources. PCI: 00:18.0 cmd <- 00 PCI: 00:18.1 subsystem <- 1043/843e PCI: 00:18.1 cmd <- 00 PCI: 00:18.2 subsystem <- 1043/843e PCI: 00:18.2 cmd <- 00 PCI: 00:18.3 subsystem <- 1043/843e PCI: 00:18.3 cmd <- 00 PCI: 00:18.4 subsystem <- 1043/843e PCI: 00:18.4 cmd <- 00 PCI: 00:18.5 subsystem <- 1043/843e PCI: 00:18.5 cmd <- 00 PCI: 00:00.0 subsystem <- 1043/843e PCI: 00:00.0 cmd <- 06 PCI: 00:01.0 bridge ctrl <- 000b PCI: 00:01.0 cmd <- 07 PCI: 00:09.0 bridge ctrl <- 0003 PCI: 00:09.0 cmd <- 07 PCI: 00:0a.0 bridge ctrl <- 0003 PCI: 00:0a.0 cmd <- 06 PCI: 00:11.0 subsystem <- 1043/843e PCI: 00:11.0 cmd <- 03 PCI: 00:12.0 subsystem <- 1043/843e PCI: 00:12.0 cmd <- 02 PCI: 00:12.2 subsystem <- 1043/843e PCI: 00:12.2 cmd <- 02 PCI: 00:13.0 subsystem <- 1043/843e PCI: 00:13.0 cmd <- 02 PCI: 00:13.2 subsystem <- 1043/843e PCI: 00:13.2 cmd <- 02 PCI: 00:14.0 subsystem <- 1043/843e PCI: 00:14.0 cmd <- 403 PCI: 00:14.2 subsystem <- 1043/843e PCI: 00:14.2 cmd <- 02 PCI: 00:14.3 subsystem <- 1043/843e PCI: 00:14.3 cmd <- 0f PCI: 00:14.5 subsystem <- 1043/843e PCI: 00:14.5 cmd <- 02 PCI: 00:15.0 bridge ctrl <- 0003 PCI: 00:15.0 cmd <- 00 PCI: 00:15.1 bridge ctrl <- 0003 PCI: 00:15.1 cmd <- 07 PCI: 00:15.2 bridge ctrl <- ffff PCI: 00:15.2 cmd <- ffff PCI: 00:15.3 bridge ctrl <- ffff PCI: 00:15.3 cmd <- ffff PCI: 00:16.0 subsystem <- 1043/843e PCI: 00:16.0 cmd <- 02 PCI: 00:16.2 subsystem <- 1043/843e PCI: 00:16.2 cmd <- 02 PCI: 01:05.0 cmd <- 03 PCI: 01:05.1 cmd <- 02 PCI: 02:00.0 cmd <- 03 PCI: 02:00.1 cmd <- 03 PCI: 03:00.0 cmd <- 02 PCI: 05:00.0 cmd <- 03 done. BS: BS_DEV_ENABLE times (us): entry 0 run 195730 exit 0 Initializing devices... Root Device init Root Device init 1575 usecs CPU_CLUSTER: 0 init start_eip=0x00001000, code_size=0x00000031 Initializing CPU #0 CPU: vendor AMD device 600f12 CPU: family 15, model 01, stepping 02 Model 15 Init. Setting up local apic... apic_id: 0x10 done. siblings = 07, CPU #0 initialized CPU1: stack_base 002c6000, stack_end 002c6ff8 Asserting INIT. Waiting for send to finish... +Deasserting INIT. Waiting for send to finish... +#startup loops: 2. Sending STARTUP #1 to 17. After apic_write. Startup point 1. Waiting for send to finish... +Sending STARTUP #2 to 17. After apic_write. Startup point 1. Waiting for send to finish... +After Startup. Initializing CPU #1 CPU: vendor AMD device 600f12 CPU: family 15, model 01, stepping 02 Model 15 Init. Setting up local apic... apic_id: 0x11 done. siblings = 07, CPU #1 initialized CPU2: stack_base 002c5000, stack_end 002c5ff8 Asserting INIT. Waiting for send to finish... +Deasserting INIT. Waiting for send to finish... +#startup loops: 2. Sending STARTUP #1 to 18. After apic_write. Startup point 1. Waiting for send to finish... +Sending STARTUP #2 to 18. After apic_write. Startup point 1. Waiting for send to finish... +After Startup. Initializing CPU #2 CPU: vendor AMD device 600f12 CPU: family 15, model 01, stepping 02 Model 15 Init. Setting up local apic... apic_id: 0x12 done. siblings = 07, CPU #2 initialized CPU3: stack_base 002c4000, stack_end 002c4ff8 Asserting INIT. Waiting for send to finish... +Deasserting INIT. Waiting for send to finish... +#startup loops: 2. Sending STARTUP #1 to 19. After apic_write. Startup point 1. Waiting for send to finish... +Sending STARTUP #2 to 19. After apic_write. Startup point 1. Waiting for send to finish... +After Startup. Initializing CPU #3 CPU: vendor AMD device 600f12 CPU: family 15, model 01, stepping 02 Model 15 Init. Setting up local apic... apic_id: 0x13 done. siblings = 07, CPU #3 initialized CPU4: stack_base 002c3000, stack_end 002c3ff8 Asserting INIT. Waiting for send to finish... +Deasserting INIT. Waiting for send to finish... +#startup loops: 2. Sending STARTUP #1 to 20. After apic_write. Startup point 1. Waiting for send to finish... +Sending STARTUP #2 to 20. After apic_write. Startup point 1. Waiting for send to finish... +After Startup. Initializing CPU #4 CPU: vendor AMD device 600f12 CPU: family 15, model 01, stepping 02 Model 15 Init. Setting up local apic... apic_id: 0x14 done. siblings = 07, CPU #4 initialized CPU5: stack_base 002c2000, stack_end 002c2ff8 Asserting INIT. Waiting for send to finish... +Deasserting INIT. Waiting for send to finish... +#startup loops: 2. Sending STARTUP #1 to 21. After apic_write. Startup point 1. Waiting for send to finish... +Sending STARTUP #2 to 21. After apic_write. Startup point 1. Waiting for send to finish... +After Startup. Initializing CPU #5 CPU: vendor AMD device 600f12 CPU: family 15, model 01, stepping 02 Model 15 Init. Setting up local apic... apic_id: 0x15 done. siblings = 07, CPU #5 initialized CPU6: stack_base 002c1000, stack_end 002c1ff8 Asserting INIT. Waiting for send to finish... +Deasserting INIT. Waiting for send to finish... +#startup loops: 2. Sending STARTUP #1 to 22. After apic_write. Startup point 1. Waiting for send to finish... +Sending STARTUP #2 to 22. After apic_write. Startup point 1. Waiting for send to finish... +After Startup. Initializing CPU #6 CPU: vendor AMD device 600f12 CPU: family 15, model 01, stepping 02 Model 15 Init. Setting up local apic... apic_id: 0x16 done. siblings = 07, CPU #6 initialized CPU7: stack_base 002c0000, stack_end 002c0ff8 Asserting INIT. Waiting for send to finish... +Deasserting INIT. Waiting for send to finish... +#startup loops: 2. Sending STARTUP #1 to 23. After apic_write. Startup point 1. Waiting for send to finish... +Sending STARTUP #2 to 23. After apic_write. Startup point 1. Waiting for send to finish... +After Startup. Initializing CPU #7 Waiting for 1 CPUS to stop CPU: vendor AMD device 600f12 CPU: family 15, model 01, stepping 02 Model 15 Init. Setting up local apic... apic_id: 0x17 done. siblings = 07, CPU #7 initialized All AP CPUs stopped (1625 loops) CPU1: stack: 002c6000 - 002c7000, lowest used address 002c6d98, stack used: 616 bytes CPU2: stack: 002c5000 - 002c6000, lowest used address 002c5d98, stack used: 616 bytes CPU3: stack: 002c4000 - 002c5000, lowest used address 002c4d98, stack used: 616 bytes CPU4: stack: 002c3000 - 002c4000, lowest used address 002c3d98, stack used: 616 bytes CPU5: stack: 002c2000 - 002c3000, lowest used address 002c2d98, stack used: 616 bytes CPU6: stack: 002c1000 - 002c2000, lowest used address 002c1d98, stack used: 616 bytes CPU7: stack: 002c0000 - 002c1000, lowest used address 002c0d98, stack used: 616 bytes CPU_CLUSTER: 0 init 519835 usecs PCI: 00:18.0 init PCI: 00:18.0 init 1663 usecs PCI: 00:18.1 init PCI: 00:18.1 init 1665 usecs PCI: 00:18.2 init PCI: 00:18.2 init 1663 usecs PCI: 00:18.3 init PCI: 00:18.3 init 1663 usecs PCI: 00:18.4 init PCI: 00:18.4 init 1663 usecs PCI: 00:18.5 init PCI: 00:18.5 init 1663 usecs PCI: 00:00.0 init PCI: 00:00.0 init 1663 usecs PCI: 00:11.0 init AHCI controller IOMEM base: 0xE0508000, IRQ: 0x0 Number of Ports: 0x4, Port implemented(bit map): 0xf AHCI/RAID controller initialized PCI: 00:11.0 init 13692 usecs PCI: 00:14.0 init PCI: 00:14.0 init 1664 usecs PCI: 00:14.3 init SB800 - Late.c - lpc_init - Start. RTC Init SB800 - Late.c - lpc_init - End. PCI: 00:14.3 init 8666 usecs PCI: 01:05.0 init PCI: 01:05.0 init 1664 usecs PCI: 01:05.1 init PCI: 01:05.1 init 1664 usecs PCI: 02:00.0 init PCI: 02:00.0 init 1663 usecs PCI: 02:00.1 init PCI: 02:00.1 init 1664 usecs PCI: 03:00.0 init PCI: 03:00.0 init 1664 usecs PNP: 002e.2 init PNP: 002e.2 init 1578 usecs PNP: 002e.5 init PNP: 002e.5 init 1577 usecs PCI: 05:00.0 init PCI: 05:00.0 init 1664 usecs Devices initialized Show all devs...After init. Root Device: enabled 1 CPU_CLUSTER: 0: enabled 1 APIC: 10: enabled 1 DOMAIN: 0000: enabled 1 PCI: 00:18.0: enabled 1 PCI: 00:00.0: enabled 1 PCI: 00:01.0: enabled 1 PCI: 00:02.0: enabled 0 PCI: 00:03.0: enabled 0 PCI: 00:04.0: enabled 0 PCI: 00:05.0: enabled 0 PCI: 00:06.0: enabled 0 PCI: 00:07.0: enabled 0 PCI: 00:08.0: enabled 0 PCI: 00:09.0: enabled 1 PCI: 00:0a.0: enabled 1 PCI: 00:11.0: enabled 1 PCI: 00:12.0: enabled 1 PCI: 00:12.2: enabled 1 PCI: 00:13.0: enabled 1 PCI: 00:13.2: enabled 1 PCI: 00:14.0: enabled 1 I2C: 00:50: enabled 1 I2C: 00:51: enabled 1 I2C: 00:52: enabled 1 I2C: 00:53: enabled 1 PCI: 00:14.1: enabled 0 PCI: 00:14.2: enabled 1 PCI: 00:14.3: enabled 1 PNP: 002e.0: enabled 0 PNP: 002e.1: enabled 0 PNP: 002e.2: enabled 1 PNP: 002e.3: enabled 1 PNP: 002e.5: enabled 1 PNP: 002e.6: enabled 0 PNP: 002e.7: enabled 0 PNP: 002e.8: enabled 0 PNP: 002e.9: enabled 0 PNP: 002e.a: enabled 1 PNP: 002e.b: enabled 1 PCI: 00:14.4: enabled 0 PCI: 00:14.5: enabled 1 PCI: 00:14.6: enabled 0 PCI: 00:15.0: enabled 1 PCI: 00:15.1: enabled 1 PCI: 00:15.2: enabled 1 PCI: 00:15.3: enabled 1 PCI: 00:16.0: enabled 1 PCI: 00:16.2: enabled 1 PCI: 00:18.1: enabled 1 PCI: 00:18.2: enabled 1 PCI: 00:18.3: enabled 1 PCI: 00:18.4: enabled 1 PCI: 00:18.5: enabled 1 APIC: 11: enabled 1 APIC: 12: enabled 1 APIC: 13: enabled 1 APIC: 14: enabled 1 APIC: 15: enabled 1 APIC: 16: enabled 1 APIC: 17: enabled 1 PCI: 01:05.0: enabled 1 PCI: 01:05.1: enabled 1 PCI: 02:00.0: enabled 1 PCI: 02:00.1: enabled 1 PCI: 03:00.0: enabled 1 PCI: 05:00.0: enabled 1 BS: BS_DEV_INIT times (us): entry 0 run 771270 exit 0 Re-Initializing CBMEM area to 0xbffe0000 Initializing CBMEM area to 0xbffe0000 (131072 bytes) dword=bffe0000 nvram_pos=f8, dword>>(8*i)=0 nvram_pos=f9, dword>>(8*i)=0 nvram_pos=fa, dword>>(8*i)=fe nvram_pos=fb, dword>>(8*i)=bf Adding CBMEM entry as no. 1 Moving GDT to bffe0200...ok BS: BS_POST_DEVICE times (us): entry 25497 run 0 exit 0 BS: BS_OS_RESUME_CHECK times (us): entry 0 run 0 exit 0 High Tables Base is bffe0000. agesawrapper_amdinitlate: AmdLateParamsPtr = 20040 In agesawrapper_amdinitlate, AGESA generated ACPI tables: DmiTable:00000000 AcpiPstate: 00020114 AcpiSrat:00000000 AcpiSlit:00000000 Mce:00021ec4 Cmc:00021f86 Alib:00000000 Writing IRQ routing tables to 0xf0000...write_pirq_routing_table done. Adding CBMEM entry as no. 2 Writing IRQ routing tables to 0xbffe0400...write_pirq_routing_table done. PIRQ table: 48 bytes. Wrote the mp table end at: 000f0410 - 000f05bc Adding CBMEM entry as no. 3 Wrote the mp table end at: bffe1410 - bffe15bc MP table: 444 bytes. Adding CBMEM entry as no. 4 ACPI: Writing ACPI tables at bffe2400... ACPI: * DSDT at bffe24c8 ACPI: * DSDT @ bffe24c8 Length 27af ACPI: * FACS at bffe4c78 ACPI: * FADT at bffe4cb8 ACPI_BLK_BASE: 0x0800 ACPI: added table 1/32, length now 40 ACPI: * HPET at bffe4db0 ACPI: added table 2/32, length now 44 ACPI: * MADT at bffe4de8 ACPI: added table 3/32, length now 48 ACPI: added table 4/32, length now 52 ACPI: * SRAT at bffe5058 AGESA SRAT table NULL. Skipping. ACPI: * SLIT at bffe5058 AGESA SLIT table NULL. Skipping. ACPI: * AGESA ALIB SSDT at bffe5060 AGESA ALIB SSDT table NULL. Skipping. ACPI: * AGESA SSDT Pstate at bffe5060 ACPI: added table 5/32, length now 56 ACPI: * coreboot TOM SSDT2 at bffe6780 ACPI: added table 6/32, length now 60 ACPI: done. ACPI tables: 17349 bytes. Adding CBMEM entry as no. 5 smbios_write_tables: bffed800 Root Device (ASUS M5A88-V) CPU_CLUSTER: 0 (AMD FAM15 Root Complex) APIC: 10 (AMD CPU Family 15h) DOMAIN: 0000 (AMD FAM15 Root Complex) PCI: 00:18.0 (AMD FAM15 Northbridge) PCI: 00:00.0 (ATI RS780) PCI: 00:01.0 (ATI RS780) PCI: 00:02.0 (ATI RS780) PCI: 00:03.0 (ATI RS780) PCI: 00:04.0 (ATI RS780) PCI: 00:05.0 (ATI RS780) PCI: 00:06.0 (ATI RS780) PCI: 00:07.0 (ATI RS780) PCI: 00:08.0 (ATI RS780) PCI: 00:09.0 (ATI RS780) PCI: 00:0a.0 (ATI RS780) PCI: 00:11.0 (ATI SB800) PCI: 00:12.0 (ATI SB800) PCI: 00:12.2 (ATI SB800) PCI: 00:13.0 (ATI SB800) PCI: 00:13.2 (ATI SB800) PCI: 00:14.0 (ATI SB800) I2C: 00:50 (unknown) I2C: 00:51 (unknown) I2C: 00:52 (unknown) I2C: 00:53 (unknown) PCI: 00:14.1 (ATI SB800) PCI: 00:14.2 (ATI SB800) PCI: 00:14.3 (ATI SB800) PNP: 002e.0 (ITE IT8721F Super I/O) PNP: 002e.1 (ITE IT8721F Super I/O) PNP: 002e.2 (ITE IT8721F Super I/O) PNP: 002e.3 (ITE IT8721F Super I/O) PNP: 002e.5 (ITE IT8721F Super I/O) PNP: 002e.6 (ITE IT8721F Super I/O) PNP: 002e.7 (ITE IT8721F Super I/O) PNP: 002e.8 (ITE IT8721F Super I/O) PNP: 002e.9 (ITE IT8721F Super I/O) PNP: 002e.a (ITE IT8721F Super I/O) PNP: 002e.b (ITE IT8721F Super I/O) PCI: 00:14.4 (ATI SB800) PCI: 00:14.5 (ATI SB800) PCI: 00:14.6 (ATI SB800) PCI: 00:15.0 (ATI SB800) PCI: 00:15.1 (ATI SB800) PCI: 00:15.2 (ATI SB800) PCI: 00:15.3 (ATI SB800) PCI: 00:16.0 (ATI SB800) PCI: 00:16.2 (ATI SB800) PCI: 00:18.1 (AMD FAM15 Northbridge) PCI: 00:18.2 (AMD FAM15 Northbridge) PCI: 00:18.3 (AMD FAM15 Northbridge) PCI: 00:18.4 (AMD FAM15 Northbridge) PCI: 00:18.5 (AMD FAM15 Northbridge) APIC: 11 (unknown) APIC: 12 (unknown) APIC: 13 (unknown) APIC: 14 (unknown) APIC: 15 (unknown) APIC: 16 (unknown) APIC: 17 (unknown) PCI: 01:05.0 (unknown) PCI: 01:05.1 (unknown) PCI: 02:00.0 (unknown) PCI: 02:00.1 (unknown) PCI: 03:00.0 (unknown) PCI: 05:00.0 (unknown) SMBIOS tables: 300 bytes. Adding CBMEM entry as no. 6 Writing table forward entry at 0x00000500 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 5fdf Table forward entry ends at 0x00000528. ... aligned to 0x00001000 Writing coreboot table at 0xbffee000 rom_table_end = 0xbffee000 ... aligned to 0xbfff0000 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES 1. 0000000000001000-000000000009ffff: RAM 2. 00000000000c0000-00000000bffdffff: RAM 3. 00000000bffe0000-00000000bfffffff: CONFIGURATION TABLES 4. 00000000c0000000-00000000dfffffff: RESERVED 5. 00000000f8000000-00000000fbffffff: RESERVED 6. 0000000100000000-0000000417ffffff: RAM Wrote coreboot table at: bffee000, 0x1e4 bytes, checksum eb01 coreboot table: 508 bytes. Multiboot Information structure has been written. FREE SPACE 0. bfff6000 0000a000 GDT 1. bffe0200 00000200 IRQ TABLE 2. bffe0400 00001000 SMP TABLE 3. bffe1400 00001000 ACPI 4. bffe2400 0000b400 SMBIOS 5. bffed800 00000800 COREBOOT 6. bffee000 00008000 BS: BS_WRITE_TABLES times (us): entry 0 run 390901 exit 0 Loading segment from rom address 0xffcc8e38 code (compression=1) New segment dstaddr 0xe5c8c memsize 0x1a374 srcaddr 0xffcc8e70 filesize 0xd8f1 (cleaned up) New segment addr 0xe5c8c size 0x1a374 offset 0xffcc8e70 filesize 0xd8f1 Loading segment from rom address 0xffcc8e54 Entry Point 0x000fd50b Loading Segment: addr: 0x00000000000e5c8c memsz: 0x000000000001a374 filesz: 0x000000000000d8f1 lb: [0x0000000000200000, 0x0000000000388038) Post relocation: addr: 0x00000000000e5c8c memsz: 0x000000000001a374 filesz: 0x000000000000d8f1 using LZMA [ 0x000e5c8c, 00100000, 0x00100000) <- ffcc8e70 dest 000e5c8c, end 00100000, bouncebuffer bfccff90 Loaded segments BS: BS_PAYLOAD_LOAD times (us): entry 0 run 81771 exit 0 Jumping to boot code at 000fd50b CPU0: stack: 002c7000 - 002c8000, lowest used address 002c79dc, stack used: 1572 bytes entry = 0x000fd50b lb_start = 0x00200000 lb_size = 0x00188038 adjust = 0xbfc57fc8 buffer = 0xbfccff90 elf_boot_notes = 0x002ba338 adjusted_boot_notes = 0xbff12300 Start bios (version rel-1.7.2-143-gc02c219-20130704_224503-DarkRain) Found mainboard ASUS M5A88-V Relocating init from 0x000e6d61 to 0xbffc5810 (size 42791) Found CBFS header at 0xfffffbf0 CPU Mhz=3103 Found 30 PCI devices (max PCI bus is 05) Copying PIR from 0xbffe0400 to 0x000f1460 Copying MPTABLE from 0xbffe1400/bffe1410 to 0x000f12a0 Copying ACPI RSDP from 0xbffe2400 to 0x000f1280 Copying SMBIOS entry point from 0xbffed800 to 0x000f1260 Using pmtimer, ioport 0x808, freq 3579 kHz Scan for VGA option rom OHCI init on dev 00:16.0 (regs=0xe0507000) OHCI init on dev 00:14.5 (regs=0xe0506000) OHCI init on dev 00:13.0 (regs=0xe0505000) OHCI init on dev 00:12.0 (regs=0xe0504000) Found 0 lpt ports Found 2 serial ports ATA controller 1 at 2410/2420/0 (irq 0 dev 201) ATA controller 2 at 2418/2424/0 (irq 0 dev 201) AHCI controller at 11.0, iobase e0508000, irq 0 Searching bootorder for: /pci@i0cf8/*@11/drive@0/disk@0 AHCI/0: registering: "AHCI/0: Corsair Force GT ATA-8 Hard-Disk (111 GiBytes)" PS2 keyboard initialized Searching bootorder for: /pci@i0cf8/*@11/drive@1/disk@0 AHCI/1: registering: "AHCI/1: WDC WD20EARX-00PASB0 ATA-8 Hard-Disk (1863 GiBytes)" All threads complete. Scan for option roms Press F12 for boot menu. Searching bootorder for: HALT drive 0x000f11d0: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=234441648 drive 0x000f1180: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=-387938128 Space available for UMB: c0000-ee000, f0000-f1180 Returned 65536 bytes of ZoneHigh e820 map has 7 items: 0: 0000000000000000 - 000000000009fc00 = 1 RAM 1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED 2: 00000000000f0000 - 0000000000100000 = 2 RESERVED 3: 0000000000100000 - 00000000bffe0000 = 1 RAM 4: 00000000bffe0000 - 00000000e0000000 = 2 RESERVED 5: 00000000f8000000 - 00000000fc000000 = 2 RESERVED 6: 0000000100000000 - 0000000418000000 = 1 RAM enter handle_19: NULL Booting from Hard Disk... Booting from 0000:7c00 Press any key to continue. Press any key to continue. Press any key to continue. Press any key to continue. Press any key to continue. Press any key to continue.