Thanks Lance. I have tried with just the probe connected and that works fine. It appears to be caused by the debugger connecting to the target which makes me believe it is possibly jtag related and we may have a board fault.

 

From: Lance Zhao <lance.zhao@gmail.com>
Sent: 13 March 2019 15:09
To: Perkins, Graham (GB) <Graham.Perkins@cubic.com>
Cc: coreboot@coreboot.org
Subject: Re: [coreboot] Coreboot hang when under control of Intel System Debugger

 

CAUTION: Email originated from outside of Cubic.

 

The time I am using XDP on bay trail platform it was fine, but i was not using coreboot then. What about you don't run any system debuger, just simply hook up xdp to see the issue still there or not? If so, maybe some xdp config itself.

 

 

On Wed, Mar 13, 2019, 7:33 AM Perkins, Graham (GB) <Graham.Perkins@cubic.com> wrote:

Hello,

I would be grateful for some advice on the problem described below.

 

I have coreboot running successfully on our own hardware based around the Intel Atom E3805. Recently I wanted to debug our boot process to determine the settings of some PCU iLB Low Pin Count (LPC) Bridge PCI Configuration Registers. I have the Intel System Debugger connect via the Itel ITP XDP BR3 probe. If I simply run coreboot from the debugger it hangs. I cannot pause the debugger since the target is reported as still running (reported in its debug logs).

 

The console log extract is:

 

============= PEIM FSP  (VLYVIEW0 0x00000304) =============

Register PPI Notify: DCD0BE23-9586-40F4-B643-06522CED4EDE

Install PPI: 8C8CE578-8A3D-4F1C-9935-896185C32DD3

Install PPI: 5473C07A-3DCB-4DCA-BD6F-1E9689E7349A

The 0th FV start address is 0x000FFFE0400, size is 0x00017C00, handle is 0x0

Register PPI Notify: 49EDB1C1-BF21-4761-BB12-EB0031AABB39

Register PPI Notify: EA7CA24B-DED5-4DAD-A389-BF827E8F9B38

Install PPI: B9E0ABFE-5979-4914-977F-6DEE78C278A6

Install PPI: DBE23AA9-A345-4B97-85B6-B226F1617389

 

þInstall PPI: 06E81C58-4AD7-44BC-8390-F10265F72480

Install PPI: 01F34D25-4DE2-23AD-3FF3-36353FF323F1

 

Install PPI: 49EDB1C1-BF21-4761-BB12-EB0031AABB39

Notify: PPI Guid: 49EDB1C1-BF21-4761-BB12-EB0031AABB39, Peim notify entry point: FFFE0FD4

The 1th FV start address is 0x000FFFB0000, size is 0x0002F400, handle is 0xFFFB0000

 

øInstall PPI: A55D6970-1306-440C-8C72-8F51FAFB2926

 

þPcdMrcInitTsegSize = 8

PcdMrcInitMmioSize = 800

PcdMrcInitSPDAddr1 = A0

PcdMrcInitSPDAddr2 = A2

Setting BootMode to 0

Install PPI: 1F4C6F90-B06B-48D8-A201-BAE5F1CD7D56

Register PPI Notify: F894643D-C449-42D1-8EA8-85BDD8C65BDE

About to call MrcInit();

BayleyBay Platform Type

RID = 0x11.

Reg_EFF_DualCH_EN = 0x40030040.

CurrentMrcData.BootMode = 4

Configuring Memory Start...

 

Without using the debugger everything is fine:

 

============= PEIM FSP  (VLYVIEW0 0x00000304) =============

Register PPI Notify: DCD0BE23-9586-40F4-B643-06522CED4EDE

Install PPI: 8C8CE578-8A3D-4F1C-9935-896185C32DD3

Install PPI: 5473C07A-3DCB-4DCA-BD6F-1E9689E7349A

The 0th FV start address is 0x000FFFE0400, size is 0x00017C00, handle is 0x0

Register PPI Notify: 49EDB1C1-BF21-4761-BB12-EB0031AABB39

Register PPI Notify: EA7CA24B-DED5-4DAD-A389-BF827E8F9B38

Install PPI: B9E0ABFE-5979-4914-977F-6DEE78C278A6

Install PPI: DBE23AA9-A345-4B97-85B6-B226F1617389

 

þInstall PPI: 06E81C58-4AD7-44BC-8390-F10265F72480

Install PPI: 01F34D25-4DE2-23AD-3FF3-36353FF323F1

 

Install PPI: 49EDB1C1-BF21-4761-BB12-EB0031AABB39

Notify: PPI Guid: 49EDB1C1-BF21-4761-BB12-EB0031AABB39, Peim notify entry point: FFFE0FD4

The 1th FV start address is 0x000FFFB0000, size is 0x0002F400, handle is 0xFFFB0000

 

ðInstall PPI: A55D6970-1306-440C-8C72-8F51FAFB2926

 

þPcdMrcInitTsegSize = 8

PcdMrcInitMmioSize = 800

PcdMrcInitSPDAddr1 = A0

PcdMrcInitSPDAddr2 = A2

Setting BootMode to 0

Install PPI: 1F4C6F90-B06B-48D8-A201-BAE5F1CD7D56

Register PPI Notify: F894643D-C449-42D1-8EA8-85BDD8C65BDE

About to call MrcInit();

BayleyBay Platform Type

RID = 0x11.

Reg_EFF_DualCH_EN = 0x40030040.

CurrentMrcData.BootMode = 4

Configuring Memory Start...

START_RMT:

                         RxDqLeft RxDqRight RxVLow RxVHigh TxDqLeft TxDqRight CmdLeft CmdRight

------------------------------------------------------------------------------------------------

Channel 0 Rank 0         -23       24       -24     16     -27       28          0       0

STOP_RMT:

CMD module is per channel only and without Rank differentiation

Configuring Memory End

UpperTotalMemory =  0x80000000

dBMBOUND         =  0x80000000

dBMBOUNDHI       =  0x80000000

dGFXBase         =  0x7BE00000

dTSegBase        =  0x7B000000

Save MRC params.

 

Coreboot is version coreboot-4.5

Intel FSP is Baytrail_FSP_Gold4

 

I realise I am in the Intel FSP so do not think it is a direct coreboot problem but has anybody got a similar debug setup and can confirm it works? If it should work maybe we have a board fault in the jtag area. It just seems weird at this point.

 

Many thanks,

Graham Perkins.

 

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