Index: cbv2/src/cpu/amd/sc520/sc520.c
===================================================================
--- cbv2.orig/src/cpu/amd/sc520/sc520.c
+++ cbv2/src/cpu/amd/sc520/sc520.c
@@ -82,21 +82,6 @@ static const struct pci_driver cpu_drive
 
 #define BRIDGE_IO_MASK (IORESOURCE_IO | IORESOURCE_MEM)
 
-static void pci_domain_read_resources(device_t dev)
-{
-        struct resource *resource;
-  printk_spew("%s\n", __func__);
-        /* Initialize the system wide io space constraints */
-        resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0,0));
-        resource->limit = 0xffffUL;
-        resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
-
-        /* Initialize the system wide memory resources constraints */
-        resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1,0));
-        resource->limit = 0xffffffffULL;
-        resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
-}
-
 static void ram_resource(device_t dev, unsigned long index,
         unsigned long basek, unsigned long sizek)
 {
@@ -184,14 +169,6 @@ static void pci_domain_set_resources(dev
 	assign_resources(&dev->link[0]);
 }
 
-static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max)
-{
-  printk_spew("%s\n", __func__);
-        max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max);
-        return max;
-}
-
-
 #if 0
 void sc520_enable_resources(device_t dev) {
 
@@ -219,7 +196,7 @@ static struct device_operations pci_doma
 	 * If enable_resources is set to the generic enable_resources
 	 * function the whole thing will hang in an endless loop on
 	 * the ts5300. If this is really needed on another platform,
-	 * something is conceptionally wrong.
+	 * something is conceptually wrong.
 	 */
         .enable_resources = 0, //enable_resources,
         .init             = 0,
Index: cbv2/src/cpu/ppc/ppc4xx/pci_domain.c
===================================================================
--- cbv2.orig/src/cpu/ppc/ppc4xx/pci_domain.c
+++ cbv2/src/cpu/ppc/ppc4xx/pci_domain.c
@@ -7,27 +7,6 @@
 #include <device/pci_ids.h>
 #include <console/console.h>
 
-static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max)
-{
-	max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max);
-	return max;
-}
-
-static void pci_domain_read_resources(device_t dev)
-{
-	struct resource *resource;
-
-	/* Initialize the system wide io space constraints */
-	resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0,0));
-	resource->limit = 0xffffUL;
-	resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
-
-	/* Initialize the system wide memory resources constraints */
-	resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1,0));
-	resource->limit = 0xffffffffULL;
-	resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
-}
-
 static void ram_resource(device_t dev, unsigned long index,
         unsigned long basek, unsigned long sizek)
 {
Index: cbv2/src/northbridge/motorola/mpc107/mpc107_northbridge.c
===================================================================
--- cbv2.orig/src/northbridge/motorola/mpc107/mpc107_northbridge.c
+++ cbv2/src/northbridge/motorola/mpc107/mpc107_northbridge.c
@@ -16,7 +16,7 @@
  * be large enough to hold all expected resources for all PCI
  * devices.
  */
-static void pci_domain_read_resources(device_t dev)
+static void mpc107_domain_read_resources(device_t dev)
 {
 	struct resource *resource;
 
@@ -101,15 +101,8 @@ static void pci_domain_set_resources(dev
 	assign_resources(&dev->link[0]);
 }
 
-
-static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max)
-{
-	max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max);
-	return max;
-}
-
 static struct device_operations pci_domain_ops = {
-	.read_resources	  = pci_domain_read_resources,
+	.read_resources	  = mpc107_domain_read_resources,
 	.set_resources	  = pci_domain_set_resources,
 	.enable_resources = enable_childrens_resources,
 	.init		  = 0,
Index: cbv2/src/northbridge/via/cn700/northbridge.c
===================================================================
--- cbv2.orig/src/northbridge/via/cn700/northbridge.c
+++ cbv2/src/northbridge/via/cn700/northbridge.c
@@ -97,27 +97,6 @@ static const struct pci_driver memctrl_d
 	.device = PCI_DEVICE_ID_VIA_CN700_MEMCTRL,
 };
 
-static void pci_domain_read_resources(device_t dev)
-{
-	struct resource *resource;
-
-	printk_spew("Entering cn700 pci_domain_read_resources.\n");
-
-	/* Initialize the system wide I/O space constraints. */
-	resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
-	resource->limit = 0xffffUL;
-	resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE |
-	    IORESOURCE_ASSIGNED;
-
-	/* Initialize the system wide memory resources constraints. */
-	resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
-	resource->limit = 0xffffffffULL;
-	resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE |
-	    IORESOURCE_ASSIGNED;
-
-	printk_spew("Leaving cn700 pci_domain_read_resources.\n");
-}
-
 static void ram_resource(device_t dev, unsigned long index,
 			 unsigned long basek, unsigned long sizek)
 {
@@ -223,14 +202,6 @@ static void pci_domain_set_resources(dev
 	assign_resources(&dev->link[0]);
 }
 
-static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max)
-{
-	printk_debug("Entering cn700 pci_domain_scan_bus.\n");
-
-	max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max);
-	return max;
-}
-
 static const struct device_operations pci_domain_ops = {
 	.read_resources   = pci_domain_read_resources,
 	.set_resources    = pci_domain_set_resources,
Index: cbv2/src/northbridge/via/vt8601/northbridge.c
===================================================================
--- cbv2.orig/src/northbridge/via/vt8601/northbridge.c
+++ cbv2/src/northbridge/via/vt8601/northbridge.c
@@ -45,23 +45,6 @@ static const struct pci_driver northbrid
 	.device = 0x0601, /* 0x8601 is the AGP bridge? */
 };
 
-#define BRIDGE_IO_MASK (IORESOURCE_IO | IORESOURCE_MEM)
-
-static void pci_domain_read_resources(device_t dev)
-{
-        struct resource *resource;
-
-        /* Initialize the system wide io space constraints */
-        resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0,0));
-        resource->limit = 0xffffUL;
-        resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
-
-        /* Initialize the system wide memory resources constraints */
-        resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1,0));
-        resource->limit = 0xffffffffULL;
-        resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
-}
-
 static void ram_resource(device_t dev, unsigned long index,
         unsigned long basek, unsigned long sizek)
 {
@@ -160,12 +143,6 @@ static void pci_domain_set_resources(dev
 	assign_resources(&dev->link[0]);
 }
 
-static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max)
-{
-        max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max);
-        return max;
-}
-
 static struct device_operations pci_domain_ops = {
         .read_resources   = pci_domain_read_resources,
         .set_resources    = pci_domain_set_resources,
Index: cbv2/src/northbridge/via/vt8623/northbridge.c
===================================================================
--- cbv2.orig/src/northbridge/via/vt8623/northbridge.c
+++ cbv2/src/northbridge/via/vt8623/northbridge.c
@@ -193,27 +193,6 @@ static const struct pci_driver vga_drive
 
 #define BRIDGE_IO_MASK (IORESOURCE_IO | IORESOURCE_MEM)
 
-static void pci_domain_read_resources(device_t dev)
-{
-        struct resource *resource;
-
-	printk_spew("Entering vt8623 pci_domain_read_resources.\n");
-
-        /* Initialize the system wide io space constraints */
-        resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0,0));
-        resource->limit = 0xffffUL;
-        resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE |
-		IORESOURCE_ASSIGNED;
-
-        /* Initialize the system wide memory resources constraints */
-        resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1,0));
-        resource->limit = 0xffffffffULL;
-        resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE |
-		IORESOURCE_ASSIGNED;
-
-	printk_spew("Leaving vt8623 pci_domain_read_resources.\n");
-}
-
 static void ram_resource(device_t dev, unsigned long index,
         unsigned long basek, unsigned long sizek)
 {
@@ -313,14 +292,6 @@ static void pci_domain_set_resources(dev
 	assign_resources(&dev->link[0]);
 }
 
-static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max)
-{
-	printk_spew("Entering vt8623 pci_domain_scan_bus.\n");
-
-        max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max);
-        return max;
-}
-
 static struct device_operations pci_domain_ops = {
         .read_resources   = pci_domain_read_resources,
         .set_resources    = pci_domain_set_resources,
Index: cbv2/src/northbridge/via/vx800/northbridge.c
===================================================================
--- cbv2.orig/src/northbridge/via/vx800/northbridge.c
+++ cbv2/src/northbridge/via/vx800/northbridge.c
@@ -69,27 +69,6 @@ static const struct pci_driver memctrl_d
 	.device = PCI_DEVICE_ID_VIA_VX855_MEMCTRL,
 };
 
-static void pci_domain_read_resources(device_t dev)
-{
-	struct resource *resource;
-
-	printk_spew("Entering vx800 pci_domain_read_resources.\n");
-
-	/* Initialize the system wide io space constraints */
-	resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
-	resource->limit = 0xffffUL;
-	resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE |
-	    IORESOURCE_ASSIGNED;
-
-	/* Initialize the system wide memory resources constraints */
-	resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
-	resource->limit = 0xffffffffULL;
-	resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE |
-	    IORESOURCE_ASSIGNED;
-
-	printk_spew("Leaving vx800 pci_domain_read_resources.\n");
-}
-
 static void ram_resource(device_t dev, unsigned long index,
 			 unsigned long basek, unsigned long sizek)
 {
@@ -195,14 +174,6 @@ if register with invalid value we set fr
 	assign_resources(&dev->link[0]);
 }
 
-static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max)
-{
-	printk_debug("Entering vx800 pci_domain_scan_bus.\n");
-
-	max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max);
-	return max;
-}
-
 static const struct device_operations pci_domain_ops = {
 	.read_resources = pci_domain_read_resources,
 	.set_resources = pci_domain_set_resources,
Index: cbv2/src/northbridge/ibm/cpc710/cpc710_northbridge.c
===================================================================
--- cbv2.orig/src/northbridge/ibm/cpc710/cpc710_northbridge.c
+++ cbv2/src/northbridge/ibm/cpc710/cpc710_northbridge.c
@@ -9,23 +9,6 @@
 #include <cpu/cpu.h>
 #include "chip.h"
 
-static void pci_domain_read_resources(device_t dev)
-{
-	struct resource *resource;
-
-	/* Initialize the system wide io space constraints */
-	resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
-	resource->base	= 0;
-	resource->limit = 0xffffUL;
-	resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
-
-	/* Initialize the system wide memory resources constraints */
-	resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
-	resource->base	= 0x80000000ULL;
-	resource->limit = 0xfeffffffULL; /* We can put pci resources in the system controll area */
-	resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
-}
-
 static void ram_resource(device_t dev, unsigned long index,
 	unsigned long basek, unsigned long sizek)
 {
@@ -53,13 +36,6 @@ static void pci_domain_set_resources(dev
 	assign_resources(&dev->link[0]);
 }
 
-
-static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max)
-{
-	max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max);
-	return max;
-}
-
 static struct device_operations pci_domain_ops = {
 	.read_resources	  = pci_domain_read_resources,
 	.set_resources	  = pci_domain_set_resources,
Index: cbv2/src/northbridge/ibm/cpc925/cpc925_northbridge.c
===================================================================
--- cbv2.orig/src/northbridge/ibm/cpc925/cpc925_northbridge.c
+++ cbv2/src/northbridge/ibm/cpc925/cpc925_northbridge.c
@@ -9,23 +9,6 @@
 #include <cpu/cpu.h>
 #include "chip.h"
 
-static void pci_domain_read_resources(device_t dev)
-{
-	struct resource *resource;
-
-	/* Initialize the system wide io space constraints */
-	resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
-	resource->base	= 0;
-	resource->limit = 0xffffUL;
-	resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
-
-	/* Initialize the system wide memory resources constraints */
-	resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
-	resource->base	= 0x80000000ULL;
-	resource->limit = 0xfeffffffULL; /* We can put pci resources in the system controll area */
-	resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
-}
-
 static void ram_resource(device_t dev, unsigned long index,
 	unsigned long basek, unsigned long sizek)
 {
@@ -53,13 +36,6 @@ static void pci_domain_set_resources(dev
 	assign_resources(&dev->link[0]);
 }
 
-
-static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max)
-{
-	max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max);
-	return max;
-}
-
 static struct device_operations pci_domain_ops = {
 	.read_resources	  = pci_domain_read_resources,
 	.set_resources	  = pci_domain_set_resources,
Index: cbv2/src/northbridge/intel/e7501/northbridge.c
===================================================================
--- cbv2.orig/src/northbridge/intel/e7501/northbridge.c
+++ cbv2/src/northbridge/intel/e7501/northbridge.c
@@ -9,23 +9,6 @@
 #include <bitops.h>
 #include "chip.h"
 
-static void pci_domain_read_resources(device_t dev)
-{
-        struct resource *resource;
-        unsigned reg;
-
-        /* Initialize the system wide io space constraints */
-        resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
-	resource->base = 0x400; //yhlu
-        resource->limit = 0xffffUL;
-        resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
-
-        /* Initialize the system wide memory resources constraints */
-        resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
-        resource->limit = 0xffffffffULL;
-        resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
-}
-
 static void ram_resource(device_t dev, unsigned long index,
         unsigned long basek, unsigned long sizek)
 {
@@ -155,12 +138,6 @@ static void pci_domain_set_resources(dev
 	assign_resources(&dev->link[0]);
 }
 
-static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max)
-{
-        max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max);
-        return max;
-}
-
 static struct device_operations pci_domain_ops = {
         .read_resources   = pci_domain_read_resources,
         .set_resources    = pci_domain_set_resources,
Index: cbv2/src/northbridge/intel/i855gme/northbridge.c
===================================================================
--- cbv2.orig/src/northbridge/intel/i855gme/northbridge.c
+++ cbv2/src/northbridge/intel/i855gme/northbridge.c
@@ -31,24 +31,6 @@
 #include <cpu/x86/cache.h>
 #include "chip.h"
 
-#define BRIDGE_IO_MASK (IORESOURCE_IO | IORESOURCE_MEM)
-
-static void pci_domain_read_resources(device_t dev)
-{
-        struct resource *resource;
-        unsigned reg;
-
-        /* Initialize the system wide io space constraints */
-        resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
-        resource->limit = 0xffffUL;
-        resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
-
-        /* Initialize the system wide memory resources constraints */
-        resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
-        resource->limit = 0xffffffffULL;
-        resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
-}
-
 static void ram_resource(device_t dev, unsigned long index,
         unsigned long basek, unsigned long sizek)
 {
@@ -156,12 +138,6 @@ static void pci_domain_set_resources(dev
 	assign_resources(&dev->link[0]);
 }
 
-static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max)
-{
-        max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max);
-        return max;
-}
-
 static struct device_operations pci_domain_ops = {
         .read_resources   = pci_domain_read_resources,
         .set_resources    = pci_domain_set_resources,
Index: cbv2/src/northbridge/via/cx700/northbridge.c
===================================================================
--- cbv2.orig/src/northbridge/via/cx700/northbridge.c
+++ cbv2/src/northbridge/via/cx700/northbridge.c
@@ -32,21 +32,6 @@
 #include "chip.h"
 #include "northbridge.h"
 
-static void pci_domain_read_resources(device_t dev)
-{
-	struct resource *resource;
-
-	/* Initialize the system wide io space constraints */
-	resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
-	resource->limit = 0xffffUL;
-	resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
-
-	/* Initialize the system wide memory resources constraints */
-	resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
-	resource->limit = 0xffffffffULL;
-	resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
-}
-
 static void ram_resource(device_t dev, unsigned long index,
 			 unsigned long basek, unsigned long sizek)
 {
@@ -146,12 +131,6 @@ static void pci_domain_set_resources(dev
 	assign_resources(&dev->link[0]);
 }
 
-static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max)
-{
-	max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max);
-	return max;
-}
-
 static struct device_operations pci_domain_ops = {
 	.read_resources	  = pci_domain_read_resources,
 	.set_resources	  = pci_domain_set_resources,
Index: cbv2/src/northbridge/amd/amdfam10/northbridge.c
===================================================================
--- cbv2.orig/src/northbridge/amd/amdfam10/northbridge.c
+++ cbv2/src/northbridge/amd/amdfam10/northbridge.c
@@ -341,7 +341,7 @@ static int reg_useable(u32 reg,device_t 
 		if (!dev)
 			continue;
 		for(link = 0; !res && (link < 8); link++) {
-			res = probe_resource(dev, 0x1000 + reg + (link<<16)); // 8 links, 0x1000 man f1,
+			res = probe_resource(dev, IOINDEX(0x1000 + reg, link));
 		}
 	}
 	result = 2;
@@ -385,7 +385,7 @@ static struct resource *amdfam10_find_io
 		reg = 0x110+ (index<<24) + (4<<20); // index could be 0, 255
 	}
 
-	resource = new_resource(dev, 0x1000 + reg + (link<<16));
+		resource = new_resource(dev, IOINDEX(0x1000 + reg, link));
 
 	return resource;
 }
@@ -421,7 +421,7 @@ static struct resource *amdfam10_find_me
 		reg = 0x110+ (index<<24) + (6<<20); // index could be 0, 63
 
 	}
-	resource = new_resource(dev, 0x1000 + reg + (link<<16));
+	resource = new_resource(dev, IOINDEX(0x1000 + reg, link));
 	return resource;
 }
 
@@ -447,8 +447,6 @@ static void amdfam10_link_read_bases(dev
 		resource->gran	= align;
 		resource->limit = 0xffffUL;
 		resource->flags = IORESOURCE_IO;
-		compute_allocate_resource(&dev->link[link], resource,
-					IORESOURCE_IO, IORESOURCE_IO);
 	}
 
 	/* Initialize the prefetchable memory constraints on the current bus */
@@ -460,9 +458,6 @@ static void amdfam10_link_read_bases(dev
 		resource->gran	= log2(HT_MEM_HOST_ALIGN);
 		resource->limit = 0xffffffffffULL;
 		resource->flags = IORESOURCE_MEM | IORESOURCE_PREFETCH;
-		compute_allocate_resource(&dev->link[link], resource,
-			IORESOURCE_MEM | IORESOURCE_PREFETCH,
-			IORESOURCE_MEM | IORESOURCE_PREFETCH);
 
 #if EXT_CONF_SUPPORT == 1
 		if((resource->index & 0x1fff) == 0x1110) { // ext
@@ -481,9 +476,6 @@ static void amdfam10_link_read_bases(dev
 		resource->gran	= log2(HT_MEM_HOST_ALIGN);
 		resource->limit = 0xffffffffffULL;
 		resource->flags = IORESOURCE_MEM;
-		compute_allocate_resource(&dev->link[link], resource,
-			IORESOURCE_MEM | IORESOURCE_PREFETCH,
-			IORESOURCE_MEM);
 
 #if EXT_CONF_SUPPORT == 1
 		if((resource->index & 0x1fff) == 0x1110) { // ext
@@ -541,19 +533,14 @@ static void amdfam10_set_resource(device
 
 	/* Get the register and link */
 	reg  = resource->index & 0xfff; // 4k
-	link = ( resource->index>> 16)& 0x7; // 8 links
+	link = IOINDEX_LINK(resource->index);
 
 	if (resource->flags & IORESOURCE_IO) {
-		compute_allocate_resource(&dev->link[link], resource,
-			IORESOURCE_IO, IORESOURCE_IO);
 
 		set_io_addr_reg(dev, nodeid, link, reg, rbase>>8, rend>>8);
 		store_conf_io_addr(nodeid, link, reg, (resource->index >> 24), rbase>>8, rend>>8);
 	}
 	else if (resource->flags & IORESOURCE_MEM) {
-		compute_allocate_resource(&dev->link[link], resource,
-			IORESOURCE_MEM | IORESOURCE_PREFETCH,
-			resource->flags & (IORESOURCE_MEM | IORESOURCE_PREFETCH));
 		set_mmio_addr_reg(nodeid, link, reg, (resource->index >>24), rbase>>8, rend>>8, sysconf.nodes) ;// [39:8]
 		store_conf_mmio_addr(nodeid, link, reg, (resource->index >>24), rbase>>8, rend>>8);
 	}
@@ -657,7 +644,7 @@ struct chip_operations northbridge_amd_a
 	.enable_dev = 0,
 };
 
-static void pci_domain_read_resources(device_t dev)
+static void amdfam10_domain_read_resources(device_t dev)
 {
 	struct resource *resource;
 	unsigned reg;
@@ -672,20 +659,20 @@ static void pci_domain_read_resources(de
 		/* Is this register allocated? */
 		if ((base & 3) != 0) {
 			unsigned nodeid, link;
-			device_t dev;
+			device_t reg_dev;
 			if(reg<0xc0) { // mmio
 				nodeid = (limit & 0xf) + (base&0x30);
 			} else { // io
 				nodeid =  (limit & 0xf) + ((base>>4)&0x30);
 			}
 			link   = (limit >> 4) & 7;
-			dev = __f0_dev[nodeid];
-			if (dev) {
-				/* Reserve the resource	 */
-				struct resource *resource;
-				resource = new_resource(dev, 0x1000 + reg + (link<<16));
-				if (resource) {
-					resource->flags = 1;
+			reg_dev = __f0_dev[nodeid];
+			if (reg_dev) {
+				/* Reserve the resource  */
+				struct resource *reg_resource;
+				reg_resource = new_resource(reg_dev, IOINDEX(0x1000 + reg, link));
+				if (reg_resource) {
+					reg_resource->flags = 1;
 				}
 			}
 		}
@@ -711,24 +698,16 @@ static void pci_domain_read_resources(de
 		resource->base	= 0x400;
 		resource->limit = 0xffffUL;
 		resource->flags = IORESOURCE_IO;
-		compute_allocate_resource(&dev->link[link], resource,
-			IORESOURCE_IO, IORESOURCE_IO);
 
 		/* Initialize the system wide prefetchable memory resources constraints */
 		resource = new_resource(dev, 1|(link<<2));
 		resource->limit = 0xfcffffffffULL;
 		resource->flags = IORESOURCE_MEM | IORESOURCE_PREFETCH;
-		compute_allocate_resource(&dev->link[link], resource,
-			IORESOURCE_MEM | IORESOURCE_PREFETCH,
-			IORESOURCE_MEM | IORESOURCE_PREFETCH);
 
 		/* Initialize the system wide memory resources constraints */
 		resource = new_resource(dev, 2|(link<<2));
 		resource->limit = 0xfcffffffffULL;
 		resource->flags = IORESOURCE_MEM;
-		compute_allocate_resource(&dev->link[link], resource,
-			IORESOURCE_MEM | IORESOURCE_PREFETCH,
-			IORESOURCE_MEM);
 	}
 #endif
 }
@@ -980,9 +959,6 @@ static void pci_domain_set_resources(dev
 		resource->flags |= IORESOURCE_ASSIGNED;
 		resource->flags &= ~IORESOURCE_STORED;
 		link = (resource>>2) & 3;
-		compute_allocate_resource(&dev->link[link], resource,
-			BRIDGE_IO_MASK, resource->flags & BRIDGE_IO_MASK);
-
 		resource->flags |= IORESOURCE_STORED;
 		report_resource_stored(dev, resource, "");
 
@@ -1142,7 +1118,7 @@ static void pci_domain_set_resources(dev
 	}
 }
 
-static u32 pci_domain_scan_bus(device_t dev, u32 max)
+static u32 amdfam10_domain_scan_bus(device_t dev, u32 max)
 {
 	u32 reg;
 	int i;
@@ -1192,11 +1168,11 @@ static u32 pci_domain_scan_bus(device_t 
 }
 
 static struct device_operations pci_domain_ops = {
-	.read_resources	  = pci_domain_read_resources,
+	.read_resources	  = amdfam10_domain_read_resources,
 	.set_resources	  = pci_domain_set_resources,
 	.enable_resources = enable_childrens_resources,
 	.init		  = 0,
-	.scan_bus	  = pci_domain_scan_bus,
+	.scan_bus	  = amdfam10_domain_scan_bus,
 #if MMCONF_SUPPORT_DEFAULT
 	.ops_pci_bus	  = &pci_ops_mmconf,
 #else
Index: cbv2/src/northbridge/intel/e7520/northbridge.c
===================================================================
--- cbv2.orig/src/northbridge/intel/e7520/northbridge.c
+++ cbv2/src/northbridge/intel/e7520/northbridge.c
@@ -28,30 +28,6 @@ static void ram_resource(device_t dev, u
 		IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED;
 }
 
-
-static void pci_domain_read_resources(device_t dev)
-{
-	struct resource *resource;
-
-	/* Initialize the system wide io space constraints */
-	resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0,0));
-	resource->base  = 0;
-	resource->size  = 0;
-	resource->align = 0;
-	resource->gran  = 0;
-	resource->limit = 0xffffUL;
-	resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
-
-	/* Initialize the system wide memory resources constraints */
-	resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1,0));
-	resource->base  = 0;
-	resource->size  = 0;
-	resource->align = 0;
-	resource->gran  = 0;
-	resource->limit = 0xffffffffUL;
-	resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
-}
-
 static void tolm_test(void *gp, struct device *dev, struct resource *new)
 {
 	struct resource **best_p = gp;
@@ -90,7 +66,7 @@ static void pci_domain_set_resources(dev
 
 #if 1
 	printk_debug("PCI mem marker = %x\n", pci_tolm);
-#endif	
+#endif
 	/* FIXME Me temporary hack */
 	if(pci_tolm > 0xe0000000)
 		pci_tolm = 0xe0000000;
@@ -122,7 +98,7 @@ static void pci_domain_set_resources(dev
 			remapbasek   = 0x3ff << 16;
 			remaplimitk  = 0 << 16;
 			remapoffsetk = 0 << 16;
-		} 
+		}
 		else {
 			/* The PCI memory hole overlaps memory
 			 * setup the remap window.
@@ -165,7 +141,7 @@ static void pci_domain_set_resources(dev
 			ram_resource(dev, 5, 4096*1024, tomk - 4*1024*1024);
 		}
 		if (remaplimitk >= remapbasek) {
-			ram_resource(dev, 6, remapbasek, 
+			ram_resource(dev, 6, remapbasek,
 				(remaplimitk + 64*1024) - remapbasek);
 		}
 
@@ -178,13 +154,10 @@ static void pci_domain_set_resources(dev
 	assign_resources(&dev->link[0]);
 }
 
-static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max)
+static u32 e7520_domain_scan_bus(device_t dev, u32 max)
 {
-	max = pci_scan_bus(&dev->link[0], 0, 0xff, max);
-	if (max > max_bus) {
-		max_bus = max;
-	}
-	return max;
+	max_bus = pci_domain_scan_bus(dev, max);
+	return max_bus;
 }
 
 static struct device_operations pci_domain_ops = {
@@ -192,7 +165,7 @@ static struct device_operations pci_doma
 	.set_resources    = pci_domain_set_resources,
 	.enable_resources = enable_childrens_resources,
 	.init             = 0,
-	.scan_bus         = pci_domain_scan_bus,
+	.scan_bus         = e7520_domain_scan_bus,
 	.ops_pci_bus      = &pci_cf8_conf1, /* Do we want to use the memory mapped space here? */
 };
 
Index: cbv2/src/northbridge/intel/e7525/northbridge.c
===================================================================
--- cbv2.orig/src/northbridge/intel/e7525/northbridge.c
+++ cbv2/src/northbridge/intel/e7525/northbridge.c
@@ -28,30 +28,6 @@ static void ram_resource(device_t dev, u
 		IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED;
 }
 
-
-static void pci_domain_read_resources(device_t dev)
-{
-	struct resource *resource;
-
-	/* Initialize the system wide io space constraints */
-	resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0,0));
-	resource->base  = 0;
-	resource->size  = 0;
-	resource->align = 0;
-	resource->gran  = 0;
-	resource->limit = 0xffffUL;
-	resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
-
-	/* Initialize the system wide memory resources constraints */
-	resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1,0));
-	resource->base  = 0;
-	resource->size  = 0;
-	resource->align = 0;
-	resource->gran  = 0;
-	resource->limit = 0xffffffffUL;
-	resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
-}
-
 static void tolm_test(void *gp, struct device *dev, struct resource *new)
 {
 	struct resource **best_p = gp;
@@ -90,7 +66,7 @@ static void pci_domain_set_resources(dev
 
 #if 1
 	printk_debug("PCI mem marker = %x\n", pci_tolm);
-#endif	
+#endif
 	/* FIXME Me temporary hack */
 	if(pci_tolm > 0xe0000000)
 		pci_tolm = 0xe0000000;
@@ -122,7 +98,7 @@ static void pci_domain_set_resources(dev
 			remapbasek   = 0x3ff << 16;
 			remaplimitk  = 0 << 16;
 			remapoffsetk = 0 << 16;
-		} 
+		}
 		else {
 			/* The PCI memory hole overlaps memory
 			 * setup the remap window.
@@ -160,12 +136,12 @@ static void pci_domain_set_resources(dev
 
 		/* Report the memory regions */
     		ram_resource(dev, 3,   0, 640);
-		ram_resource(dev, 4, 768, tolmk - 768);
+		ram_resource(dev, 4, 768, (tolmk - 768));
 		if (tomk > 4*1024*1024) {
 			ram_resource(dev, 5, 4096*1024, tomk - 4*1024*1024);
 		}
 		if (remaplimitk >= remapbasek) {
-			ram_resource(dev, 6, remapbasek, 
+			ram_resource(dev, 6, remapbasek,
 				(remaplimitk + 64*1024) - remapbasek);
 		}
 
@@ -178,13 +154,10 @@ static void pci_domain_set_resources(dev
 	assign_resources(&dev->link[0]);
 }
 
-static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max)
+static u32 e7525_domain_scan_bus(device_t dev, u32 max)
 {
-	max = pci_scan_bus(&dev->link[0], 0, 0xff, max);
-	if (max > max_bus) {
-		max_bus = max;
-	}
-	return max;
+	max_bus = pci_domain_scan_bus(dev, max);
+	return max_bus;
 }
 
 static struct device_operations pci_domain_ops = {
@@ -192,7 +165,7 @@ static struct device_operations pci_doma
 	.set_resources    = pci_domain_set_resources,
 	.enable_resources = enable_childrens_resources,
 	.init             = 0,
-	.scan_bus         = pci_domain_scan_bus,
+	.scan_bus         = e7525_domain_scan_bus,
 	.ops_pci_bus      = &pci_cf8_conf1, /* Do we want to use the memory mapped space here? */
 };
 
Index: cbv2/src/northbridge/intel/i3100/northbridge.c
===================================================================
--- cbv2.orig/src/northbridge/intel/i3100/northbridge.c
+++ cbv2/src/northbridge/intel/i3100/northbridge.c
@@ -49,30 +49,6 @@ static void ram_resource(device_t dev, u
 		IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED;
 }
 
-
-static void pci_domain_read_resources(device_t dev)
-{
-	struct resource *resource;
-
-	/* Initialize the system wide io space constraints */
-	resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0,0));
-	resource->base  = 0;
-	resource->size  = 0;
-	resource->align = 0;
-	resource->gran  = 0;
-	resource->limit = 0xffffUL;
-	resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
-
-	/* Initialize the system wide memory resources constraints */
-	resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1,0));
-	resource->base  = 0;
-	resource->size  = 0;
-	resource->align = 0;
-	resource->gran  = 0;
-	resource->limit = 0xffffffffUL;
-	resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
-}
-
 static void tolm_test(void *gp, struct device *dev, struct resource *new)
 {
 	struct resource **best_p = gp;
@@ -199,13 +175,10 @@ static void pci_domain_set_resources(dev
 	assign_resources(&dev->link[0]);
 }
 
-static u32 pci_domain_scan_bus(device_t dev, u32 max)
+static u32 i3100_domain_scan_bus(device_t dev, u32 max)
 {
-	max = pci_scan_bus(&dev->link[0], 0, 0xff, max);
-	if (max > max_bus) {
-		max_bus = max;
-	}
-	return max;
+	max_bus = pci_domain_scan_bus(dev, max);
+	return max_bus;
 }
 
 static struct device_operations pci_domain_ops = {
@@ -213,7 +186,7 @@ static struct device_operations pci_doma
 	.set_resources    = pci_domain_set_resources,
 	.enable_resources = enable_childrens_resources,
 	.init             = 0,
-	.scan_bus         = pci_domain_scan_bus,
+	.scan_bus         = i3100_domain_scan_bus,
 	.ops_pci_bus      = &pci_cf8_conf1, /* Do we want to use the memory mapped space here? */
 };
 
Index: cbv2/src/northbridge/intel/i82810/northbridge.c
===================================================================
--- cbv2.orig/src/northbridge/intel/i82810/northbridge.c
+++ cbv2/src/northbridge/intel/i82810/northbridge.c
@@ -52,27 +52,6 @@ static const struct pci_driver northbrid
 	.device	= 0x7120,
 };
 
-#define BRIDGE_IO_MASK (IORESOURCE_IO | IORESOURCE_MEM)
-
-static void pci_domain_read_resources(device_t dev)
-{
-	struct resource *resource;
-	unsigned reg;
-
-	/* Initialize the system wide io space constraints */
-	resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
-	resource->base = 0x400;
-	resource->limit = 0xffffUL;
-	resource->flags =
-	    IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
-
-	/* Initialize the system wide memory resources constraints */
-	resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
-	resource->limit = 0xffffffffULL;
-	resource->flags =
-	    IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
-}
-
 static void ram_resource(device_t dev, unsigned long index,
 			 unsigned long basek, unsigned long sizek)
 {
@@ -181,12 +160,6 @@ static void pci_domain_set_resources(dev
 	assign_resources(&dev->link[0]);
 }
 
-static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max)
-{
-	max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max);
-	return max;
-}
-
 static struct device_operations pci_domain_ops = {
 	.read_resources		= pci_domain_read_resources,
 	.set_resources		= pci_domain_set_resources,
Index: cbv2/src/northbridge/intel/i82830/northbridge.c
===================================================================
--- cbv2.orig/src/northbridge/intel/i82830/northbridge.c
+++ cbv2/src/northbridge/intel/i82830/northbridge.c
@@ -51,25 +51,6 @@ static struct pci_driver northbridge_dri
 	.device = 0x3575,
 };
 
-#define BRIDGE_IO_MASK (IORESOURCE_IO | IORESOURCE_MEM)
-
-static void pci_domain_read_resources(device_t dev)
-{
-	struct resource *resource;
-
-	/* Initialize the system wide I/O space constraints. */
-	resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
-	resource->limit = 0xffffUL;
-	resource->flags =
-	    IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
-
-	/* Initialize the system wide memory resources constraints. */
-	resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
-	resource->limit = 0xffffffffULL;
-	resource->flags =
-	    IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
-}
-
 static void ram_resource(device_t dev, unsigned long index,
 			 unsigned long basek, unsigned long sizek)
 {
@@ -158,12 +139,6 @@ static void pci_domain_set_resources(dev
 	assign_resources(&dev->link[0]);
 }
 
-static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max)
-{
-	max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max);
-	return max;
-}
-
 static struct device_operations pci_domain_ops = {
 	.read_resources		= pci_domain_read_resources,
 	.set_resources		= pci_domain_set_resources,
Index: cbv2/src/northbridge/intel/i855pm/northbridge.c
===================================================================
--- cbv2.orig/src/northbridge/intel/i855pm/northbridge.c
+++ cbv2/src/northbridge/intel/i855pm/northbridge.c
@@ -10,23 +10,6 @@
 #include <bitops.h>
 #include "chip.h"
 
-#define BRIDGE_IO_MASK (IORESOURCE_IO | IORESOURCE_MEM)
-
-static void pci_domain_read_resources(device_t dev)
-{
-        struct resource *resource;
-
-        /* Initialize the system wide io space constraints */
-        resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
-        resource->limit = 0xffffUL;
-        resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
-
-        /* Initialize the system wide memory resources constraints */
-        resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
-        resource->limit = 0xffffffffULL;
-        resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
-}
-
 static void ram_resource(device_t dev, unsigned long index,
         unsigned long basek, unsigned long sizek)
 {
@@ -123,12 +106,6 @@ static void pci_domain_set_resources(dev
 	assign_resources(&dev->link[0]);
 }
 
-static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max)
-{
-        max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max);
-        return max;
-}
-
 static struct device_operations pci_domain_ops = {
         .read_resources   = pci_domain_read_resources,
         .set_resources    = pci_domain_set_resources,
Index: cbv2/src/northbridge/intel/i945/northbridge.c
===================================================================
--- cbv2.orig/src/northbridge/intel/i945/northbridge.c
+++ cbv2/src/northbridge/intel/i945/northbridge.c
@@ -43,31 +43,6 @@ static void ram_resource(device_t dev, u
 	    IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED;
 }
 
-static void pci_domain_read_resources(device_t dev)
-{
-	struct resource *resource;
-
-	/* Initialize the system wide io space constraints */
-	resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
-	resource->base = 0;
-	resource->size = 0;
-	resource->align = 0;
-	resource->gran = 0;
-	resource->limit = 0xffffUL;
-	resource->flags =
-	    IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
-
-	/* Initialize the system wide memory resources constraints */
-	resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
-	resource->base = 0;
-	resource->size = 0;
-	resource->align = 0;
-	resource->gran = 0;
-	resource->limit = 0xffffffffUL;
-	resource->flags =
-	    IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
-}
-
 static void tolm_test(void *gp, struct device *dev, struct resource *new)
 {
 	struct resource **best_p = gp;
@@ -184,15 +159,10 @@ static void pci_domain_set_resources(dev
 #endif
 }
 
-static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max)
-{
-	max = pci_scan_bus(&dev->link[0], 0, 0xff, max);
 	/* TODO We could determine how many PCIe busses we need in
 	 * the bar. For now that number is hardcoded to a max of 64.
+	 * See e7525/northbridge.c for an example.
 	 */
-	return max;
-}
-
 static struct device_operations pci_domain_ops = {
 	.read_resources   = pci_domain_read_resources,
 	.set_resources    = pci_domain_set_resources,
Index: cbv2/src/northbridge/amd/gx1/northbridge.c
===================================================================
--- cbv2.orig/src/northbridge/amd/gx1/northbridge.c
+++ cbv2/src/northbridge/amd/gx1/northbridge.c
@@ -66,27 +66,6 @@ static const struct pci_driver northbrid
 	.device = PCI_DEVICE_ID_CYRIX_PCI_MASTER, 
 };
 
-
-
-#define BRIDGE_IO_MASK (IORESOURCE_IO | IORESOURCE_MEM)
-
-static void pci_domain_read_resources(device_t dev)
-{
-        struct resource *resource;
-
-	printk_spew("%s:%s()\n", NORTHBRIDGE_FILE, __func__);
-
-        /* Initialize the system wide io space constraints */
-        resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0,0));
-        resource->limit = 0xffffUL;
-        resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
-
-        /* Initialize the system wide memory resources constraints */
-        resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1,0));
-        resource->limit = 0xffffffffULL;
-        resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
-}
-
 static void ram_resource(device_t dev, unsigned long index,
         unsigned long basek, unsigned long sizek)
 {
@@ -187,12 +166,6 @@ static void pci_domain_set_resources(dev
 	assign_resources(&dev->link[0]);
 }
 
-static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max)
-{
-        max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max);
-        return max;
-}
-
 static struct device_operations pci_domain_ops = {
         .read_resources   = pci_domain_read_resources,
         .set_resources    = pci_domain_set_resources,
Index: cbv2/src/northbridge/amd/gx2/northbridge.c
===================================================================
--- cbv2.orig/src/northbridge/amd/gx2/northbridge.c
+++ cbv2/src/northbridge/amd/gx2/northbridge.c
@@ -356,25 +356,6 @@ static const struct pci_driver northbrid
 	.device = PCI_DEVICE_ID_NS_GX2,
 };
 
-#define BRIDGE_IO_MASK (IORESOURCE_IO | IORESOURCE_MEM)
-
-static void pci_domain_read_resources(device_t dev)
-{
-        struct resource *resource;
-
-	printk_spew("%s:%s()\n", NORTHBRIDGE_FILE, __func__);
-
-        /* Initialize the system wide io space constraints */
-        resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0,0));
-        resource->limit = 0xffffUL;
-        resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
-
-        /* Initialize the system wide memory resources constraints */
-        resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1,0));
-        resource->limit = 0xffffffffULL;
-        resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
-}
-
 static void ram_resource(device_t dev, unsigned long index,
         unsigned long basek, unsigned long sizek)
 {
@@ -468,12 +449,6 @@ static void pci_domain_set_resources(dev
 	assign_resources(&dev->link[0]);
 }
 
-static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max)
-{
-        max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max);
-        return max;
-}
-
 static struct device_operations pci_domain_ops = {
         .read_resources   = pci_domain_read_resources,
         .set_resources    = pci_domain_set_resources,
Index: cbv2/src/northbridge/amd/lx/northbridge.c
===================================================================
--- cbv2.orig/src/northbridge/amd/lx/northbridge.c
+++ cbv2/src/northbridge/amd/lx/northbridge.c
@@ -382,24 +382,6 @@ static const struct pci_driver northbrid
 	.device = PCI_DEVICE_ID_AMD_LXBRIDGE,
 };
 
-static void pci_domain_read_resources(device_t dev)
-{
-	struct resource *resource;
-	printk_spew(">> Entering northbridge.c: %s\n", __func__);
-
-	/* Initialize the system wide io space constraints */
-	resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
-	resource->limit = 0xffffUL;
-	resource->flags =
-	    IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
-
-	/* Initialize the system wide memory resources constraints */
-	resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
-	resource->limit = 0xffffffffULL;
-	resource->flags =
-	    IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
-}
-
 static void ram_resource(device_t dev, unsigned long index,
 			 unsigned long basek, unsigned long sizek)
 {
@@ -470,14 +452,6 @@ static void pci_domain_enable(device_t d
 	pci_set_method(dev);
 }
 
-static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max)
-{
-	printk_spew(">> Entering northbridge.c: %s\n", __func__);
-
-	max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max);
-	return max;
-}
-
 static struct device_operations pci_domain_ops = {
 	.read_resources = pci_domain_read_resources,
 	.set_resources = pci_domain_set_resources,
