Our board has intel skylake  I3-6100U  CPU

we use seabios as payload to boot Linux OS.

I only can turn on seabios serial debug port using memory mapped address 0xfe034000 ( please see following lspci -vv output)

but can't turn on serial console for choosing boot menu because seabios don't support 32bit MMIO address for sercon-port yet.

seabios only support 16bit address for sercon-port.

 

since our diplay port will be removed in production, we do need sercon-port for boot menu.

 

 

How to keep coreboot original uart address 0x3e8 in coreboot without map to 32bit MMIO address 0xfe034000? 

 

 

Thanks,

 

 

lspci -vv

00:19.0 Signal processing controller: Intel Corporation Sunrise Point-LP Serial IO UART Controller #2 (rev 21)
        Subsystem: Intel Corporation Sunrise Point-LP Serial IO UART Controller
        Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
        Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
        Latency: 0, Cache Line Size: 64 bytes
        Interrupt: pin A routed to IRQ 32
        Region 0: Memory at fe034000 (64-bit, non-prefetchable) [size=4K]
        Region 2: Memory at d1143000 (64-bit, non-prefetchable) [size=4K]
        Capabilities: <access denied>
        Kernel driver in use: intel-lpss
        Kernel modules: intel_lpss_pci