I am trying to implement CAR on VIA C3 / C7 cpu.
After DRAM initialization, resetting the CACHE and switching the stack to DRAM, the system will hang. How can i do? Any suggestions?
VIA C3/C7 cpu
64k L1 Data Cache, 64K L1 Instruction Cache
128K L2 Cache with 32-way set associativity
Thanks