From: firstname.lastname@example.org [mailto:email@example.com] On Behalf Of Marshall Buschman
Sent: Thursday, September 08, 2011 10:02 AM
Subject: Re: [coreboot] E350M1 does not POST
On 09/07/2011 11:38 AM, Marshall Buschman wrote:
I have access to an E350M1. I will test these patches tonight and report back with results.
On 09/07/2011 02:53 AM, She, Kerry wrote:
From: firstname.lastname@example.org [mailto:coreboot-
email@example.com] On Behalf Of firstname.lastname@example.org
Sent: Friday, August 19, 2011 12:37 AM
Subject: [coreboot] E350M1 does not POST
Upon booting, I get this:
you could try commit 0df0e14fb, that may or may not work, the
that broke fusion boards completely, apparently.
Thank you! I can confirm that 0df0e14fb works properly.
It looks like we have a regression. Is there some dependency on the
other patches that have not yet been committed?
Unfortunately git bisect is no help here because the commit which
the regression was a huge one.
It's important that large patches are broken down into a set of small
comprehensible patches, each with an explanatory commit message.
<<quote from git-bisect-lk2009.html documentation>>
sometimes "interesting" changes of behavior in the software are
introduced in some commits.
In fact people are specially interested in commits that introduce a
"bad" behavior, called a bug or a regression. They are interested in
these commits because a commit (hopefully) contains a very small set
of source code changes. And it's much easier to understand and
properly fix a problem when you only need to check a very small set of
changes, than when you don't know where look in the first place.
So to help people find commits that introduce a "bad" behavior, the
"git bisect" set of commands was invented.
Since commit 84cbce2 cause E350M1 not POST,
Following patches should resolve this regression problem, please see the
attachment in detail.
I have test it on a Persimmon mainboard,
anybody can have a test on E350M1?
I have tested your patch set, and it does make the E350M1 boot.
The bad news is there is now a delay of approximately 5 minutes and 20 seconds before any serial output is displayed.
The coreboot log is available at http://www.lucidmachines.com/coreboot/kerrypatches20110907.txt
Please let me know if I can assist further.
Thanks a lot,
I have a test based on commit 8679e52 with both F14 C0 and B0 processor on different persimmon mainboard,
But unfortunately I can’t reproduce the problem you have met.
Family14 Revision C0 processor(BSP Family_Model:00500f20)
Family14 Revision B0 processor(BSP Family_Model: 00500f10) is same as the one you use.
There is not much difference between E350M1 and persimmon code,
so I’m not sure whether the root cause is commit 84cbce2 or other commit, such as sb800 update etc.
Can you have a test base on commit 84cbce2 ?