Hi Nico. Thanks for the help.
I'm still trying to fix this problem.
Unfortunately, I don`t have direct contact to Intel:)
But, I'm not sure what the problem is in the FSP.

After many experiments, I really got to disable iGPU and run coreboot.

This works if we do not use GFXVT resources in the MCHBAR space for VT-d/VT-x (GFXVTBAR is not programmed).
Thus, "GFXVTBAR" should be removed from the soc_vtd_resources[] when VT-d is configured in
https://github.com/coreboot/coreboot/blob/master/src/soc/intel/skylake/include/soc/systemagent.h#L52

I tested it on VirtualBox (5.1.38_Ubuntur122592) + Ubuntu 18.04.1 as the guest OS.
3D acceleration works well with the nouveau driver on the host OS.

I think this is very useful if the coreboot will be used on skl/kbl processors without integrated graphics.

Can I add this as a patch to upstream?

There is another issue regarding vmx:
The legacy initialization code for vmx is located in the src/soc/intel/common/block/vmx directory.
This code has an "undefined reference to soc_fill_vmx_param".

In addition, the line "Enable VMX for virtualization" in the menu is duplicated.
Instead, the code in src/cpu/intel/common/common_init.c is now used.
https://review.coreboot.org/c/coreboot/+/29682

Can I remove legacy code?

Thanks!

// Regards,
// Max


ср, 10 апр. 2019 г. в 20:36, Nico Huber <nico.h@gmx.de>:
On 10.04.19 14:31, Maxim Poliakov wrote:
> But, in this case, the loading of the coreboot stops after running the
> FSP-S in ramstage.
>
> Please see logs: https://drive.yadro.com/s/3ocCtS3EemjyT5f

Last line (would have been easier if you'd have attached it btw.):

> POST: 0x93

This is POST_FSP_SILICON_INIT, so it stops whilst running FSP-S, not
after.

> Any ideas on this?

File a bug at github.com/IntelFsp/FSP. If you have any direct contact to
Intel, ask them for help or a blob with debug output.

> Has anyone tested Сhromebooks or other motherboards with Skylake/Kaby Lake
> processor when iGPU is turned off?

I didn't for my part.

Nico