coreboot-4.0-1914-g66ebaa9-dirty Sun Dec 18 19:38:55 CET 2011 starting... BSP Family_Model: 00100f63 *sysinfo range: [000cc000,000cf360] bsp_apicid = 00 cpu_init_detectedx = 00000000 cpuSetAMDMSR done Enter amd_ht_init() AMD_CB_EventNotify() event class: 02 event: 2005 data: 05 00 00 00 01 AMD_CB_EventNotify() event class: 05 event: 2006 data: 04 00 00 ff Exit amd_ht_init() cpuSetAMDPCI 00 done Prep FID/VID Node:00 F3x80: e600e681 F3x84: 80e641e6 F3xD4: c8810f24 F3xD8: 03001016 F3xDC: 0000532e core0 started: start_other_cores() init node: 00 cores: 01 Start other core - nodeid: 00 cores: 01 started ap apicid: corex: --- { APICID = 01 NODEID = 00 COREID = 01} --- *cp uASPe 0t1AMDMSR start eddo ne init_fidvid_ap(stage1) apicid: 01 FrIDsV7I8D0 _oena rlAyP_:s e0t1up () fam10_optimization() rs780_por_init sb700_early_setup() sb700_devices_por_init() sb700_devices_por_init(): SMBus Device, BDF:0-20-0 SMBus controller enabled, sb revision is A14 sb700_devices_por_init(): IDE Device, BDF:0-20-1 sb700_devices_por_init(): LPC Device, BDF:0-20-3 sb700_devices_por_init(): P2P Bridge, BDF:0-20-4 sb700_devices_por_init(): SATA Device, BDF:0-18-0 sb700_pmio_por_init() Begin FIDVID MSR 0xc0010071 0x30ba0083 0x48035c40 FIDVID on BSP, APIC_id: 00 BSP fid = 10600 Wait for AP stage 1: ap_apicid = 1 readback = 1010601 common_fid(packed) = 10600 common_fid = 10600 FID Change Node:00, F3xD4: c8810f26 End FIDVIDMSR 0xc0010071 0x30ba0083 0x44005c40 rs780_htinit cpu_ht_freq=0. rs780_htinit: HT1 mode ...WARM RESET... coreboot-4.0-1914-g66ebaa9-dirty Sun Dec 18 19:38:55 CET 2011 starting... BSP Family_Model: 00100f63 *sysinfo range: [000cc000,000cf360] bsp_apicid = 00 cpu_init_detectedx = 00000000 cpuSetAMDMSR done Enter amd_ht_init() AMD_CB_EventNotify() event class: 02 event: 2005 data: 05 00 00 00 01 AMD_CB_EventNotify() event class: 05 event: 2006 data: 04 00 00 ff Exit amd_ht_init() cpuSetAMDPCI 00 done Prep FID/VID Node:00 F3x80: e600e681 F3x84: 80e641e6 F3xD4: c8810f26 F3xD8: 03001016 F3xDC: 0000532e core0 started: start_other_cores() init node: 00 cores: 01 Start other core - nodeid: 00 cores: 01 started ap apicid: corex: --- { APICID = 01 NODEID = 00 COREID = 01} --- *cp uASPe t0A1MDMSR starte ddo ne init_fidvid_stage2 apicid: 01 rs780_early_setup() fam10_optimization() rs780_por_init sb700_early_setup() sb700_devices_por_init() sb700_devices_por_init(): SMBus Device, BDF:0-20-0 SMBus controller enabled, sb revision is A14 sb700_devices_por_init(): IDE Device, BDF:0-20-1 sb700_devices_por_init(): LPC Device, BDF:0-20-3 sb700_devices_por_init(): P2P Bridge, BDF:0-20-4 sb700_devices_por_init(): SATA Device, BDF:0-18-0 sb700_pmio_por_init() Begin FIDVID MSR 0xc0010071 0x30ba0083 0x44005c40 End FIDVIDMSR 0xc0010071 0x30ba0083 0x4400200d rs780_htinit cpu_ht_freq=0. rs780_htinit: HT1 mode fill_mem_ctrl() raminit_amdmct() raminit_amdmct begin: MAX_NODES_SUPPORTED: 8 Trying to initilize node 0... Node 0 is present... DIMMPresence: DIMMValid=4 DIMMPresence: DIMMPresent=4 DIMMPresence: RegDIMMPresent=0 DIMMPresence: DimmECCPresent=0 DIMMPresence: DimmPARPresent=0 DIMMPresence: Dimmx4Present=0 DIMMPresence: Dimmx8Present=4 DIMMPresence: Dimmx16Present=0 DIMMPresence: DimmPlPresent=0 DIMMPresence: DimmDRPresent=4 DIMMPresence: DimmQRPresent=0 DIMMPresence: DATAload[0]=2 DIMMPresence: MAload[0]=10 DIMMPresence: MAdimms[0]=1 DIMMPresence: DATAload[1]=0 DIMMPresence: MAload[1]=0 DIMMPresence: MAdimms[1]=0 DEBUG: DIMMPresence: ErrCode 0 DIMMPresence: Status 1000 DIMMPresence: ErrStatus 0 DIMMPresence: ErrCode 0 DIMMPresence: Done DCTInit_D: mct_DIMMPresence Done SPDCalcWidth: Status 1000 SPDCalcWidth: ErrStatus 0 SPDCalcWidth: ErrCode 0 SPDCalcWidth: Done DCTInit_D: mct_SPDCalcWidth Done SPDGetTCL_D: DIMMCASL 4 SPDGetTCL_D: DIMMAutoSpeed 4 SPDGetTCL_D: Status 1000 SPDGetTCL_D: ErrStatus 0 SPDGetTCL_D: ErrCode 0 SPDGetTCL_D: Done mct_AfterGetCLT AutoCycTiming: Status 1000 AutoCycTiming: ErrStatus 0 AutoCycTiming: ErrCode 0 AutoCycTiming: Done DCTInit_D: AutoCycTiming_D Done FOOOOO SPDSetBanks: CSPresent c SPDSetBanks: Status 1000 SPDSetBanks: ErrStatus 0 SPDSetBanks: ErrCode 0 SPDSetBanks: Done AfterStitch pDCTstat->NodeSysBase = 0 mct_AfterStitchMemory: pDCTstat->NodeSysLimit = 7fffff StitchMemory: Status 1000 StitchMemory: ErrStatus 0 StitchMemory: ErrCode 0 StitchMemory: Done InterleaveBanks_D: Status 1000 InterleaveBanks_D: ErrStatus 0 InterleaveBanks_D: ErrCode 0 InterleaveBanks_D: Done AutoConfig_D: DramControl: 2a06 AutoConfig_D: DramTimingLo: 90092 AutoConfig_D: DramConfigMisc: 0 AutoConfig_D: DramConfigMisc2: 0 AutoConfig_D: DramConfigLo: 8010000 AutoConfig_D: DramConfigHi: f48000b AutoConfig: Status 1000 AutoConfig: ErrStatus 0 AutoConfig: ErrCode 0 AutoConfig: Done DCTInit_D: AutoConfig_D Done DCTInit_D: PlatformSpec_D Done DCTInit_D: StartupDCT_D Trying to initilize node 1... Trying to initilize node 2... Trying to initilize node 3... Trying to initilize node 4... Trying to initilize node 5... Trying to initilize node 6... Trying to initilize node 7... mctAutoInitMCT_D: SyncDCTsReady_D mctAutoInitMCT_D: HTMemMapInit_D Node: 00 base: 00 limit: 7fffff BottomIO: c00000 Node: 00 base: 03 limit: 7fffff Node: 01 base: 00 limit: 00 Node: 02 base: 00 limit: 00 Node: 03 base: 00 limit: 00 Node: 04 base: 00 limit: 00 Node: 05 base: 00 limit: 00 Node: 06 base: 00 limit: 00 Node: 07 base: 00 limit: 00 mctAutoInitMCT_D: CPUMemTyping_D CPUMemTyping: Cache32bTOP:800000 CPUMemTyping: Bottom32bIO:800000 CPUMemTyping: Bottom40bIO:0 mctAutoInitMCT_D: DQSTiming_D TrainRcvrEn: Status 1000 TrainRcvrEn: ErrStatus 0 TrainRcvrEn: ErrCode 0 TrainRcvrEn: Done TrainDQSRdWrPos: Status 1000 TrainDQSRdWrPos: TrainErrors 0 TrainDQSRdWrPos: ErrStatus 0 TrainDQSRdWrPos: ErrCode 0 TrainDQSRdWrPos: Done TrainDQSRdWrPos: Status 1000 TrainDQSRdWrPos: TrainErrors 0 TrainDQSRdWrPos: ErrStatus 0 TrainDQSRdWrPos: ErrCode 0 TrainDQSRdWrPos: Done TrainDQSRdWrPos: Status 1000 TrainDQSRdWrPos: TrainErrors 0 TrainDQSRdWrPos: ErrStatus 0 TrainDQSRdWrPos: ErrCode 0 TrainDQSRdWrPos: Done TrainDQSRdWrPos: Status 1000 TrainDQSRdWrPos: TrainErrors 0 TrainDQSRdWrPos: ErrStatus 0 TrainDQSRdWrPos: ErrCode 0 TrainDQSRdWrPos: Done mctAutoInitMCT_D: UMAMemTyping_D mctAutoInitMCT_D: :OtherTiming InterleaveNodes_D: Status 1000 InterleaveNodes_D: ErrStatus 0 InterleaveNodes_D: ErrCode 0 InterleaveNodes_D: Done InterleaveChannels_D: Node 0 InterleaveChannels_D: Status 1000 InterleaveChannels_D: ErrStatus 0 InterleaveChannels_D: ErrCode 0 InterleaveChannels_D: Node 1 InterleaveChannels_D: Status 1000 InterleaveChannels_D: ErrStatus 0 InterleaveChannels_D: ErrCode 0 InterleaveChannels_D: Node 2 InterleaveChannels_D: Status 1000 InterleaveChannels_D: ErrStatus 0 InterleaveChannels_D: ErrCode 0 InterleaveChannels_D: Node 3 InterleaveChannels_D: Status 1000 InterleaveChannels_D: ErrStatus 0 InterleaveChannels_D: ErrCode 0 InterleaveChannels_D: Node 4 InterleaveChannels_D: Status 1000 InterleaveChannels_D: ErrStatus 0 InterleaveChannels_D: ErrCode 0 InterleaveChannels_D: Node 5 InterleaveChannels_D: Status 1000 InterleaveChannels_D: ErrStatus 0 InterleaveChannels_D: ErrCode 0 InterleaveChannels_D: Node 6 InterleaveChannels_D: Status 1000 InterleaveChannels_D: ErrStatus 0 InterleaveChannels_D: ErrCode 0 InterleaveChannels_D: Node 7 InterleaveChannels_D: Status 1000 InterleaveChannels_D: ErrStatus 0 InterleaveChannels_D: ErrCode 0 InterleaveChannels_D: Done mctAutoInitMCT_D: ECCInit_D All Done raminit_amdmct end: *** Yes, the copy/decompress is taking a while, FIXME! v_esp=000cbf28 testx = 5a5a5a5a Copying data from cache to RAM -- switching to use RAM as stack... Done testx = 5a5a5a5a Disabling cache as ram now Clearing initial memory region: Done Loading image. Searching for fallback/coreboot_ram Check cmos_layout.bin Check fallback/romstage Check fallback/coreboot_ram Stage: loading fallback/coreboot_ram @ 0x200000 (1245184 bytes), entry @ 0x200000 Stage: done loading. Jumping to image. coreboot-4.0-1914-g66ebaa9-dirty Sun Dec 18 19:38:55 CET 2011 booting... Enumerating buses... Show all devs...Before device enumeration. Root Device: enabled 1 APIC_CLUSTER: 0: enabled 1 APIC: 00: enabled 1 PCI_DOMAIN: 0000: enabled 1 PCI: 00:18.0: enabled 1 PCI: 00:00.0: enabled 1 PCI: 00:01.0: enabled 1 PCI: 00:02.0: enabled 0 PCI: 00:03.0: enabled 0 PCI: 00:04.0: enabled 0 PCI: 00:05.0: enabled 0 PCI: 00:06.0: enabled 0 PCI: 00:07.0: enabled 0 PCI: 00:08.0: enabled 0 PCI: 00:09.0: enabled 0 PCI: 00:0a.0: enabled 1 PCI: 00:11.0: enabled 1 PCI: 00:12.0: enabled 1 PCI: 00:12.1: enabled 1 PCI: 00:12.2: enabled 1 PCI: 00:13.0: enabled 1 PCI: 00:13.1: enabled 1 PCI: 00:13.2: enabled 1 PCI: 00:14.0: enabled 1 I2C: 00:50: enabled 1 I2C: 00:51: enabled 1 I2C: 00:52: enabled 1 I2C: 00:53: enabled 1 PCI: 00:14.1: enabled 1 PCI: 00:14.2: enabled 1 PCI: 00:14.3: enabled 1 PNP: 002e.0: enabled 0 PNP: 002e.1: enabled 1 PNP: 002e.2: enabled 0 PNP: 002e.3: enabled 0 PNP: 002e.4: enabled 0 PNP: 002e.5: enabled 1 PNP: 002e.6: enabled 1 PNP: 002e.7: enabled 0 PNP: 002e.8: enabled 0 PNP: 002e.9: enabled 0 PNP: 002e.a: enabled 0 PCI: 00:14.4: enabled 1 PCI: 00:14.5: enabled 1 PCI: 00:18.1: enabled 1 PCI: 00:18.2: enabled 1 PCI: 00:18.3: enabled 1 PCI: 00:18.4: enabled 1 Compare with tree... Root Device: enabled 1 APIC_CLUSTER: 0: enabled 1 APIC: 00: enabled 1 PCI_DOMAIN: 0000: enabled 1 PCI: 00:18.0: enabled 1 PCI: 00:00.0: enabled 1 PCI: 00:01.0: enabled 1 PCI: 00:02.0: enabled 0 PCI: 00:03.0: enabled 0 PCI: 00:04.0: enabled 0 PCI: 00:05.0: enabled 0 PCI: 00:06.0: enabled 0 PCI: 00:07.0: enabled 0 PCI: 00:08.0: enabled 0 PCI: 00:09.0: enabled 0 PCI: 00:0a.0: enabled 1 PCI: 00:11.0: enabled 1 PCI: 00:12.0: enabled 1 PCI: 00:12.1: enabled 1 PCI: 00:12.2: enabled 1 PCI: 00:13.0: enabled 1 PCI: 00:13.1: enabled 1 PCI: 00:13.2: enabled 1 PCI: 00:14.0: enabled 1 I2C: 00:50: enabled 1 I2C: 00:51: enabled 1 I2C: 00:52: enabled 1 I2C: 00:53: enabled 1 PCI: 00:14.1: enabled 1 PCI: 00:14.2: enabled 1 PCI: 00:14.3: enabled 1 PNP: 002e.0: enabled 0 PNP: 002e.1: enabled 1 PNP: 002e.2: enabled 0 PNP: 002e.3: enabled 0 PNP: 002e.4: enabled 0 PNP: 002e.5: enabled 1 PNP: 002e.6: enabled 1 PNP: 002e.7: enabled 0 PNP: 002e.8: enabled 0 PNP: 002e.9: enabled 0 PNP: 002e.a: enabled 0 PCI: 00:14.4: enabled 1 PCI: 00:14.5: enabled 1 PCI: 00:18.1: enabled 1 PCI: 00:18.2: enabled 1 PCI: 00:18.3: enabled 1 PCI: 00:18.4: enabled 1 Mainboard enable. dev=0x00227dc4 m4a785m_enable, TOP MEM: msr.lo = 0x80000000, msr.hi = 0x00000000 m4a785m_enable, TOP MEM2: msr2.lo = 0x00000000, msr2.hi = 0x00000000 m4a785m_enable: uma size 0x10000000, memory start 0x70000000 PCI: Using configuration type 1 Init adt7461 end , status 0x02 fd scan_static_bus for Root Device APIC_CLUSTER: 0 enabled PCI_DOMAIN: 0000 enabled APIC_CLUSTER: 0 scanning... PCI: 00:18.3 siblings=1 CPU: APIC: 00 enabled CPU: APIC: 01 enabled PCI_DOMAIN: 0000 scanning... PCI: pci_scan_bus for bus 00 PCI: 00:18.0 [1022/1200] bus ops PCI: 00:18.0 [1022/1200] enabled PCI: 00:18.1 [1022/1201] enabled PCI: 00:18.2 [1022/1202] enabled PCI: 00:18.3 [1022/1203] ops PCI: 00:18.3 [1022/1203] enabled PCI: 00:18.4 [1022/1204] enabled rs780_enable: dev=00228258, VID_DID=0x96001022 Bus-0, Dev-0, Fun-0. enable_pcie_bar3() addr=e0000000,bus=0,devfn=40 gpp_sb_init nb_dev=0x0, dev=0x40, port=0x8 NB_PCI_REG04 = 6. NB_PCI_REG84 = 3000095. NB_PCI_REG4C = 52042. PCI: 00:00.0 [1022/9600] ops PCI: 00:00.0 [1022/9600] enabled Capability: type 0x08 @ 0xc4 flags: 0x0181 PCI: pci_scan_bus for bus 00 PCI: pci_scan_bus limits devfn 0 - devfn ffffffff PCI: pci_scan_bus upper limit too big. Using 0xff. rs780_enable: dev=00228258, VID_DID=0x96001022 Bus-0, Dev-0, Fun-0. enable_pcie_bar3() gpp_sb_init nb_dev=0x0, dev=0x40, port=0x8 NB_PCI_REG04 = 6. NB_PCI_REG84 = 3000095. NB_PCI_REG4C = 52042. PCI: 00:00.0 [1022/9600] enabled rs780_enable: dev=00228498, VID_DID=0x96021022 Bus-0, Dev-1, Fun-0. GC is accessible from now on. Capability: type 0x08 @ 0x44 Capability: type 0x0d @ 0xb0 Capability: type 0x08 @ 0x44 Capability: type 0x08 @ 0x44 Capability: type 0x0d @ 0xb0 Capability: type 0x08 @ 0x44 Capability: type 0x0d @ 0xb0 PCI: 00:01.0 [1022/9602] enabled rs780_enable: dev=00228648, VID_DID=0x96031022 Bus-0, Dev-2,3, Fun-0. enable=0 rs780_enable: dev=00228768, VID_DID=0xffffffff Bus-0, Dev-2,3, Fun-0. enable=0 rs780_enable: dev=002287f8, VID_DID=0x96041022 Bus-0, Dev-4,5,6,7, Fun-0. enable=0 rs780_enable: dev=00228888, VID_DID=0x96051022 Bus-0, Dev-4,5,6,7, Fun-0. enable=0 rs780_enable: dev=00228918, VID_DID=0x96061022 Bus-0, Dev-4,5,6,7, Fun-0. enable=0 rs780_enable: dev=002289a8, VID_DID=0x96071022 Bus-0, Dev-4,5,6,7, Fun-0. enable=0 rs780_enable: dev=00228a38, VID_DID=0x960a1022 Bus-0, Dev-8, Fun-0. enable=0 rs780_enable: dev=00228ac8, VID_DID=0x96081022 Bus-0, Dev-9, 10, Fun-0. enable=0 rs780_enable: dev=00228b58, VID_DID=0x96091022 Bus-0, Dev-9, 10, Fun-0. enable=1 gpp_sb_init nb_dev=0x0, dev=0x50, port=0xa PcieLinkTraining port=a:lc current state=a0b0f10 addr=e0000000,bus=0,devfn=50 PcieTrainPort reg=0x10000 PcieTrainPort port=0xa result=1 disable_pcie_bar3() rs780 unused GPP ports bitmap=0x2fc, force disabled Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 Capability: type 0x05 @ 0xa0 Capability: type 0x0d @ 0xb0 Capability: type 0x08 @ 0xb8 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 Capability: type 0x05 @ 0xa0 Capability: type 0x0d @ 0xb0 Capability: type 0x08 @ 0xb8 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 Capability: type 0x05 @ 0xa0 Capability: type 0x0d @ 0xb0 Capability: type 0x08 @ 0xb8 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 PCI: 00:0a.0 subordinate bus PCI Express PCI: 00:0a.0 [1022/9609] enabled sb7xx_51xx_enable() PCI: 00:11.0 [1002/4390] ops PCI: 00:11.0 [1002/4390] enabled sb7xx_51xx_enable() PCI: 00:12.0 [1002/4397] ops PCI: 00:12.0 [1002/4397] enabled sb7xx_51xx_enable() PCI: 00:12.1 [1002/4398] ops PCI: 00:12.1 [1002/4398] enabled sb7xx_51xx_enable() PCI: 00:12.2 [1002/4396] ops PCI: 00:12.2 [1002/4396] enabled sb7xx_51xx_enable() PCI: 00:13.0 [1002/4397] ops PCI: 00:13.0 [1002/4397] enabled sb7xx_51xx_enable() PCI: 00:13.1 [1002/4398] ops PCI: 00:13.1 [1002/4398] enabled sb7xx_51xx_enable() PCI: 00:13.2 [1002/4396] ops PCI: 00:13.2 [1002/4396] enabled sb7xx_51xx_enable() PCI: 00:14.0 [1002/4385] bus ops PCI: 00:14.0 [1002/4385] enabled sb7xx_51xx_enable() PCI: 00:14.1 [1002/439c] ops PCI: 00:14.1 [1002/439c] enabled sb7xx_51xx_enable() PCI: 00:14.2 [1002/4383] ops PCI: 00:14.2 [1002/4383] enabled sb7xx_51xx_enable() PCI: 00:14.3 [1002/439d] bus ops PCI: 00:14.3 [1002/439d] enabled sb7xx_51xx_enable() PCI: 00:14.4 [1002/4384] bus ops PCI: 00:14.4 [1002/4384] enabled sb7xx_51xx_enable() PCI: 00:14.5 [1002/4399] ops PCI: 00:14.5 [1002/4399] enabled PCI: 00:18.0 [1022/1200] bus ops PCI: 00:18.0 [1022/1200] enabled PCI: 00:18.1 [1022/1201] enabled PCI: 00:18.2 [1022/1202] enabled PCI: 00:18.3 [1022/1203] ops PCI: 00:18.3 [1022/1203] enabled PCI: 00:18.4 [1022/1204] enabled do_pci_scan_bridge for PCI: 00:01.0 PCI: pci_scan_bus for bus 01 PCI: 01:05.0 [1002/9616] enabled PCI: 01:05.1 [1002/960f] enabled PCI: pci_scan_bus returning with max=001 do_pci_scan_bridge returns max 1 do_pci_scan_bridge for PCI: 00:0a.0 PCI: pci_scan_bus for bus 02 PCI: 02:00.0 [10ec/8168] enabled PCI: pci_scan_bus returning with max=002 Capability: type 0x01 @ 0x40 Capability: type 0x05 @ 0x50 Capability: type 0x10 @ 0x70 do_pci_scan_bridge returns max 2 scan_static_bus for PCI: 00:14.0 smbus: PCI: 00:14.0[0]->I2C: 01:50 enabled smbus: PCI: 00:14.0[0]->I2C: 01:51 enabled smbus: PCI: 00:14.0[0]->I2C: 01:52 enabled smbus: PCI: 00:14.0[0]->I2C: 01:53 enabled scan_static_bus for PCI: 00:14.0 done scan_static_bus for PCI: 00:14.3 PNP: 002e.0 disabled PNP: 002e.1 enabled PNP: 002e.2 disabled PNP: 002e.3 disabled PNP: 002e.4 disabled PNP: 002e.5 enabled PNP: 002e.6 enabled PNP: 002e.7 disabled PNP: 002e.8 disabled PNP: 002e.9 disabled PNP: 002e.a disabled scan_static_bus for PCI: 00:14.3 done do_pci_scan_bridge for PCI: 00:14.4 PCI: pci_scan_bus for bus 03 PCI: 03:06.0 [1822/4e35] enabled PCI: pci_scan_bus returning with max=003 do_pci_scan_bridge returns max 3 PCI: pci_scan_bus returning with max=003 PCI: pci_scan_bus returning with max=003 PCI_DOMAIN: 0000 passpw: enabled scan_static_bus for Root Device done done Setting up VGA for PCI: 01:05.0 Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:01.0 Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:18.0 Setting PCI_BRIDGE_CTL_VGA for bridge PCI_DOMAIN: 0000 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device Allocating resources... Reading resources... Root Device read_resources bus 0 link: 0 APIC_CLUSTER: 0 read_resources bus 0 link: 0 APIC: 00 missing read_resources APIC: 01 missing read_resources APIC_CLUSTER: 0 read_resources bus 0 link: 0 done PCI_DOMAIN: 0000 read_resources bus 0 link: 0 PCI: 00:18.0 read_resources bus 0 link: 0 PCI: 00:00.0 register 1c(00000004), read-only ignoring it PCI: 00:01.0 read_resources bus 1 link: 0 PCI: 00:01.0 read_resources bus 1 link: 0 done PCI: 00:0a.0 read_resources bus 2 link: 0 PCI: 00:0a.0 read_resources bus 2 link: 0 done PCI: 00:14.0 read_resources bus 1 link: 0 I2C: 01:50 missing read_resources I2C: 01:51 missing read_resources I2C: 01:52 missing read_resources I2C: 01:53 missing read_resources PCI: 00:14.0 read_resources bus 1 link: 0 done PCI: 00:14.3 read_resources bus 0 link: 0 PCI: 00:14.3 read_resources bus 0 link: 0 done PCI: 00:14.4 read_resources bus 3 link: 0 PCI: 00:14.4 read_resources bus 3 link: 0 done PCI: 00:18.0 read_resources bus 0 link: 0 done PCI: 00:18.0 read_resources bus 0 link: 1 PCI: 00:18.0 read_resources bus 0 link: 1 done PCI: 00:18.0 read_resources bus 0 link: 2 PCI: 00:18.0 read_resources bus 0 link: 2 done PCI: 00:18.0 read_resources bus 0 link: 3 PCI: 00:18.0 read_resources bus 0 link: 3 done PCI: 00:18.0 read_resources bus 0 link: 4 PCI: 00:18.0 read_resources bus 0 link: 4 done PCI: 00:18.0 read_resources bus 0 link: 5 PCI: 00:18.0 read_resources bus 0 link: 5 done PCI: 00:18.0 read_resources bus 0 link: 6 PCI: 00:18.0 read_resources bus 0 link: 6 done PCI: 00:18.0 read_resources bus 0 link: 7 PCI: 00:18.0 read_resources bus 0 link: 7 done PCI_DOMAIN: 0000 read_resources bus 0 link: 0 done Root Device read_resources bus 0 link: 0 done Done reading resources. Show resources in subtree (Root Device)...After reading. Root Device child on link 0 APIC_CLUSTER: 0 APIC_CLUSTER: 0 child on link 0 APIC: 00 APIC: 00 APIC: 01 PCI_DOMAIN: 0000 child on link 0 PCI: 00:18.0 PCI_DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000 PCI_DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100 PCI_DOMAIN: 0000 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index c0010058 PCI: 00:18.0 child on link 0 PCI: 00:00.0 PCI: 00:18.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80100 index 10d8 PCI: 00:18.0 resource base 0 size 0 align 20 gran 20 limit ffffffffff flags 81200 index 10b8 PCI: 00:18.0 resource base 0 size 0 align 20 gran 20 limit ffffffffff flags 80200 index 10b0 PCI: 00:00.0 PCI: 00:01.0 child on link 0 PCI: 01:05.0 PCI: 00:01.0 resource base 0 size 0 align 12 gran 12 limit 1ffffff flags 80102 index 1c PCI: 00:01.0 resource base 0 size 0 align 20 gran 20 limit ffffffffff flags 81202 index 24 PCI: 00:01.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 PCI: 01:05.0 PCI: 01:05.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffff flags 1200 index 10 PCI: 01:05.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 14 PCI: 01:05.0 resource base 0 size 10000 align 16 gran 16 limit ffffffff flags 200 index 18 PCI: 01:05.0 resource base 0 size 100000 align 20 gran 20 limit ffffffff flags 200 index 24 PCI: 01:05.1 PCI: 01:05.1 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 10 PCI: 00:02.0 PCI: 00:03.0 PCI: 00:04.0 PCI: 00:05.0 PCI: 00:06.0 PCI: 00:07.0 PCI: 00:08.0 PCI: 00:09.0 PCI: 00:0a.0 child on link 0 PCI: 02:00.0 PCI: 00:0a.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c PCI: 00:0a.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 PCI: 00:0a.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 PCI: 02:00.0 PCI: 02:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10 PCI: 02:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 1201 index 18 PCI: 02:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 1201 index 20 PCI: 02:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffff flags 2200 index 30 PCI: 00:11.0 PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10 PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14 PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18 PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c PCI: 00:11.0 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20 PCI: 00:11.0 resource base 0 size 400 align 10 gran 10 limit ffffffff flags 200 index 24 PCI: 00:12.0 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 PCI: 00:12.1 PCI: 00:12.1 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 PCI: 00:12.2 PCI: 00:12.2 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 10 PCI: 00:13.0 PCI: 00:13.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 PCI: 00:13.1 PCI: 00:13.1 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 PCI: 00:13.2 PCI: 00:13.2 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 10 PCI: 00:14.0 child on link 0 I2C: 01:50 PCI: 00:14.0 resource base fec00000 size 1000 align 8 gran 8 limit ffffffff flags d0000200 index 74 PCI: 00:14.0 resource base fed00000 size 400 align 8 gran 8 limit ffffffff flags d0000200 index b4 PCI: 00:14.0 resource base b00 size 10 align 8 gran 8 limit ffff flags d0000100 index 90 I2C: 01:50 I2C: 01:51 I2C: 01:52 I2C: 01:53 PCI: 00:14.1 PCI: 00:14.1 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10 PCI: 00:14.1 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14 PCI: 00:14.1 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18 PCI: 00:14.1 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c PCI: 00:14.1 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20 PCI: 00:14.2 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10 PCI: 00:14.3 child on link 0 PNP: 002e.0 PCI: 00:14.3 resource base 0 size 1 align 0 gran 0 limit ffffffff flags 200 index a0 PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 PCI: 00:14.3 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100 PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 PNP: 002e.0 PNP: 002e.0 resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 60 PNP: 002e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 PNP: 002e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 PNP: 002e.1 PNP: 002e.1 resource base 3f8 size 8 align 3 gran 3 limit fff flags c0000100 index 60 PNP: 002e.1 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 PNP: 002e.2 PNP: 002e.2 resource base 2f8 size 8 align 3 gran 3 limit fff flags c0000100 index 60 PNP: 002e.2 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 PNP: 002e.3 PNP: 002e.3 resource base 378 size 4 align 2 gran 2 limit fff flags c0000100 index 60 PNP: 002e.3 resource base 7 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 PNP: 002e.3 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 PNP: 002e.4 PNP: 002e.4 resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 60 PNP: 002e.4 resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 62 PNP: 002e.4 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 PNP: 002e.5 PNP: 002e.5 resource base 60 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 60 PNP: 002e.5 resource base 64 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 62 PNP: 002e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 PNP: 002e.6 PNP: 002e.6 resource base c size 1 align 0 gran 0 limit 0 flags c0000400 index 70 PNP: 002e.7 PNP: 002e.7 resource base 0 size 1 align 0 gran 0 limit ffffffff flags 100 index 60 PNP: 002e.7 resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 62 PNP: 002e.7 resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 64 PNP: 002e.7 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 PNP: 002e.8 PNP: 002e.8 resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 60 PNP: 002e.8 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 PNP: 002e.9 PNP: 002e.9 resource base 0 size 1 align 0 gran 0 limit ffffffff flags 100 index 60 PNP: 002e.a PNP: 002e.a resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 60 PNP: 002e.a resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 PCI: 00:14.4 child on link 0 PCI: 03:06.0 PCI: 00:14.4 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c PCI: 00:14.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 81202 index 24 PCI: 00:14.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 PCI: 03:06.0 PCI: 03:06.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 1200 index 10 PCI: 00:14.5 PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 PCI: 00:18.0 PCI: 00:18.1 PCI: 00:18.2 PCI: 00:18.3 PCI: 00:18.3 resource base 0 size 4000000 align 26 gran 26 limit ffffffff flags 200 index 94 PCI: 00:18.4 PCI: 00:18.1 PCI: 00:18.2 PCI: 00:18.3 PCI: 00:18.3 resource base 0 size 4000000 align 26 gran 26 limit ffffffff flags 200 index 94 PCI: 00:18.4 PCI_DOMAIN: 0000 compute_resources_io: base: 0 size: 0 align: 0 gran: 0 limit: ffff PCI: 00:18.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff PCI: 00:01.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: 1ffffff PCI: 01:05.0 14 * [0x0 - 0xff] io PCI: 00:01.0 compute_resources_io: base: 100 size: 1000 align: 12 gran: 12 limit: ffff done PCI: 00:0a.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff PCI: 02:00.0 10 * [0x0 - 0xff] io PCI: 00:0a.0 compute_resources_io: base: 100 size: 1000 align: 12 gran: 12 limit: ffff done PCI: 00:14.4 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff PCI: 00:14.4 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done PCI: 00:01.0 1c * [0x0 - 0xfff] io PCI: 00:0a.0 1c * [0x1000 - 0x1fff] io PCI: 00:11.0 20 * [0x2000 - 0x200f] io PCI: 00:14.1 20 * [0x2010 - 0x201f] io PCI: 00:11.0 10 * [0x2020 - 0x2027] io PCI: 00:11.0 18 * [0x2028 - 0x202f] io PCI: 00:14.1 10 * [0x2030 - 0x2037] io PCI: 00:14.1 18 * [0x2038 - 0x203f] io PCI: 00:11.0 14 * [0x2040 - 0x2043] io PCI: 00:11.0 1c * [0x2044 - 0x2047] io PCI: 00:14.1 14 * [0x2048 - 0x204b] io PCI: 00:14.1 1c * [0x204c - 0x204f] io PCI: 00:18.0 compute_resources_io: base: 2050 size: 3000 align: 12 gran: 12 limit: ffff done PCI: 00:18.0 10d8 * [0x0 - 0x2fff] io PCI_DOMAIN: 0000 compute_resources_io: base: 3000 size: 3000 align: 12 gran: 0 limit: ffff done PCI_DOMAIN: 0000 compute_resources_mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff PCI: 00:18.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffff PCI: 00:01.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffff PCI: 01:05.0 10 * [0x0 - 0xfffffff] prefmem PCI: 00:01.0 compute_resources_prefmem: base: 10000000 size: 10000000 align: 28 gran: 20 limit: ffffffff done PCI: 00:0a.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff PCI: 02:00.0 20 * [0x0 - 0x3fff] prefmem PCI: 02:00.0 18 * [0x4000 - 0x4fff] prefmem PCI: 00:0a.0 compute_resources_prefmem: base: 5000 size: 100000 align: 20 gran: 20 limit: ffffffffffffffff done PCI: 00:14.4 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff PCI: 03:06.0 10 * [0x0 - 0xfff] prefmem PCI: 00:14.4 compute_resources_prefmem: base: 1000 size: 100000 align: 20 gran: 20 limit: ffffffff done PCI: 00:01.0 24 * [0x0 - 0xfffffff] prefmem PCI: 00:0a.0 24 * [0x10000000 - 0x100fffff] prefmem PCI: 00:14.4 24 * [0x10100000 - 0x101fffff] prefmem PCI: 00:18.0 compute_resources_prefmem: base: 10200000 size: 10200000 align: 28 gran: 20 limit: ffffffff done PCI: 00:18.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffff PCI: 00:01.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff PCI: 01:05.0 24 * [0x0 - 0xfffff] mem PCI: 01:05.0 18 * [0x100000 - 0x10ffff] mem PCI: 01:05.1 10 * [0x110000 - 0x113fff] mem PCI: 00:01.0 compute_resources_mem: base: 114000 size: 200000 align: 20 gran: 20 limit: ffffffff done PCI: 00:0a.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff PCI: 02:00.0 30 * [0x0 - 0xffff] mem PCI: 00:0a.0 compute_resources_mem: base: 10000 size: 100000 align: 20 gran: 20 limit: ffffffff done PCI: 00:14.4 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff PCI: 00:14.4 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done PCI: 00:18.3 94 * [0x0 - 0x3ffffff] mem PCI: 00:01.0 20 * [0x4000000 - 0x41fffff] mem PCI: 00:0a.0 20 * [0x4200000 - 0x42fffff] mem PCI: 00:14.2 10 * [0x4300000 - 0x4303fff] mem PCI: 00:12.0 10 * [0x4304000 - 0x4304fff] mem PCI: 00:12.1 10 * [0x4305000 - 0x4305fff] mem PCI: 00:13.0 10 * [0x4306000 - 0x4306fff] mem PCI: 00:13.1 10 * [0x4307000 - 0x4307fff] mem PCI: 00:14.5 10 * [0x4308000 - 0x4308fff] mem PCI: 00:11.0 24 * [0x4309000 - 0x43093ff] mem PCI: 00:12.2 10 * [0x4309400 - 0x43094ff] mem PCI: 00:13.2 10 * [0x4309500 - 0x43095ff] mem PCI: 00:14.3 a0 * [0x4309600 - 0x4309600] mem PCI: 00:18.0 compute_resources_mem: base: 4309601 size: 4400000 align: 26 gran: 20 limit: ffffffff done PCI: 00:18.0 10b8 * [0x0 - 0x101fffff] prefmem PCI: 00:18.0 10b0 * [0x14000000 - 0x183fffff] mem PCI: 00:18.3 94 * [0x1c000000 - 0x1fffffff] mem PCI_DOMAIN: 0000 compute_resources_mem: base: 20000000 size: 20000000 align: 28 gran: 0 limit: ffffffff done avoid_fixed_resources: PCI_DOMAIN: 0000 avoid_fixed_resources:@PCI_DOMAIN: 0000 10000000 limit 0000ffff avoid_fixed_resources:@PCI_DOMAIN: 0000 10000100 limit ffffffff constrain_resources: PCI_DOMAIN: 0000 constrain_resources: PCI: 00:18.0 constrain_resources: PCI: 00:00.0 constrain_resources: PCI: 00:01.0 constrain_resources: PCI: 01:05.0 constrain_resources: PCI: 01:05.1 constrain_resources: PCI: 00:0a.0 constrain_resources: PCI: 02:00.0 constrain_resources: PCI: 00:11.0 constrain_resources: PCI: 00:12.0 constrain_resources: PCI: 00:12.1 constrain_resources: PCI: 00:12.2 constrain_resources: PCI: 00:13.0 constrain_resources: PCI: 00:13.1 constrain_resources: PCI: 00:13.2 constrain_resources: PCI: 00:14.0 constrain_resources: I2C: 01:50 constrain_resources: I2C: 01:51 constrain_resources: I2C: 01:52 constrain_resources: I2C: 01:53 constrain_resources: PCI: 00:14.1 constrain_resources: PCI: 00:14.2 constrain_resources: PCI: 00:14.3 constrain_resources: PNP: 002e.1 constrain_resources: PNP: 002e.5 constrain_resources: PNP: 002e.6 constrain_resources: PCI: 00:14.4 constrain_resources: PCI: 03:06.0 constrain_resources: PCI: 00:14.5 constrain_resources: PCI: 00:18.0 constrain_resources: PCI: 00:18.1 constrain_resources: PCI: 00:18.2 constrain_resources: PCI: 00:18.3 constrain_resources: PCI: 00:18.4 constrain_resources: PCI: 00:18.1 constrain_resources: PCI: 00:18.2 constrain_resources: PCI: 00:18.3 constrain_resources: PCI: 00:18.4 avoid_fixed_resources2: PCI_DOMAIN: 0000@10000000 limit 0000ffff lim->base 00001000 lim->limit 0000ffff avoid_fixed_resources2: PCI_DOMAIN: 0000@10000100 limit ffffffff lim->base 00000000 lim->limit dfffffff Setting resources... PCI_DOMAIN: 0000 allocate_resources_io: base:1000 size:3000 align:12 gran:0 limit:ffff Assigned: PCI: 00:18.0 10d8 * [0x1000 - 0x3fff] io PCI_DOMAIN: 0000 allocate_resources_io: next_base: 4000 size: 3000 align: 12 gran: 0 done PCI: 00:18.0 allocate_resources_io: base:1000 size:3000 align:12 gran:12 limit:ffff Assigned: PCI: 00:01.0 1c * [0x1000 - 0x1fff] io Assigned: PCI: 00:0a.0 1c * [0x2000 - 0x2fff] io Assigned: PCI: 00:11.0 20 * [0x3000 - 0x300f] io Assigned: PCI: 00:14.1 20 * [0x3010 - 0x301f] io Assigned: PCI: 00:11.0 10 * [0x3020 - 0x3027] io Assigned: PCI: 00:11.0 18 * [0x3028 - 0x302f] io Assigned: PCI: 00:14.1 10 * [0x3030 - 0x3037] io Assigned: PCI: 00:14.1 18 * [0x3038 - 0x303f] io Assigned: PCI: 00:11.0 14 * [0x3040 - 0x3043] io Assigned: PCI: 00:11.0 1c * [0x3044 - 0x3047] io Assigned: PCI: 00:14.1 14 * [0x3048 - 0x304b] io Assigned: PCI: 00:14.1 1c * [0x304c - 0x304f] io PCI: 00:18.0 allocate_resources_io: next_base: 3050 size: 3000 align: 12 gran: 12 done PCI: 00:01.0 allocate_resources_io: base:1000 size:1000 align:12 gran:12 limit:ffff Assigned: PCI: 01:05.0 14 * [0x1000 - 0x10ff] io PCI: 00:01.0 allocate_resources_io: next_base: 1100 size: 1000 align: 12 gran: 12 done PCI: 00:0a.0 allocate_resources_io: base:2000 size:1000 align:12 gran:12 limit:ffff Assigned: PCI: 02:00.0 10 * [0x2000 - 0x20ff] io PCI: 00:0a.0 allocate_resources_io: next_base: 2100 size: 1000 align: 12 gran: 12 done PCI: 00:14.4 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff PCI: 00:14.4 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done PCI_DOMAIN: 0000 allocate_resources_mem: base:c0000000 size:20000000 align:28 gran:0 limit:dfffffff Assigned: PCI: 00:18.0 10b8 * [0xc0000000 - 0xd01fffff] prefmem Assigned: PCI: 00:18.0 10b0 * [0xd4000000 - 0xd83fffff] mem Assigned: PCI: 00:18.3 94 * [0xdc000000 - 0xdfffffff] mem PCI_DOMAIN: 0000 allocate_resources_mem: next_base: e0000000 size: 20000000 align: 28 gran: 0 done PCI: 00:18.0 allocate_resources_prefmem: base:c0000000 size:10200000 align:28 gran:20 limit:dfffffff Assigned: PCI: 00:01.0 24 * [0xc0000000 - 0xcfffffff] prefmem Assigned: PCI: 00:0a.0 24 * [0xd0000000 - 0xd00fffff] prefmem Assigned: PCI: 00:14.4 24 * [0xd0100000 - 0xd01fffff] prefmem PCI: 00:18.0 allocate_resources_prefmem: next_base: d0200000 size: 10200000 align: 28 gran: 20 done PCI: 00:01.0 allocate_resources_prefmem: base:c0000000 size:10000000 align:28 gran:20 limit:dfffffff Assigned: PCI: 01:05.0 10 * [0xc0000000 - 0xcfffffff] prefmem PCI: 00:01.0 allocate_resources_prefmem: next_base: d0000000 size: 10000000 align: 28 gran: 20 done PCI: 00:0a.0 allocate_resources_prefmem: base:d0000000 size:100000 align:20 gran:20 limit:dfffffff Assigned: PCI: 02:00.0 20 * [0xd0000000 - 0xd0003fff] prefmem Assigned: PCI: 02:00.0 18 * [0xd0004000 - 0xd0004fff] prefmem PCI: 00:0a.0 allocate_resources_prefmem: next_base: d0005000 size: 100000 align: 20 gran: 20 done PCI: 00:14.4 allocate_resources_prefmem: base:d0100000 size:100000 align:20 gran:20 limit:dfffffff Assigned: PCI: 03:06.0 10 * [0xd0100000 - 0xd0100fff] prefmem PCI: 00:14.4 allocate_resources_prefmem: next_base: d0101000 size: 100000 align: 20 gran: 20 done PCI: 00:18.0 allocate_resources_mem: base:d4000000 size:4400000 align:26 gran:20 limit:dfffffff Assigned: PCI: 00:18.3 94 * [0xd4000000 - 0xd7ffffff] mem Assigned: PCI: 00:01.0 20 * [0xd8000000 - 0xd81fffff] mem Assigned: PCI: 00:0a.0 20 * [0xd8200000 - 0xd82fffff] mem Assigned: PCI: 00:14.2 10 * [0xd8300000 - 0xd8303fff] mem Assigned: PCI: 00:12.0 10 * [0xd8304000 - 0xd8304fff] mem Assigned: PCI: 00:12.1 10 * [0xd8305000 - 0xd8305fff] mem Assigned: PCI: 00:13.0 10 * [0xd8306000 - 0xd8306fff] mem Assigned: PCI: 00:13.1 10 * [0xd8307000 - 0xd8307fff] mem Assigned: PCI: 00:14.5 10 * [0xd8308000 - 0xd8308fff] mem Assigned: PCI: 00:11.0 24 * [0xd8309000 - 0xd83093ff] mem Assigned: PCI: 00:12.2 10 * [0xd8309400 - 0xd83094ff] mem Assigned: PCI: 00:13.2 10 * [0xd8309500 - 0xd83095ff] mem Assigned: PCI: 00:14.3 a0 * [0xd8309600 - 0xd8309600] mem PCI: 00:18.0 allocate_resources_mem: next_base: d8309601 size: 4400000 align: 26 gran: 20 done PCI: 00:01.0 allocate_resources_mem: base:d8000000 size:200000 align:20 gran:20 limit:dfffffff Assigned: PCI: 01:05.0 24 * [0xd8000000 - 0xd80fffff] mem Assigned: PCI: 01:05.0 18 * [0xd8100000 - 0xd810ffff] mem Assigned: PCI: 01:05.1 10 * [0xd8110000 - 0xd8113fff] mem PCI: 00:01.0 allocate_resources_mem: next_base: d8114000 size: 200000 align: 20 gran: 20 done PCI: 00:0a.0 allocate_resources_mem: base:d8200000 size:100000 align:20 gran:20 limit:dfffffff Assigned: PCI: 02:00.0 30 * [0xd8200000 - 0xd820ffff] mem PCI: 00:0a.0 allocate_resources_mem: next_base: d8210000 size: 100000 align: 20 gran: 20 done PCI: 00:14.4 allocate_resources_mem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff PCI: 00:14.4 allocate_resources_mem: next_base: dfffffff size: 0 align: 20 gran: 20 done Root Device assign_resources, bus 0 link: 0 0: mmio_basek=00300000, basek=00000300, limitk=00200000 Adding UMA memory area PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0 VGA: PCI: 00:18.0 (aka node 0) link 0 has VGA device PCI: 00:18.0 10d8 <- [0x0000001000 - 0x0000003fff] size 0x00003000 gran 0x0c io PCI: 00:18.0 10b8 <- [0x00c0000000 - 0x00d01fffff] size 0x10200000 gran 0x14 prefmem PCI: 00:18.0 10b0 <- [0x00d4000000 - 0x00d83fffff] size 0x04400000 gran 0x14 mem PCI: 00:18.0 assign_resources, bus 0 link: 0 PCI: 00:01.0 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 01 io PCI: 00:01.0 24 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x14 bus 01 prefmem PCI: 00:01.0 20 <- [0x00d8000000 - 0x00d81fffff] size 0x00200000 gran 0x14 bus 01 mem PCI: 00:01.0 assign_resources, bus 1 link: 0 PCI: 01:05.0 10 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem PCI: 01:05.0 14 <- [0x0000001000 - 0x00000010ff] size 0x00000100 gran 0x08 io PCI: 01:05.0 18 <- [0x00d8100000 - 0x00d810ffff] size 0x00010000 gran 0x10 mem PCI: 01:05.0 24 <- [0x00d8000000 - 0x00d80fffff] size 0x00100000 gran 0x14 mem PCI: 01:05.1 10 <- [0x00d8110000 - 0x00d8113fff] size 0x00004000 gran 0x0e mem PCI: 00:01.0 assign_resources, bus 1 link: 0 PCI: 00:0a.0 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 02 io PCI: 00:0a.0 24 <- [0x00d0000000 - 0x00d00fffff] size 0x00100000 gran 0x14 bus 02 prefmem PCI: 00:0a.0 20 <- [0x00d8200000 - 0x00d82fffff] size 0x00100000 gran 0x14 bus 02 mem PCI: 00:0a.0 assign_resources, bus 2 link: 0 PCI: 02:00.0 10 <- [0x0000002000 - 0x00000020ff] size 0x00000100 gran 0x08 io PCI: 02:00.0 18 <- [0x00d0004000 - 0x00d0004fff] size 0x00001000 gran 0x0c prefmem64 PCI: 02:00.0 20 <- [0x00d0000000 - 0x00d0003fff] size 0x00004000 gran 0x0e prefmem64 PCI: 02:00.0 30 <- [0x00d8200000 - 0x00d820ffff] size 0x00010000 gran 0x10 romem PCI: 00:0a.0 assign_resources, bus 2 link: 0 PCI: 00:11.0 10 <- [0x0000003020 - 0x0000003027] size 0x00000008 gran 0x03 io PCI: 00:11.0 14 <- [0x0000003040 - 0x0000003043] size 0x00000004 gran 0x02 io PCI: 00:11.0 18 <- [0x0000003028 - 0x000000302f] size 0x00000008 gran 0x03 io PCI: 00:11.0 1c <- [0x0000003044 - 0x0000003047] size 0x00000004 gran 0x02 io PCI: 00:11.0 20 <- [0x0000003000 - 0x000000300f] size 0x00000010 gran 0x04 io PCI: 00:11.0 24 <- [0x00d8309000 - 0x00d83093ff] size 0x00000400 gran 0x0a mem PCI: 00:12.0 10 <- [0x00d8304000 - 0x00d8304fff] size 0x00001000 gran 0x0c mem PCI: 00:12.1 10 <- [0x00d8305000 - 0x00d8305fff] size 0x00001000 gran 0x0c mem PCI: 00:12.2 10 <- [0x00d8309400 - 0x00d83094ff] size 0x00000100 gran 0x08 mem PCI: 00:13.0 10 <- [0x00d8306000 - 0x00d8306fff] size 0x00001000 gran 0x0c mem PCI: 00:13.1 10 <- [0x00d8307000 - 0x00d8307fff] size 0x00001000 gran 0x0c mem PCI: 00:13.2 10 <- [0x00d8309500 - 0x00d83095ff] size 0x00000100 gran 0x08 mem PCI: 00:14.0 assign_resources, bus 1 link: 0 PCI: 00:14.0 assign_resources, bus 1 link: 0 PCI: 00:14.1 10 <- [0x0000003030 - 0x0000003037] size 0x00000008 gran 0x03 io PCI: 00:14.1 14 <- [0x0000003048 - 0x000000304b] size 0x00000004 gran 0x02 io PCI: 00:14.1 18 <- [0x0000003038 - 0x000000303f] size 0x00000008 gran 0x03 io PCI: 00:14.1 1c <- [0x000000304c - 0x000000304f] size 0x00000004 gran 0x02 io PCI: 00:14.1 20 <- [0x0000003010 - 0x000000301f] size 0x00000010 gran 0x04 io PCI: 00:14.2 10 <- [0x00d8300000 - 0x00d8303fff] size 0x00004000 gran 0x0e mem64 PCI: 00:14.3 a0 <- [0x00d8309600 - 0x00d8309600] size 0x00000001 gran 0x00 mem PCI: 00:14.3 assign_resources, bus 0 link: 0 PNP: 002e.1 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io PNP: 002e.1 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq PNP: 002e.5 60 <- [0x0000000060 - 0x0000000060] size 0x00000001 gran 0x00 io PNP: 002e.5 62 <- [0x0000000064 - 0x0000000064] size 0x00000001 gran 0x00 io PNP: 002e.5 70 <- [0x0000000001 - 0x0000000001] size 0x00000001 gran 0x00 irq PNP: 002e.6 70 <- [0x000000000c - 0x000000000c] size 0x00000001 gran 0x00 irq PCI: 00:14.3 assign_resources, bus 0 link: 0 PCI: 00:14.4 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 03 io PCI: 00:14.4 24 <- [0x00d0100000 - 0x00d01fffff] size 0x00100000 gran 0x14 bus 03 prefmem PCI: 00:14.4 20 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 03 mem PCI: 00:14.4 assign_resources, bus 3 link: 0 PCI: 03:06.0 10 <- [0x00d0100000 - 0x00d0100fff] size 0x00001000 gran 0x0c prefmem PCI: 00:14.4 assign_resources, bus 3 link: 0 PCI: 00:14.5 10 <- [0x00d8308000 - 0x00d8308fff] size 0x00001000 gran 0x0c mem PCI: 00:18.3 94 <- [0x00d4000000 - 0x00d7ffffff] size 0x04000000 gran 0x1a mem PCI: 00:18.3 94 <- [0x00d4000000 - 0x00d7ffffff] size 0x04000000 gran 0x1a mem PCI: 00:18.0 assign_resources, bus 0 link: 0 PCI: 00:18.3 94 <- [0x00dc000000 - 0x00dfffffff] size 0x04000000 gran 0x1a mem PCI: 00:18.3 94 <- [0x00dc000000 - 0x00dfffffff] size 0x04000000 gran 0x1a mem PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0 Root Device assign_resources, bus 0 link: 0 Done setting resources. Show resources in subtree (Root Device)...After assigning values. Root Device child on link 0 APIC_CLUSTER: 0 APIC_CLUSTER: 0 child on link 0 APIC: 00 APIC: 00 APIC: 01 PCI_DOMAIN: 0000 child on link 0 PCI: 00:18.0 PCI_DOMAIN: 0000 resource base 1000 size 3000 align 12 gran 0 limit ffff flags 40040100 index 10000000 PCI_DOMAIN: 0000 resource base c0000000 size 20000000 align 28 gran 0 limit dfffffff flags 40040200 index 10000100 PCI_DOMAIN: 0000 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index c0010058 PCI_DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 10 PCI_DOMAIN: 0000 resource base c0000 size 6ff40000 align 0 gran 0 limit 0 flags e0004200 index 20 PCI_DOMAIN: 0000 resource base 70000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 7 PCI: 00:18.0 child on link 0 PCI: 00:00.0 PCI: 00:18.0 resource base 1000 size 3000 align 12 gran 12 limit ffff flags 60080100 index 10d8 PCI: 00:18.0 resource base c0000000 size 10200000 align 28 gran 20 limit dfffffff flags 60081200 index 10b8 PCI: 00:18.0 resource base d4000000 size 4400000 align 26 gran 20 limit dfffffff flags 60080200 index 10b0 PCI: 00:00.0 PCI: 00:01.0 child on link 0 PCI: 01:05.0 PCI: 00:01.0 resource base 1000 size 1000 align 12 gran 12 limit ffff flags 60080102 index 1c PCI: 00:01.0 resource base c0000000 size 10000000 align 28 gran 20 limit dfffffff flags 60081202 index 24 PCI: 00:01.0 resource base d8000000 size 200000 align 20 gran 20 limit dfffffff flags 60080202 index 20 PCI: 01:05.0 PCI: 01:05.0 resource base c0000000 size 10000000 align 28 gran 28 limit dfffffff flags 60001200 index 10 PCI: 01:05.0 resource base 1000 size 100 align 8 gran 8 limit ffff flags 60000100 index 14 PCI: 01:05.0 resource base d8100000 size 10000 align 16 gran 16 limit dfffffff flags 60000200 index 18 PCI: 01:05.0 resource base d8000000 size 100000 align 20 gran 20 limit dfffffff flags 60000200 index 24 PCI: 01:05.1 PCI: 01:05.1 resource base d8110000 size 4000 align 14 gran 14 limit dfffffff flags 60000200 index 10 PCI: 00:02.0 PCI: 00:03.0 PCI: 00:04.0 PCI: 00:05.0 PCI: 00:06.0 PCI: 00:07.0 PCI: 00:08.0 PCI: 00:09.0 PCI: 00:0a.0 child on link 0 PCI: 02:00.0 PCI: 00:0a.0 resource base 2000 size 1000 align 12 gran 12 limit ffff flags 60080102 index 1c PCI: 00:0a.0 resource base d0000000 size 100000 align 20 gran 20 limit dfffffff flags 60081202 index 24 PCI: 00:0a.0 resource base d8200000 size 100000 align 20 gran 20 limit dfffffff flags 60080202 index 20 PCI: 02:00.0 PCI: 02:00.0 resource base 2000 size 100 align 8 gran 8 limit ffff flags 60000100 index 10 PCI: 02:00.0 resource base d0004000 size 1000 align 12 gran 12 limit dfffffff flags 60001201 index 18 PCI: 02:00.0 resource base d0000000 size 4000 align 14 gran 14 limit dfffffff flags 60001201 index 20 PCI: 02:00.0 resource base d8200000 size 10000 align 16 gran 16 limit dfffffff flags 60002200 index 30 PCI: 00:11.0 PCI: 00:11.0 resource base 3020 size 8 align 3 gran 3 limit ffff flags 60000100 index 10 PCI: 00:11.0 resource base 3040 size 4 align 2 gran 2 limit ffff flags 60000100 index 14 PCI: 00:11.0 resource base 3028 size 8 align 3 gran 3 limit ffff flags 60000100 index 18 PCI: 00:11.0 resource base 3044 size 4 align 2 gran 2 limit ffff flags 60000100 index 1c PCI: 00:11.0 resource base 3000 size 10 align 4 gran 4 limit ffff flags 60000100 index 20 PCI: 00:11.0 resource base d8309000 size 400 align 10 gran 10 limit dfffffff flags 60000200 index 24 PCI: 00:12.0 PCI: 00:12.0 resource base d8304000 size 1000 align 12 gran 12 limit dfffffff flags 60000200 index 10 PCI: 00:12.1 PCI: 00:12.1 resource base d8305000 size 1000 align 12 gran 12 limit dfffffff flags 60000200 index 10 PCI: 00:12.2 PCI: 00:12.2 resource base d8309400 size 100 align 8 gran 8 limit dfffffff flags 60000200 index 10 PCI: 00:13.0 PCI: 00:13.0 resource base d8306000 size 1000 align 12 gran 12 limit dfffffff flags 60000200 index 10 PCI: 00:13.1 PCI: 00:13.1 resource base d8307000 size 1000 align 12 gran 12 limit dfffffff flags 60000200 index 10 PCI: 00:13.2 PCI: 00:13.2 resource base d8309500 size 100 align 8 gran 8 limit dfffffff flags 60000200 index 10 PCI: 00:14.0 child on link 0 I2C: 01:50 PCI: 00:14.0 resource base fec00000 size 1000 align 8 gran 8 limit ffffffff flags d0000200 index 74 PCI: 00:14.0 resource base fed00000 size 400 align 8 gran 8 limit ffffffff flags d0000200 index b4 PCI: 00:14.0 resource base b00 size 10 align 8 gran 8 limit ffff flags d0000100 index 90 I2C: 01:50 I2C: 01:51 I2C: 01:52 I2C: 01:53 PCI: 00:14.1 PCI: 00:14.1 resource base 3030 size 8 align 3 gran 3 limit ffff flags 60000100 index 10 PCI: 00:14.1 resource base 3048 size 4 align 2 gran 2 limit ffff flags 60000100 index 14 PCI: 00:14.1 resource base 3038 size 8 align 3 gran 3 limit ffff flags 60000100 index 18 PCI: 00:14.1 resource base 304c size 4 align 2 gran 2 limit ffff flags 60000100 index 1c PCI: 00:14.1 resource base 3010 size 10 align 4 gran 4 limit ffff flags 60000100 index 20 PCI: 00:14.2 PCI: 00:14.2 resource base d8300000 size 4000 align 14 gran 14 limit dfffffff flags 60000201 index 10 PCI: 00:14.3 child on link 0 PNP: 002e.0 PCI: 00:14.3 resource base d8309600 size 1 align 0 gran 0 limit dfffffff flags 60000200 index a0 PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 PCI: 00:14.3 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100 PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 PNP: 002e.0 PNP: 002e.0 resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 60 PNP: 002e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 PNP: 002e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 PNP: 002e.1 PNP: 002e.1 resource base 3f8 size 8 align 3 gran 3 limit fff flags e0000100 index 60 PNP: 002e.1 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 PNP: 002e.2 PNP: 002e.2 resource base 2f8 size 8 align 3 gran 3 limit fff flags c0000100 index 60 PNP: 002e.2 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 PNP: 002e.3 PNP: 002e.3 resource base 378 size 4 align 2 gran 2 limit fff flags c0000100 index 60 PNP: 002e.3 resource base 7 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 PNP: 002e.3 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 PNP: 002e.4 PNP: 002e.4 resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 60 PNP: 002e.4 resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 62 PNP: 002e.4 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 PNP: 002e.5 PNP: 002e.5 resource base 60 size 1 align 0 gran 0 limit ffffffff flags e0000100 index 60 PNP: 002e.5 resource base 64 size 1 align 0 gran 0 limit ffffffff flags e0000100 index 62 PNP: 002e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 PNP: 002e.6 PNP: 002e.6 resource base c size 1 align 0 gran 0 limit 0 flags e0000400 index 70 PNP: 002e.7 PNP: 002e.7 resource base 0 size 1 align 0 gran 0 limit ffffffff flags 100 index 60 PNP: 002e.7 resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 62 PNP: 002e.7 resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 64 PNP: 002e.7 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 PNP: 002e.8 PNP: 002e.8 resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 60 PNP: 002e.8 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 PNP: 002e.9 PNP: 002e.9 resource base 0 size 1 align 0 gran 0 limit ffffffff flags 100 index 60 PNP: 002e.a PNP: 002e.a resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 60 PNP: 002e.a resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 PCI: 00:14.4 child on link 0 PCI: 03:06.0 PCI: 00:14.4 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c PCI: 00:14.4 resource base d0100000 size 100000 align 20 gran 20 limit dfffffff flags 60081202 index 24 PCI: 00:14.4 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60080202 index 20 PCI: 03:06.0 PCI: 03:06.0 resource base d0100000 size 1000 align 12 gran 12 limit dfffffff flags 60001200 index 10 PCI: 00:14.5 PCI: 00:14.5 resource base d8308000 size 1000 align 12 gran 12 limit dfffffff flags 60000200 index 10 PCI: 00:18.0 PCI: 00:18.1 PCI: 00:18.2 PCI: 00:18.3 PCI: 00:18.3 resource base d4000000 size 4000000 align 26 gran 26 limit dfffffff flags 60000200 index 94 PCI: 00:18.4 PCI: 00:18.1 PCI: 00:18.2 PCI: 00:18.3 PCI: 00:18.3 resource base dc000000 size 4000000 align 26 gran 26 limit dfffffff flags 60000200 index 94 PCI: 00:18.4 Done allocating resources. Enabling resources... PCI: 00:18.0 cmd <- 00 PCI: 00:18.1 subsystem <- 1043/83a2 PCI: 00:18.1 cmd <- 00 PCI: 00:18.2 subsystem <- 1043/83a2 PCI: 00:18.2 cmd <- 00 PCI: 00:18.3 cmd <- 00 PCI: 00:18.4 subsystem <- 1043/83a2 PCI: 00:18.4 cmd <- 00 PCI: 00:00.0 subsystem <- 1043/83a2 PCI: 00:00.0 cmd <- 06 PCI: 00:01.0 bridge ctrl <- 000b PCI: 00:01.0 cmd <- 07 PCI: 00:0a.0 bridge ctrl <- 0003 PCI: 00:0a.0 cmd <- 07 PCI: 00:11.0 subsystem <- 1043/83a2 PCI: 00:11.0 cmd <- 03 PCI: 00:12.0 subsystem <- 1043/83a2 PCI: 00:12.0 cmd <- 02 PCI: 00:12.1 subsystem <- 1043/83a2 PCI: 00:12.1 cmd <- 02 PCI: 00:12.2 subsystem <- 1043/83a2 PCI: 00:12.2 cmd <- 02 PCI: 00:13.0 subsystem <- 1043/83a2 PCI: 00:13.0 cmd <- 02 PCI: 00:13.1 subsystem <- 1043/83a2 PCI: 00:13.1 cmd <- 02 PCI: 00:13.2 subsystem <- 1043/83a2 PCI: 00:13.2 cmd <- 02 PCI: 00:14.0 subsystem <- 1043/83a2 PCI: 00:14.0 cmd <- 403 PCI: 00:14.1 subsystem <- 1043/83a2 PCI: 00:14.1 cmd <- 01 PCI: 00:14.2 subsystem <- 1043/83a2 PCI: 00:14.2 cmd <- 02 PCI: 00:14.3 subsystem <- 1043/83a2 PCI: 00:14.3 cmd <- 0f sb700 lpc decode:PNP: 002e.1, base=0x000003f8, end=0x000003ff sb700 lpc decode:PNP: 002e.5, base=0x00000060, end=0x00000060 sb700 lpc decode:PNP: 002e.5, base=0x00000064, end=0x00000064 PCI: 00:14.4 bridge ctrl <- 0003 PCI: 00:14.4 cmd <- 07 PCI: 00:14.5 subsystem <- 1043/83a2 PCI: 00:14.5 cmd <- 02 PCI: 00:18.0 cmd <- 00 PCI: 00:18.1 cmd <- 00 PCI: 00:18.2 cmd <- 00 PCI: 00:18.3 cmd <- 00 PCI: 00:18.4 cmd <- 00 PCI: 01:05.0 cmd <- 03 PCI: 01:05.1 cmd <- 02 PCI: 02:00.0 cmd <- 03 PCI: 03:06.0 cmd <- 02 done. Initializing devices... Root Device init APIC_CLUSTER: 0 init start_eip=0x0000c000, offset=0x00200000, code_size=0x0000005b Initializing CPU #0 CPU: vendor AMD device 100f63 CPU: family 10, model 06, stepping 03 nodeid = 00, coreid = 00 Enabling cache Setting fixed MTRRs(0-88) type: UC Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM DONE fixed MTRRs Setting variable MTRR 0, base: 0MB, range: 2048MB, type WB ADDRESS_MASK_HIGH=0xffff Setting variable MTRR 1, base: 1792MB, range: 256MB, type UC ADDRESS_MASK_HIGH=0xffff DONE variable MTRRs Clear out the extra MTRR's call enable_var_mtrr() Leave x86_setup_var_mtrrs MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled Setting up local apic... apic_id: 0x00 done. CPU model: AMD Athlon(tm) II X2 245e Processor siblings = 01, CPU #0 initialized Asserting INIT. Waiting for send to finish... +Deasserting INIT. Waiting for send to finish... +#startup loops: 1. Sending STARTUP #1 to 1. After apic_write. Startup point 1. Waiting for send to finish... +After Startup. Initializing CPU #1 Waiting for 1 CPUS to stop CPU: vendor AMD device 100f63 CPU: family 10, model 06, stepping 03 nodeid = 00, coreid = 01 Enabling cache Setting fixed MTRRs(0-88) type: UC Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM DONE fixed MTRRs Setting variable MTRR 0, base: 0MB, range: 2048MB, type WB ADDRESS_MASK_HIGH=0xffff Setting variable MTRR 1, base: 1792MB, range: 256MB, type UC ADDRESS_MASK_HIGH=0xffff DONE variable MTRRs Clear out the extra MTRR's call enable_var_mtrr() Leave x86_setup_var_mtrrs MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled Setting up local apic... apic_id: 0x01 done. CPU model: AMD Athlon(tm) II X2 245e Processor siblings = 01, CPU #1 initialized All AP CPUs stopped PCI: 00:18.0 init PCI: 00:18.1 init Searching for pci1022,1201.rom Check cmos_layout.bin Check fallback/romstage Check fallback/coreboot_ram Check fallback/payload Check config Check Could not find file 'pci1022,1201.rom'. PCI: 00:18.2 init Searching for pci1022,1202.rom Check cmos_layout.bin Check fallback/romstage Check fallback/coreboot_ram Check fallback/payload Check config Check Could not find file 'pci1022,1202.rom'. PCI: 00:18.3 init NB: Function 3 Misc Control.. done. PCI: 00:18.4 init Searching for pci1022,1204.rom Check cmos_layout.bin Check fallback/romstage Check fallback/coreboot_ram Check fallback/payload Check config Check Could not find file 'pci1022,1204.rom'. PCI: 00:00.0 init pcie_init in rs780_ht.c PCI: 00:11.0 init sata_bar0=3020 sata_bar1=3040 sata_bar2=3028 sata_bar3=3044 sata_bar4=3000 sata_bar5=d8309000 SATA port 0 status = 23 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet 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detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 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detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet 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detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=a0, 0x7=80 drive detection not yet completed, waiting... 0x6=0, 0x7=50 drive no longer selected after 2450 ms, retrying init drive detection done after 0 ms Primary Master device is ready after 2 tries SATA port 1 status = 0 No Primary Slave SATA drive on Slot1 SATA port 2 status = 13 0x6=ff, 0x7=7f drive no longer selected after 0 ms, retrying init 0x6=ff, 0x7=7f drive no longer selected after 0 ms, retrying init 0x6=ff, 0x7=7f drive no longer selected after 0 ms, retrying init 0x6=ff, 0x7=7f drive no longer selected after 0 ms, retrying init 0x6=ff, 0x7=7f drive no longer selected after 0 ms, retrying init 0x6=ff, 0x7=7f drive no longer selected after 0 ms, retrying init 0x6=ff, 0x7=7f drive no longer selected after 0 ms, retrying init 0x6=ff, 0x7=7f drive no longer selected after 0 ms, retrying init 0x6=ff, 0x7=7f drive no longer selected after 0 ms, retrying init 0x6=ff, 0x7=7f drive no longer selected after 0 ms, retrying init Secondary Master device is not ready after 10 tries SATA port 3 status = 0 No Secondary Slave SATA drive on Slot3 PCI: 00:12.0 init PCI: 00:12.1 init PCI: 00:12.2 init usb2_bar0=0xd8309400 rpr 6.23, final dword=809e01c8 PCI: 00:13.0 init PCI: 00:13.1 init PCI: 00:13.2 init usb2_bar0=0xd8309500 rpr 6.23, final dword=809e01c8 PCI: 00:14.0 init sm_init(). IOAPIC: Clearing IOAPIC at 0xfec00000 IOAPIC: 23 interrupts IOAPIC: reg 0x00000000 value 0x00000000 0x00010000 IOAPIC: reg 0x00000001 value 0x00000000 0x00010000 IOAPIC: reg 0x00000002 value 0x00000000 0x00010000 IOAPIC: reg 0x00000003 value 0x00000000 0x00010000 IOAPIC: reg 0x00000004 value 0x00000000 0x00010000 IOAPIC: reg 0x00000005 value 0x00000000 0x00010000 IOAPIC: reg 0x00000006 value 0x00000000 0x00010000 IOAPIC: reg 0x00000007 value 0x00000000 0x00010000 IOAPIC: reg 0x00000008 value 0x00000000 0x00010000 IOAPIC: reg 0x00000009 value 0x00000000 0x00010000 IOAPIC: reg 0x0000000a value 0x00000000 0x00010000 IOAPIC: reg 0x0000000b value 0x00000000 0x00010000 IOAPIC: reg 0x0000000c value 0x00000000 0x00010000 IOAPIC: reg 0x0000000d value 0x00000000 0x00010000 IOAPIC: reg 0x0000000e value 0x00000000 0x00010000 IOAPIC: reg 0x0000000f value 0x00000000 0x00010000 IOAPIC: reg 0x00000010 value 0x00000000 0x00010000 IOAPIC: reg 0x00000011 value 0x00000000 0x00010000 IOAPIC: reg 0x00000012 value 0x00000000 0x00010000 IOAPIC: reg 0x00000013 value 0x00000000 0x00010000 IOAPIC: reg 0x00000014 value 0x00000000 0x00010000 IOAPIC: reg 0x00000015 value 0x00000000 0x00010000 IOAPIC: reg 0x00000016 value 0x00000000 0x00010000 set power off after power fail ++++++++++no set NMI+++++ RTC Init sm_init() end PCI: 00:14.1 init Searching for pci1002,439c.rom Check cmos_layout.bin Check fallback/romstage Check fallback/coreboot_ram Check fallback/payload Check config Check Could not find file 'pci1002,439c.rom'. PCI: 00:14.2 init base = 0xd8300000 codec_mask = 05 2(th) codec viddid: ffffffff 0(th) codec viddid: ffffffff PCI: 00:14.3 init Skipping isa_dma_init() to avoid getting stuck. PCI: 00:14.4 init PCI: 00:14.5 init PCI: 00:18.0 init PCI: 00:18.1 init Searching for pci1022,1201.rom Check cmos_layout.bin Check fallback/romstage Check fallback/coreboot_ram Check fallback/payload Check config Check Could not find file 'pci1022,1201.rom'. PCI: 00:18.2 init Searching for pci1022,1202.rom Check cmos_layout.bin Check fallback/romstage Check fallback/coreboot_ram Check fallback/payload Check config Check Could not find file 'pci1022,1202.rom'. PCI: 00:18.3 init NB: Function 3 Misc Control.. done. PCI: 00:18.4 init Searching for pci1022,1204.rom Check cmos_layout.bin Check fallback/romstage Check fallback/coreboot_ram Check fallback/payload Check config Check Could not find file 'pci1022,1204.rom'. PCI: 01:05.0 init Searching for pci1002,9616.rom Check cmos_layout.bin Check fallback/romstage Check fallback/coreboot_ram Check fallback/payload Check config Check Could not find file 'pci1002,9616.rom'. PCI: 01:05.1 init Searching for pci1002,960f.rom Check cmos_layout.bin Check fallback/romstage Check fallback/coreboot_ram Check fallback/payload Check config Check Could not find file 'pci1002,960f.rom'. PCI: 02:00.0 init Searching for pci10ec,8168.rom Check cmos_layout.bin Check fallback/romstage Check fallback/coreboot_ram Check fallback/payload Check config Check Could not find file 'pci10ec,8168.rom'. On card, ROM address for PCI: 02:00.0 = d8200000 PCI expansion ROM, signature 0x0000, INIT size 0x0000, data ptr 0x0000 Incorrect expansion ROM header signature 0000 PNP: 002e.1 init PNP: 002e.5 init Keyboard init... No PS/2 keyboard detected. PNP: 002e.6 init PCI: 03:06.0 init Searching for pci1822,4e35.rom Check cmos_layout.bin Check fallback/romstage Check fallback/coreboot_ram Check fallback/payload Check config Check Could not find file 'pci1822,4e35.rom'. Devices initialized Show all devs...After init. Root Device: enabled 1 APIC_CLUSTER: 0: enabled 1 APIC: 00: enabled 1 PCI_DOMAIN: 0000: enabled 1 PCI: 00:18.0: enabled 1 PCI: 00:00.0: enabled 1 PCI: 00:01.0: enabled 1 PCI: 00:02.0: enabled 0 PCI: 00:03.0: enabled 0 PCI: 00:04.0: enabled 0 PCI: 00:05.0: enabled 0 PCI: 00:06.0: enabled 0 PCI: 00:07.0: enabled 0 PCI: 00:08.0: enabled 0 PCI: 00:09.0: enabled 0 PCI: 00:0a.0: enabled 1 PCI: 00:11.0: enabled 1 PCI: 00:12.0: enabled 1 PCI: 00:12.1: enabled 1 PCI: 00:12.2: enabled 1 PCI: 00:13.0: enabled 1 PCI: 00:13.1: enabled 1 PCI: 00:13.2: enabled 1 PCI: 00:14.0: enabled 1 I2C: 01:50: enabled 1 I2C: 01:51: enabled 1 I2C: 01:52: enabled 1 I2C: 01:53: enabled 1 PCI: 00:14.1: enabled 1 PCI: 00:14.2: enabled 1 PCI: 00:14.3: enabled 1 PNP: 002e.0: enabled 0 PNP: 002e.1: enabled 1 PNP: 002e.2: enabled 0 PNP: 002e.3: enabled 0 PNP: 002e.4: enabled 0 PNP: 002e.5: enabled 1 PNP: 002e.6: enabled 1 PNP: 002e.7: enabled 0 PNP: 002e.8: enabled 0 PNP: 002e.9: enabled 0 PNP: 002e.a: enabled 0 PCI: 00:14.4: enabled 1 PCI: 00:14.5: enabled 1 PCI: 00:18.1: enabled 1 PCI: 00:18.2: enabled 1 PCI: 00:18.3: enabled 1 PCI: 00:18.4: enabled 1 APIC: 01: enabled 1 PCI: 00:18.0: enabled 1 PCI: 00:18.1: enabled 1 PCI: 00:18.2: enabled 1 PCI: 00:18.3: enabled 1 PCI: 00:18.4: enabled 1 PCI: 01:05.0: enabled 1 PCI: 01:05.1: enabled 1 PCI: 02:00.0: enabled 1 PCI: 03:06.0: enabled 1 Initializing CBMEM area to 0x6fff0000 (65536 bytes) Adding CBMEM entry as no. 1 Moving GDT to 6fff0200...ok High Tables Base is 6fff0000. Copying Interrupt Routing Table to 0x000f0000... done. Adding CBMEM entry as no. 2 Copying Interrupt Routing Table to 0x6fff0400... done. PIRQ table: 336 bytes. Wrote the mp table end at: 000f0410 - 000f0514 Adding CBMEM entry as no. 3 Wrote the mp table end at: 6fff1410 - 6fff1514 MP table: 276 bytes. Adding CBMEM entry as no. 4 ACPI: Writing ACPI tables at 6fff2400... ACPI: * HPET at 6fff24c8 ACPI: added table 1/32, length now 40 ACPI: * MADT at 6fff2500 ACPI: added table 2/32, length now 44 ACPI: * SRAT at 6fff2560 SRAT: lapic cpu_index=00, node_id=00, apic_id=00 SRAT: lapic cpu_index=01, node_id=00, apic_id=01 set_srat_mem: dev PCI_DOMAIN: 0000, res->index=0010 startk=00000000, sizek=00000280 set_srat_mem: dev PCI_DOMAIN: 0000, res->index=0020 startk=00000300, sizek=001bfd00 ACPI: added table 3/32, length now 48 ACPI: * SLIT at 6fff2600 ACPI: added table 4/32, length now 52 ACPI: * SSDT at 6fff2630 ACPI: added table 5/32, length now 56 ACPI: * SSDT for PState at 6fff2c65 ACPI: * DSDT at 6fff2c68 ACPI: * DSDT @ 6fff2c68 Length 298c ACPI: * FACS at 6fff55f8 ACPI: * FADT at 6fff5638 pm_base: 0x0800 ACPI: added table 6/32, length now 60 ACPI: done. ACPI tables: 13100 bytes. Adding CBMEM entry as no. 5 smbios_write_tables: 6fffd800 Root Device (ASUS M4A785T-M Mainboard) APIC_CLUSTER: 0 (AMD FAM10 Root Complex) APIC: 00 (socket AM3) PCI_DOMAIN: 0000 (AMD FAM10 Root Complex) PCI: 00:18.0 (AMD FAM10 Northbridge) PCI: 00:00.0 (ATI RS780) PCI: 00:01.0 (ATI RS780) PCI: 00:02.0 (ATI RS780) PCI: 00:03.0 (ATI RS780) PCI: 00:04.0 (ATI RS780) PCI: 00:05.0 (ATI RS780) PCI: 00:06.0 (ATI RS780) PCI: 00:07.0 (ATI RS780) PCI: 00:08.0 (ATI RS780) PCI: 00:09.0 (ATI RS780) PCI: 00:0a.0 (ATI RS780) PCI: 00:11.0 (ATI SB700) PCI: 00:12.0 (ATI SB700) PCI: 00:12.1 (ATI SB700) PCI: 00:12.2 (ATI SB700) PCI: 00:13.0 (ATI SB700) PCI: 00:13.1 (ATI SB700) PCI: 00:13.2 (ATI SB700) PCI: 00:14.0 (ATI SB700) I2C: 01:50 () I2C: 01:51 () I2C: 01:52 () I2C: 01:53 () PCI: 00:14.1 (ATI SB700) PCI: 00:14.2 (ATI SB700) PCI: 00:14.3 (ATI SB700) PNP: 002e.0 (ITE IT8712F Super I/O) PNP: 002e.1 (ITE IT8712F Super I/O) PNP: 002e.2 (ITE IT8712F Super I/O) PNP: 002e.3 (ITE IT8712F Super I/O) PNP: 002e.4 (ITE IT8712F Super I/O) PNP: 002e.5 (ITE IT8712F Super I/O) PNP: 002e.6 (ITE IT8712F Super I/O) PNP: 002e.7 (ITE IT8712F Super I/O) PNP: 002e.8 (ITE IT8712F Super I/O) PNP: 002e.9 (ITE IT8712F Super I/O) PNP: 002e.a (ITE IT8712F Super I/O) PCI: 00:14.4 (ATI SB700) PCI: 00:14.5 (ATI SB700) PCI: 00:18.1 (AMD FAM10 Northbridge) PCI: 00:18.2 (AMD FAM10 Northbridge) PCI: 00:18.3 (AMD FAM10 Northbridge) PCI: 00:18.4 (AMD FAM10 Northbridge) APIC: 01 () PCI: 00:18.0 () PCI: 00:18.1 () PCI: 00:18.2 () PCI: 00:18.3 () PCI: 00:18.4 () PCI: 01:05.0 () PCI: 01:05.1 () PCI: 02:00.0 () PCI: 03:06.0 () SMBIOS tables: 282 bytes. Adding CBMEM entry as no. 6 Writing high table forward entry at 0x00000500 Wrote coreboot table at: 00000500 - 00000518 checksum afde New low_table_end: 0x00000518 Now going to write high coreboot table at 0x6fffe000 rom_table_end = 0x6fffe000 Adjust low_table_end from 0x00000518 to 0x00001000 Adjust rom_table_end from 0x6fffe000 to 0x70000000 Adding high table area coreboot memory table: 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES 1. 0000000000001000-000000000009ffff: RAM 2. 00000000000c0000-000000006ffeffff: RAM 3. 000000006fff0000-000000006fffffff: CONFIGURATION TABLES 4. 0000000070000000-000000007fffffff: RESERVED 5. 00000000e0000000-00000000efffffff: RESERVED 6. 00000000fec00000-00000000fec00fff: RESERVED 7. 00000000fed00000-00000000fed003ff: RESERVED Wrote coreboot table at: 6fffe000 - 6fffe208 checksum af8c coreboot table: 520 bytes. Multiboot Information structure has been written. 0. FREE SPACE 70000000 00000000 1. GDT 6fff0200 00000200 2. IRQ TABLE 6fff0400 00001000 3. SMP TABLE 6fff1400 00001000 4. ACPI 6fff2400 0000b400 5. SMBIOS 6fffd800 00000800 6. COREBOOT 6fffe000 00002000 Searching for fallback/payload Check cmos_layout.bin Check fallback/romstage Check fallback/coreboot_ram Check fallback/payload Got a payload Loading segment from rom address 0xfff275f8 data (compression=1) New segment dstaddr 0xe7e04 memsize 0x181fc srcaddr 0xfff27630 filesize 0xc1f9 (cleaned up) New segment addr 0xe7e04 size 0x181fc offset 0xfff27630 filesize 0xc1f9 Loading segment from rom address 0xfff27614 Entry Point 0x00000000 Loading Segment: addr: 0x00000000000e7e04 memsz: 0x00000000000181fc filesz: 0x000000000000c1f9 lb: [0x0000000000200000, 0x0000000000330000) Post relocation: addr: 0x00000000000e7e04 memsz: 0x00000000000181fc filesz: 0x000000000000c1f9 using LZMA [ 0x000e7e04, 00100000, 0x00100000) <- fff27630 dest 000e7e04, end 00100000, bouncebuffer 6fd90000 Loaded segments Jumping to boot code at fc8c0 entry = 0x000fc8c0 lb_start = 0x00200000 lb_size = 0x00130000 adjust = 0x6fcc0000 buffer = 0x6fd90000 elf_boot_notes = 0x00228dcc adjusted_boot_notes = 0x6fee8dcc Start bios (version 1.6.3-20111218_193902-odin) Found mainboard ASUS M4A78LT-M Found CBFS header at 0xfffffc90 Ram Size=0x6fff0000 (0x0000000000000000 high) Relocating init from 0x000e8450 to 0x6ffd57a0 (size 42812) CPU Mhz=2910 Found 25 PCI devices (max PCI bus is 03) Found 2 cpu(s) max supported 2 cpu(s) Copying PIR from 0x6fff0400 to 0x000fdaa0 Copying MPTABLE from 0x6fff1400/6fff1410 to 0x000fd980 Copying ACPI RSDP from 0x6fff2400 to 0x000fd960 Copying SMBIOS entry point from 0x6fffd800 to 0x000fd940 Scan for VGA option rom EHCI init on dev 00:12.2 (regs=0xd8309420) EHCI init on dev 00:13.2 (regs=0xd8309520) OHCI init on dev 00:14.5 (regs=0xd8308000) Found 0 lpt ports Found 4 serial ports ATA controller 1 at 3020/3040/0 (irq 0 dev 88) ATA controller 2 at 3028/3044/0 (irq 0 dev 88) ATA controller 3 at 1f0/3f4/0 (irq 14 dev a1) ATA controller 4 at 170/374/0 (irq 15 dev a1) OHCI init on dev 00:13.0 (regs=0xd8306000) OHCI init on dev 00:13.1 (regs=0xd8307000) ata0-0: WDC WD10EARS-00Y5B1 ATA-8 Hard-Disk (931 GiBytes) Searching bootorder for: /pci@i0cf8/*@11/drive@0/disk@0 DVD/CD [ata0-1: TSSTcorpCD/DVDW SH-S183L ATAPI-0 DVD/CD] Searching bootorder for: /pci@i0cf8/*@11/drive@0/disk@1 Got ps2 nak (status=51) All threads complete. Scan for option roms Press F12 for boot menu. drive 0x000fd8d0: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=1953525168 ebda moved from 9fc00 to 9f400 Returned 65536 bytes of ZoneHigh e820 map has 8 items: 0: 0000000000000000 - 000000000009f400 = 1 RAM 1: 000000000009f400 - 00000000000a0000 = 2 RESERVED 2: 00000000000f0000 - 0000000000100000 = 2 RESERVED 3: 0000000000100000 - 000000006fff0000 = 1 RAM 4: 000000006fff0000 - 0000000080000000 = 2 RESERVED 5: 00000000e0000000 - 00000000f0000000 = 2 RESERVED 6: 00000000fec00000 - 00000000fec01000 = 2 RESERVED 7: 00000000fed00000 - 00000000fed00400 = 2 RESERVED enter handle_19: NULL Booting from DVD/CD... Device reports MEDIUM NOT PRESENT atapi_is_ready returned -1 Boot failed: Could not read from CDROM (code 0003) enter handle_18: NULL Booting from Hard Disk... Booting from 0000:7c00