Index: svn/src/mainboard/tyan/s2895/Options.lb
===================================================================
--- svn.orig/src/mainboard/tyan/s2895/Options.lb
+++ svn/src/mainboard/tyan/s2895/Options.lb
@@ -30,6 +30,11 @@ uses USE_OPTION_TABLE
 uses LB_CKS_RANGE_START
 uses LB_CKS_RANGE_END
 uses LB_CKS_LOC
+uses HAVE_ACPI_TABLES
+uses ACPI_SSDTX_NUM
+uses HAVE_MAINBOARD_RESOURCES
+uses HAVE_HIGH_TABLES
+uses HAVE_SMI_HANDLER
 uses MAINBOARD
 uses MAINBOARD_PART_NUMBER
 uses MAINBOARD_VENDOR
@@ -77,11 +82,7 @@ uses SB_HT_CHAIN_UNITID_OFFSET_ONLY
 uses CONFIG_LB_MEM_TOPK
 
 ## ROM_SIZE is the size of boot ROM that this board will use.
-#512K bytes 
-default ROM_SIZE=524288
-
-#1M bytes
-#default ROM_SIZE=1048576
+default ROM_SIZE=1024*1024
 
 ##
 ## FALLBACK_SIZE is the amount of the ROM the complete fallback image will use
@@ -103,6 +104,11 @@ default HAVE_FALLBACK_BOOT=1
 default HAVE_HARD_RESET=1
 
 ##
+## Build SMI handler
+##
+default HAVE_SMI_HANDLER=0
+
+##
 ## Build code to export a programmable irq routing table
 ##
 default HAVE_PIRQ_TABLE=1
@@ -115,6 +121,15 @@ default IRQ_SLOT_COUNT=11
 default HAVE_MP_TABLE=1
 
 ##
+## Build code to provide ACPI support
+##
+default HAVE_ACPI_TABLES=1
+default HAVE_MAINBOARD_RESOURCES=1
+default HAVE_HIGH_TABLES=0
+## extra SSDT num
+default ACPI_SSDTX_NUM=1
+
+##
 ## Build code to export a CMOS option table
 ##
 default HAVE_OPTION_TABLE=1
@@ -126,6 +141,10 @@ default LB_CKS_RANGE_START=49
 default LB_CKS_RANGE_END=122
 default LB_CKS_LOC=123
 
+#VGA Console
+default CONFIG_CONSOLE_VGA=1
+default CONFIG_PCI_ROM_RUN=1
+
 ##
 ## Build code for SMP support
 ## Only worry about 2 micro processors
Index: svn/src/mainboard/tyan/s2895/mainboard.c
===================================================================
--- svn.orig/src/mainboard/tyan/s2895/mainboard.c
+++ svn/src/mainboard/tyan/s2895/mainboard.c
@@ -1,6 +1,22 @@
 #include <device/device.h>
+#include <console/console.h>
+#include <boot/tables.h>
 #include "chip.h"
 
+/* in arch/i386/boot/tables.c */
+extern uint64_t high_tables_base, high_tables_size;
+
+int add_mainboard_resources(struct lb_memory *mem)
+{
+#if HAVE_HIGH_TABLES == 1
+	printk_debug("Adding high table area\n");
+	lb_add_memory_range(mem, LB_MEM_TABLE,
+		high_tables_base, high_tables_size);
+#endif
+	return 0;
+}
+
+
 #if CONFIG_CHIP_NAME == 1
 struct chip_operations mainboard_tyan_s2895_ops = {
 	CHIP_NAME("Tyan S2895 Mainboard")
Index: svn/src/northbridge/amd/amdk8/northbridge.c
===================================================================
--- svn.orig/src/northbridge/amd/amdk8/northbridge.c
+++ svn/src/northbridge/amd/amdk8/northbridge.c
@@ -896,6 +896,11 @@ static uint32_t hoist_memory(unsigned lo
 }
 #endif
 
+#if HAVE_HIGH_TABLES==1
+#define HIGH_TABLES_SIZE 64	// maximum size of high tables in KB
+extern uint64_t high_tables_base, high_tables_size;
+#endif
+
 static void pci_domain_set_resources(device_t dev)
 {
 #if CONFIG_PCI_64BIT_PREF_MEM == 1
@@ -1096,8 +1101,18 @@ static void pci_domain_set_resources(dev
 		}
 		ram_resource(dev, (idx | i), basek, sizek);
 		idx += 0x10;
+#if HAVE_HIGH_TABLES==1
+		printk_debug("%d: mmio_basek=%08lx, basek=%08x, limitk=%08x\n",
+			     i, mmio_basek, basek, limitk);
+		if (i==0) {
+		/* Leave some space for ACPI, PIRQ and MP tables */
+			high_tables_base = (limitk - HIGH_TABLES_SIZE) * 1024;
+			high_tables_size = HIGH_TABLES_SIZE * 1024;
+		}
+#endif
 	}
 	assign_resources(&dev->link[0]);
+
 }
 
 static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max)
Index: svn/src/mainboard/tyan/s2895/acpi_tables.c
===================================================================
--- /dev/null
+++ svn/src/mainboard/tyan/s2895/acpi_tables.c
@@ -0,0 +1,158 @@
+/*
+ * Island Aruma ACPI support
+ * written by Stefan Reinauer <stepan@openbios.org>
+ *  (C) 2005 Stefan Reinauer
+ *
+ *
+ *  Copyright 2005 AMD
+ *  2005.9 yhlu modify that to more dynamic for AMD Opteron Based MB
+ */
+
+#include <console/console.h>
+#include <string.h>
+#include <arch/acpi.h>
+#include <device/pci.h>
+#include <device/pci_ids.h>
+#include <cpu/x86/msr.h>
+#include <cpu/amd/mtrr.h>
+#include <cpu/amd/amdk8_sysconf.h>
+
+#define DUMP_ACPI_TABLES 0
+
+#if DUMP_ACPI_TABLES == 1
+static void dump_mem(unsigned start, unsigned end)
+{
+
+	unsigned i;
+        print_debug("dump_mem:");
+        for(i=start;i<end;i++) {
+                if((i & 0xf)==0) {
+                        printk_debug("\n%08x:", i);
+                }
+                printk_debug(" %02x", (unsigned char)*((unsigned char *)i));
+        }
+        print_debug("\n");
+ }
+#endif
+
+unsigned long acpi_fill_mcfg(unsigned long current)
+{
+	return current;
+}
+
+extern unsigned char AmlCode[];
+
+#define IO_APIC_ADDR	0xfec00000UL
+
+/* APIC */
+unsigned long acpi_fill_madt(unsigned long current)
+{
+	unsigned long apic_addr;
+
+	/* create all subtables for processors */
+	current = acpi_create_madt_lapics(current);
+
+	/* Write NVIDIA CK804 IOAPIC. */
+	current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current, 4,
+					   IO_APIC_ADDR, 0);
+
+	/* Write AMD 8131 two IOAPICs. */
+	/* FIXME should find device and ask for address! */
+	apic_addr = 0xfc200000;
+	current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current, 5,
+					   apic_addr, 0);
+	apic_addr = 0xfc201000;
+	current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current, 6,
+					   apic_addr, 0);
+
+	current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
+						current, 0, 9, 9, 0xF);
+	/* 0: mean bus 0--->ISA */
+	/* 0: PIC 0 */
+	/* 2: APIC 2 */
+	/* 5 mean: 0101 --> Edige-triggered, Active high */
+
+	/* create all subtables for processors */
+	/* acpi_create_madt_lapic_nmis returns current, not size. */
+	current = acpi_create_madt_lapic_nmis(current, 5, 1);
+
+	return current;
+}
+
+#define ALIGN_CURRENT current = ((current + 0x0f) & -0x10)
+
+unsigned long write_acpi_tables(unsigned long start)
+{
+	unsigned long current;
+	acpi_rsdp_t *rsdp;
+	acpi_rsdt_t *rsdt;
+	acpi_srat_t *srat;
+	acpi_fadt_t *fadt;
+	acpi_madt_t *madt;
+	acpi_facs_t *facs;
+	acpi_header_t *dsdt;
+
+	/* Align ACPI tables to 16byte */
+	start = (start + 0x0f) & -0x10;
+	current = start;
+
+	printk_info("ACPI: Writing ACPI tables at %lx.\n", start);
+
+	/* We need at least an RSDP and an RSDT Table */
+	rsdp = (acpi_rsdp_t *) current;
+	current += sizeof(acpi_rsdp_t);
+	ALIGN_CURRENT;
+	rsdt = (acpi_rsdt_t *) current;
+	current += sizeof(acpi_rsdt_t);
+	ALIGN_CURRENT;
+
+	/* clear all table memory */
+	memset((void *) start, 0, current - start);
+
+	acpi_write_rsdp(rsdp, rsdt);
+
+	/* RSDT is the table directory, so it gets filled by acpi_add_table. */
+	acpi_write_rsdt(rsdt);
+
+	/* DSDT */
+	printk_debug("ACPI:    * DSDT %p\n", (void *)current);
+	dsdt = (acpi_header_t *)current;
+	current += ((acpi_header_t *)AmlCode)->length;
+	memcpy((void*)dsdt,(void*)AmlCode, ((acpi_header_t*)AmlCode)->length);
+	ALIGN_CURRENT;
+
+	printk_debug("ACPI:    * DSDT @ %p Length %x\n",dsdt,dsdt->length);
+
+	printk_debug("ACPI:    * FACP (FADT) %p\n", (void *)current);
+	fadt = (acpi_fadt_t *) current;
+	acpi_add_table(rsdt, fadt);
+	current += sizeof(acpi_fadt_t);
+	ALIGN_CURRENT;
+
+	printk_debug("ACPI:    * SRAT %p\n", (void *)current);
+	srat = (acpi_srat_t *) current;
+	acpi_create_srat(srat);
+	acpi_add_table(rsdt, srat);
+	current += srat->header.length;
+	ALIGN_CURRENT;
+
+	printk_debug("ACPI:    * APIC/MADT %p\n", (void *)current);
+	madt = (acpi_madt_t *) current;
+	acpi_create_madt(madt);
+	acpi_add_table(rsdt, madt);
+	current += madt->header.length;
+	ALIGN_CURRENT;
+
+	printk_debug("ACPI:    * FACS %p\n", (void *)current);
+	facs = (acpi_facs_t *) current;
+	acpi_create_facs(facs);
+	current += sizeof(acpi_facs_t);
+	ALIGN_CURRENT;
+
+	/* Add FADT now that we have facs and dsdt. */
+	acpi_create_fadt(fadt, facs, dsdt);
+
+
+	printk_info("ACPI: done %p.\n", (void *)current);
+	return current;
+}
Index: svn/src/mainboard/tyan/s2895/Config.lb
===================================================================
--- svn.orig/src/mainboard/tyan/s2895/Config.lb
+++ svn/src/mainboard/tyan/s2895/Config.lb
@@ -46,6 +46,23 @@ if HAVE_MP_TABLE object mptable.o end
 if HAVE_PIRQ_TABLE object irq_tables.o end
 #object reset.o
 
+if HAVE_ACPI_TABLES
+        object acpi_tables.o
+	makerule fadt.c
+		depends "$(MAINBOARD)/acpi/fadt.c"
+		action  "cp $(MAINBOARD)/acpi/fadt.c fadt.c"
+	end
+        object fadt.o
+	makerule dsdt.c
+		depends "$(MAINBOARD)/dsdt.dsl"
+		action  "iasl -p $(PWD)/dsdt -tc $(MAINBOARD)/dsdt.dsl"
+		action  "mv dsdt.hex dsdt.c"
+	end
+        object ./dsdt.o
+	#./ssdt.o is moved to northbridge/amd/amdk8/Config.lb
+
+end
+
 if USE_DCACHE_RAM
 
 if CONFIG_USE_INIT
@@ -303,12 +320,7 @@ chip northbridge/amd/amdk8/root_complex
 					# the on/off keyword is mandatory
 					device pci 0.0 on end
 					device pci 0.1 on end
-					device pci 1.0 on
-						chip drivers/pci/onboard
-							device pci 6.0 on end # lsi scsi
-							device pci 6.1 on end
-						end
-					end
+					device pci 1.0 on end
 					device pci 1.1 on end
 				end
 			end # device pci 18.0
Index: svn/src/mainboard/tyan/s2895/fadt.c
===================================================================
--- /dev/null
+++ svn/src/mainboard/tyan/s2895/fadt.c
@@ -0,0 +1,147 @@
+/*
+ * ACPI - create the Fixed ACPI Description Tables (FADT)
+ * (C) Copyright 2005 Stefan Reinauer <stepan@openbios.org>
+ */
+
+#include <string.h>
+#include <console/console.h>
+#include <arch/acpi.h>
+
+//extern unsigned pm_base;	/* pm_base should be set in sb acpi */
+unsigned pm_base = 0x8000;
+
+void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
+{
+	acpi_header_t *header = &(fadt->header);
+
+	printk_debug("pm_base: 0x%04x\n", pm_base);
+
+	/* Prepare the header */
+	memset((void *)fadt, 0, sizeof(acpi_fadt_t));
+	memcpy(header->signature, "FACP", 4);
+#ifdef LONG_FADT
+	header->length = 244;
+#else
+	header->length = 0x74;
+#endif
+	header->revision = 1;
+	memcpy(header->oem_id, "COREBO", 6);
+	memcpy(header->oem_table_id, "COREBOOT", 8);
+	memcpy(header->asl_compiler_id, "IASL", 4);
+	header->asl_compiler_revision = 0;
+
+	fadt->firmware_ctrl = (u32)facs;
+	fadt->dsdt = (u32)dsdt;
+	// 3=Workstation,4=Enterprise Server, 7=Performance Server
+	fadt->preferred_pm_profile = 0;
+	fadt->sci_int = 9;
+	// disable system management mode by setting to 0:
+	fadt->smi_cmd = 0; // NVIDIA has 0x842E
+	fadt->acpi_enable = 0;
+	fadt->acpi_disable = 0;
+	fadt->s4bios_req = 0x0;
+	fadt->pstate_cnt = 0x0;
+
+	fadt->pm1a_evt_blk = pm_base;
+	fadt->pm1b_evt_blk = 0x0000;
+	fadt->pm1a_cnt_blk = pm_base + 0x04;
+	fadt->pm1b_cnt_blk = 0x0000;
+	fadt->pm2_cnt_blk = pm_base + 0x1c;
+	fadt->pm_tmr_blk = pm_base + 0x08;
+	fadt->gpe0_blk = pm_base + 0x20;
+	fadt->gpe1_blk = 0x0000;
+
+	fadt->pm1_evt_len = 4;
+	fadt->pm1_cnt_len = 2;
+	fadt->pm2_cnt_len = 1;
+	fadt->pm_tmr_len = 4;
+	fadt->gpe0_blk_len = 8;
+	fadt->gpe1_blk_len = 0;
+	fadt->gpe1_base = 0;
+	fadt->cst_cnt = 0;
+	fadt->p_lvl2_lat = 0xffff;
+	fadt->p_lvl3_lat = 0xffff;
+	fadt->flush_size = 0;
+	fadt->flush_stride = 0;
+	fadt->duty_offset = 1;
+	fadt->duty_width = 0;
+	fadt->day_alrm = 0x7d;
+	fadt->mon_alrm = 0x7e;
+	fadt->century = 0x32;
+	fadt->iapc_boot_arch = 0;
+	fadt->flags = 0xa5;
+
+#ifdef LONG_FADT
+	fadt->res2 = 0;
+
+	fadt->reset_reg.space_id = 1;
+	fadt->reset_reg.bit_width = 8;
+	fadt->reset_reg.bit_offset = 0;
+	fadt->reset_reg.resv = 0;
+	fadt->reset_reg.addrl = 0xcf9;
+	fadt->reset_reg.addrh = 0x0;
+
+	fadt->reset_value = 6;
+	fadt->x_firmware_ctl_l = facs;
+	fadt->x_firmware_ctl_h = 0;
+	fadt->x_dsdt_l = dsdt;
+	fadt->x_dsdt_h = 0;
+
+	fadt->x_pm1a_evt_blk.space_id = 1;
+	fadt->x_pm1a_evt_blk.bit_width = 32;
+	fadt->x_pm1a_evt_blk.bit_offset = 0;
+	fadt->x_pm1a_evt_blk.resv = 0;
+	fadt->x_pm1a_evt_blk.addrl = pm_base;
+	fadt->x_pm1a_evt_blk.addrh = 0x0;
+
+	fadt->x_pm1b_evt_blk.space_id = 1;
+	fadt->x_pm1b_evt_blk.bit_width = 4;
+	fadt->x_pm1b_evt_blk.bit_offset = 0;
+	fadt->x_pm1b_evt_blk.resv = 0;
+	fadt->x_pm1b_evt_blk.addrl = 0x0;
+	fadt->x_pm1b_evt_blk.addrh = 0x0;
+
+	fadt->x_pm1a_cnt_blk.space_id = 1;
+	fadt->x_pm1a_cnt_blk.bit_width = 16;
+	fadt->x_pm1a_cnt_blk.bit_offset = 0;
+	fadt->x_pm1a_cnt_blk.resv = 0;
+	fadt->x_pm1a_cnt_blk.addrl = pm_base + 4;
+	fadt->x_pm1a_cnt_blk.addrh = 0x0;
+
+	fadt->x_pm1b_cnt_blk.space_id = 1;
+	fadt->x_pm1b_cnt_blk.bit_width = 2;
+	fadt->x_pm1b_cnt_blk.bit_offset = 0;
+	fadt->x_pm1b_cnt_blk.resv = 0;
+	fadt->x_pm1b_cnt_blk.addrl = 0x0;
+	fadt->x_pm1b_cnt_blk.addrh = 0x0;
+
+	fadt->x_pm2_cnt_blk.space_id = 1;
+	fadt->x_pm2_cnt_blk.bit_width = 0;
+	fadt->x_pm2_cnt_blk.bit_offset = 0;
+	fadt->x_pm2_cnt_blk.resv = 0;
+	fadt->x_pm2_cnt_blk.addrl = 0x0;
+	fadt->x_pm2_cnt_blk.addrh = 0x0;
+
+	fadt->x_pm_tmr_blk.space_id = 1;
+	fadt->x_pm_tmr_blk.bit_width = 32;
+	fadt->x_pm_tmr_blk.bit_offset = 0;
+	fadt->x_pm_tmr_blk.resv = 0;
+	fadt->x_pm_tmr_blk.addrl = pm_base + 0x08;
+	fadt->x_pm_tmr_blk.addrh = 0x0;
+
+	fadt->x_gpe0_blk.space_id = 1;
+	fadt->x_gpe0_blk.bit_width = 32;
+	fadt->x_gpe0_blk.bit_offset = 0;
+	fadt->x_gpe0_blk.resv = 0;
+	fadt->x_gpe0_blk.addrl = pm_base + 0x20;
+	fadt->x_gpe0_blk.addrh = 0x0;
+
+	fadt->x_gpe1_blk.space_id = 1;
+	fadt->x_gpe1_blk.bit_width = 64;
+	fadt->x_gpe1_blk.bit_offset = 16;
+	fadt->x_gpe1_blk.resv = 0;
+	fadt->x_gpe1_blk.addrl = pm_base + 0xb0;
+	fadt->x_gpe1_blk.addrh = 0x0;
+#endif
+	header->checksum = acpi_checksum((void *)fadt, header->length);
+}
Index: svn/src/mainboard/tyan/s2895/mb_sysconf.h
===================================================================
--- /dev/null
+++ svn/src/mainboard/tyan/s2895/mb_sysconf.h
@@ -0,0 +1,29 @@
+#ifndef MB_SYSCONF_H
+
+#define MB_SYSCONF_H
+
+struct mb_sysconf_t {
+	unsigned char bus_isa;
+	unsigned char bus_8132_0;
+	unsigned char bus_8132_1;
+	unsigned char bus_8132_2;
+	unsigned char bus_8111_0;
+	unsigned char bus_8111_1;
+
+        unsigned char bus_8132a[7][3];
+
+        unsigned char bus_8151[7][2];
+
+        unsigned apicid_8111;
+        unsigned apicid_8132_1;
+        unsigned apicid_8132_2;
+        unsigned apicid_8132a[7][2];
+
+        unsigned sbdn3;
+        unsigned sbdn3a[7];
+        unsigned sbdn5[7];
+
+};
+
+#endif
+
Index: svn/src/arch/i386/boot/acpi.c
===================================================================
--- svn.orig/src/arch/i386/boot/acpi.c
+++ svn/src/arch/i386/boot/acpi.c
@@ -212,6 +212,7 @@ void acpi_create_ssdt_generator(acpi_hea
 
 int acpi_create_srat_lapic(acpi_srat_lapic_t *lapic, u8 node, u8 apic)
 {
+	memset((void *)lapic, 0, sizeof(acpi_srat_lapic_t));
         lapic->type=0;
         lapic->length=sizeof(acpi_srat_lapic_t);
         lapic->flags=1;
Index: svn/src/mainboard/tyan/s2895/dsdt.dsl
===================================================================
--- /dev/null
+++ svn/src/mainboard/tyan/s2895/dsdt.dsl
@@ -0,0 +1,212 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * (C) Copyright 2004 Nick Barker <Nick.Barker9@btinternet.com>
+ * (C) Copyright 2007, 2008 Rudolf Marek <r.marek@assembler.cz>
+ *
+ * ISA portions taken from QEMU acpi-dsdt.dsl.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License v2 as published by
+ * the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ */
+
+DefinitionBlock ("DSDT.aml", "DSDT", 1, "CRBOOT", "CB-DSDT", 1)
+{
+	 Include ("amdk8_util.asl")
+
+
+	/* Define the main processor.*/
+	Scope (\_PR)
+	{
+		Processor (\_PR.CPU0, 0x00, 0x000000, 0x00) {}
+		Processor (\_PR.CPU1, 0x01, 0x000000, 0x00) {}
+		Processor (\_PR.CPU2, 0x02, 0x000000, 0x00) {}
+		Processor (\_PR.CPU3, 0x03, 0x000000, 0x00) {}
+	}
+
+	/* For now only define 2 power states:
+	 *  - S0 which is fully on
+	 *  - S5 which is soft off
+	 * Any others would involve declaring the wake up methods.
+	 */
+	Name (\_S0, Package () { 0x00, 0x00, 0x00, 0x00 })
+	Name (\_S5, Package () { 0x02, 0x02, 0x00, 0x00 })
+
+	/* Root of the bus hierarchy */
+	Scope (\_SB)
+	{
+		/* Top PCI device */
+		Device (PCI0)
+		{
+			Name (_HID, EisaId ("PNP0A03"))
+			Name (_ADR, 0x00)
+			Name (_UID, 0x00)
+			Name (_BBN, 0x00)
+
+			External (BUSN)
+			External (MMIO)
+			External (PCIO)
+			External (SBLK)
+			External (TOM1)
+			External (HCLK)
+			External (SBDN)
+			External (HCDN)
+
+			Method (_CRS, 0, NotSerialized)
+			{
+				Name (BUF0, ResourceTemplate ()
+				{
+				IO (Decode16,
+				0x0CF8,	// Address Range Minimum
+				0x0CF8,	// Address Range Maximum
+				0x01,	// Address Alignment
+				0x08,	// Address Length
+				)
+				WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
+				0x0000,	// Address Space Granularity
+				0x0000,	// Address Range Minimum
+				0x0CF7,	// Address Range Maximum
+				0x0000,	// Address Translation Offset
+				0x0CF8,	// Address Length
+				,, , TypeStatic)
+				})
+				/* Methods bellow use SSDT to get actual MMIO regs
+				 * The IO ports are from 0xd00, optionally an VGA,
+				 * otherwise the info from MMIO is used.
+				 */
+				Concatenate (\_SB.GMEM (0x00, \_SB.PCI0.SBLK), BUF0, Local1)
+				Concatenate (\_SB.GIOR (0x00, \_SB.PCI0.SBLK), Local1, Local2)
+				Concatenate (\_SB.GWBN (0x00, \_SB.PCI0.SBLK), Local2, Local3)
+				Return (Local3)
+			}
+
+			/* PCI Routing Table */
+			Name (_PRT, Package () {
+				Package (0x04) { 0x000FFFFF, 0x01, 0x00, 0x15 }, /* 0xf SATA IRQ 21 */
+				Package (0x04) { 0x000FFFFF, 0x00, 0x00, 0x14 }, /* 0xf Native IDE IRQ 20 */
+				Package (0x04) { 0x0010FFFF, 0x00, 0x00, 0x15 }, /* USB routing */
+				Package (0x04) { 0x0010FFFF, 0x01, 0x00, 0x15 },
+				Package (0x04) { 0x0010FFFF, 0x02, 0x00, 0x15 },
+				Package (0x04) { 0x0010FFFF, 0x03, 0x00, 0x15 },
+				Package (0x04) { 0x0012FFFF, 0x00, 0x00, 0x17 }, /* LAN */
+				Package (0x04) { 0x0013FFFF, 0x00, 0x00, 0x14 }, /* PCIe bridge SB */
+				Package (0x04) { 0x0013FFFF, 0x02, 0x00, 0x16 }, /* PCIe bridge SB */
+				Package (0x04) { 0x0001FFFF, 0x00, 0x00, 0x10 }, /* AGP pridge */
+				Package (0x04) { 0x0001FFFF, 0x01, 0x00, 0x11 }, /* FIXME FIXME */
+ 				Package (0x04) { 0x0002FFFF, 0x00, 0x00, 0x1B }, /* PCIE16 bridge IRQ27 */
+				Package (0x04) { 0x0002FFFF, 0x01, 0x00, 0x1B },
+				Package (0x04) { 0x0002FFFF, 0x02, 0x00, 0x1B },
+				Package (0x04) { 0x0002FFFF, 0x03, 0x00, 0x1B },
+				Package (0x04) { 0x0003FFFF, 0x00, 0x00, 0x1F }, /* PCIE bridge IRQ31 */
+				Package (0x04) { 0x0003FFFF, 0x01, 0x00, 0x23 }, /* IRQ36 */
+				Package (0x04) { 0x0003FFFF, 0x02, 0x00, 0x27 }, /* IRQ39 */
+				Package (0x04) { 0x0003FFFF, 0x03, 0x00, 0x2B }  /* IRQ43 */
+			})
+
+			Device (PEGG)
+			{
+				Name (_ADR, 0x00020000)
+				Name (_UID, 0x00)
+				Name (_BBN, 0x02)
+				Name (_PRT, Package () {
+					Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x18 }, /* PCIE IRQ24-IRQ27 */
+					Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x19 },
+					Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x1A },
+					Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x1B },
+				})
+			}
+
+			Device (PEX0)
+			{
+				Name (_ADR, 0x00030000)
+				Name (_UID, 0x00)
+				Name (_BBN, 0x03)
+				Name (_PRT, Package () {
+					Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x1C }, /* PCIE IRQ28-IRQ31 */
+					Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x1D },
+					Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x1E },
+					Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x1F },
+				})
+			}
+
+			Device (PEX1)
+			{
+				Name (_ADR, 0x00130000)
+				Name (_UID, 0x00)
+				Name (_BBN, 0x4)
+				Name (_PRT, Package () {
+					Package (0x04) { 0x0001FFFF, 0x00, 0x00, 0x11 }, /* PCIE audio */
+					Package (0x04) { 0x0001FFFF, 0x01, 0x00, 0x11 },
+					Package (0x04) { 0x0001FFFF, 0x02, 0x00, 0x11 },
+					Package (0x04) { 0x0001FFFF, 0x03, 0x00, 0x11 },
+				})
+			}
+
+			Device (TBRG)
+			{
+				Name (_ADR, 0x00130001)
+				Name (_UID, 0x00)
+				Name (_BBN, 0x5)
+				Name (_PRT, Package () {
+					Package (0x04) { 0x0006FFFF, 0x00, 0x00, 0x10 }, /* PCI slot */
+					Package (0x04) { 0x0006FFFF, 0x01, 0x00, 0x11 },
+					Package (0x04) { 0x0006FFFF, 0x02, 0x00, 0x12 },
+					Package (0x04) { 0x0006FFFF, 0x03, 0x00, 0x13 },
+					Package (0x04) { 0x0007FFFF, 0x00, 0x00, 0x11 }, /* PCI slot */
+					Package (0x04) { 0x0007FFFF, 0x01, 0x00, 0x12 },
+					Package (0x04) { 0x0007FFFF, 0x02, 0x00, 0x13 },
+					Package (0x04) { 0x0007FFFF, 0x03, 0x00, 0x10 },
+				})
+			}
+			Device (ISA) {
+				Name (_ADR, 0x00110000)
+
+				/* PS/2 keyboard (seems to be important for WinXP install) */
+				Device (KBD)
+				{
+					Name (_HID, EisaId ("PNP0303"))
+					Method (_STA, 0, NotSerialized)
+					{
+						Return (0x0f)
+					}
+					Method (_CRS, 0, NotSerialized)
+					{
+						Name (TMP, ResourceTemplate () {
+							IO (Decode16, 0x0060, 0x0060, 0x01, 0x01)
+							IO (Decode16, 0x0064, 0x0064, 0x01, 0x01)
+							IRQNoFlags () {1}
+						})
+						Return (TMP)
+					}
+				}
+
+				/* PS/2 mouse */
+				Device (MOU)
+				{
+					Name (_HID, EisaId ("PNP0F13"))
+					Method (_STA, 0, NotSerialized)
+					{
+						Return (0x0f)
+					}
+					Method (_CRS, 0, NotSerialized)
+					{
+						Name (TMP, ResourceTemplate () {
+							IRQNoFlags () {12}
+						})
+						Return (TMP)
+					}
+				}
+			}
+		}
+	}
+}
Index: svn/src/northbridge/amd/amdk8/amdk8_util.asl
===================================================================
--- /dev/null
+++ svn/src/northbridge/amd/amdk8/amdk8_util.asl
@@ -0,0 +1,315 @@
+/*
+ * Copyright 2005 AMD
+ */
+
+//AMD k8 util for BUSB and res range
+
+    Scope (\_SB)
+    {
+
+        Name (OSTB, Ones)
+        Method (OSTP, 0, NotSerialized)
+        {
+            If (LEqual (^OSTB, Ones))
+            {
+                Store (0x00, ^OSTB)
+            }
+
+            Return (^OSTB)
+        }
+
+       Method (SEQL, 2, Serialized)
+        {
+            Store (SizeOf (Arg0), Local0)
+            Store (SizeOf (Arg1), Local1)
+            If (LNot (LEqual (Local0, Local1))) { Return (Zero) }
+
+            Name (BUF0, Buffer (Local0) {})
+            Store (Arg0, BUF0)
+            Name (BUF1, Buffer (Local0) {})
+            Store (Arg1, BUF1)
+            Store (Zero, Local2)
+            While (LLess (Local2, Local0))
+            {
+                Store (DerefOf (Index (BUF0, Local2)), Local3)
+                Store (DerefOf (Index (BUF1, Local2)), Local4)
+                If (LNot (LEqual (Local3, Local4))) { Return (Zero) }
+
+                Increment (Local2)
+            }
+
+            Return (One)
+        }
+
+
+        Method (DADD, 2, NotSerialized)
+        {
+                Store( Arg1, Local0)
+                Store( Arg0, Local1)
+                Add( ShiftLeft(Local1,16), Local0, Local0)
+                Return (Local0)
+        }
+
+
+	Method (GHCE, 1, NotSerialized) // check if the HC enabled
+	{
+                Store (DerefOf (Index (\_SB.PCI0.HCLK, Arg0)), Local1)
+                if(LEqual ( And(Local1, 0x01), 0x01)) { Return (0x0F) }
+                Else { Return (0x00) }
+	}
+
+        Method (GHCN, 1, NotSerialized) // get the node num for the HC
+        {
+                Store (0x00, Local0)
+                Store (DerefOf (Index (\_SB.PCI0.HCLK, Arg0)), Local1)
+		Store (ShiftRight( And (Local1, 0xf0), 0x04), Local0)
+		Return (Local0)
+        }
+
+        Method (GHCL, 1, NotSerialized) // get the link num on node for the HC
+        {
+                Store (0x00, Local0)
+                Store (DerefOf (Index (\_SB.PCI0.HCLK, Arg0)), Local1)
+                Store (ShiftRight( And (Local1, 0xf00), 0x08), Local0)
+                Return (Local0)
+        }
+
+        Method (GHCD, 2, NotSerialized) // get the unit id base for the HT device in HC
+        {
+                Store (0x00, Local0)
+                Store (DerefOf (Index (\_SB.PCI0.HCDN, Arg0)), Local1)
+		Store (Arg1, Local2) // Arg1 could be 3, 2, 1, 0
+		Multiply (Local2, 0x08, Local2) // change to 24, 16, 8, 0
+                Store (And (ShiftRight( Local1, Local2), 0xff), Local0)
+                Return (Local0)
+        }
+
+        Method (GBUS, 2, NotSerialized)
+        {
+            Store (0x00, Local0)
+            While (LLess (Local0, 0x04))
+            {
+                Store (DerefOf (Index (\_SB.PCI0.BUSN, Local0)), Local1)
+                If (LEqual (And (Local1, 0x03), 0x03))
+                {
+                    If (LEqual (Arg0, ShiftRight (And (Local1, 0x70), 0x04)))
+                    {
+                        If (LOr (LEqual (Arg1, 0xFF), LEqual (Arg1, ShiftRight (And (Local1, 0x0300), 0x08))))
+                        {
+                            Return (ShiftRight (And (Local1, 0x00FF0000), 0x10))
+                        }
+                    }
+                }
+
+                Increment (Local0)
+            }
+
+            Return (0x00)
+        }
+
+        Method (GWBN, 2, NotSerialized)
+        {
+            Name (BUF0, ResourceTemplate ()
+            {
+                WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode,
+                    0x0000, // Address Space Granularity
+                    0x0000, // Address Range Minimum
+                    0x0000, // Address Range Maximum
+                    0x0000, // Address Translation Offset
+                    0x0000,,,)
+            })
+            CreateWordField (BUF0, 0x08, BMIN)
+            CreateWordField (BUF0, 0x0A, BMAX)
+            CreateWordField (BUF0, 0x0E, BLEN)
+            Store (0x00, Local0)
+            While (LLess (Local0, 0x04))
+            {
+                Store (DerefOf (Index (\_SB.PCI0.BUSN, Local0)), Local1)
+                If (LEqual (And (Local1, 0x03), 0x03))
+                {
+                    If (LEqual (Arg0, ShiftRight (And (Local1, 0x70), 0x04)))
+                    {
+                        If (LOr (LEqual (Arg1, 0xFF), LEqual (Arg1, ShiftRight (And (Local1, 0x0300), 0x08))))
+                        {
+                            Store (ShiftRight (And (Local1, 0x00FF0000), 0x10), BMIN)
+                            Store (ShiftRight (Local1, 0x18), BMAX)
+                            Subtract (BMAX, BMIN, BLEN)
+                            Increment (BLEN)
+                            Return (RTAG (BUF0))
+                        }
+                    }
+                }
+
+                Increment (Local0)
+            }
+
+            Return (RTAG (BUF0))
+        }
+
+        Method (GMEM, 2, NotSerialized)
+        {
+            Name (BUF0, ResourceTemplate ()
+            {
+                DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite,
+                    0x00000000, // Address Space Granularity
+                    0x00000000, // Address Range Minimum
+                    0x00000000, // Address Range Maximum
+                    0x00000000, // Address Translation Offset
+                    0x00000000,,,
+                    , AddressRangeMemory, TypeStatic)
+            })
+            CreateDWordField (BUF0, 0x0A, MMIN)
+            CreateDWordField (BUF0, 0x0E, MMAX)
+            CreateDWordField (BUF0, 0x16, MLEN)
+            Store (0x00, Local0)
+            Store (0x00, Local4)
+	    Store (0x00, Local3)
+            While (LLess (Local0, 0x10))
+            {
+                Store (DerefOf (Index (\_SB.PCI0.MMIO, Local0)), Local1)
+                Increment (Local0)
+                Store (DerefOf (Index (\_SB.PCI0.MMIO, Local0)), Local2)
+                If (LEqual (And (Local1, 0x03), 0x03))
+                {
+                    If (LEqual (Arg0, And (Local2, 0x07)))
+                    {
+                        If (LOr (LEqual (Arg1, 0xFF), LEqual (Arg1, ShiftRight (And (Local2, 0x30), 0x04))))
+                        {
+                            Store (ShiftLeft (And (Local1, 0xFFFFFF00), 0x08), MMIN)
+                            Store (ShiftLeft (And (Local2, 0xFFFFFF00), 0x08), MMAX)
+                            Or (MMAX, 0xFFFF, MMAX)
+                            Subtract (MMAX, MMIN, MLEN)
+
+                            If (Local4)
+                            {
+                                Concatenate (RTAG (BUF0), Local3, Local5)
+                               	Store (Local5, Local3)
+                            }
+                            Else
+                            {
+                                If (LOr (LAnd (LEqual (Arg1, 0xFF), LEqual (Arg0, 0x00)), LEqual (Arg1, \_SB.PCI0.SBLK)))
+                                {
+                                    Store (\_SB.PCI0.TOM1, MMIN)
+                                    Subtract (MMAX, MMIN, MLEN)
+                                    Increment (MLEN)
+                                }
+
+                                Store (RTAG (BUF0), Local3)
+                            }
+
+                            Increment (Local4)
+                        }
+                    }
+                }
+
+                Increment (Local0)
+            }
+
+            If (LNot (Local4))
+            {
+                Store (BUF0, Local3)
+            }
+
+            Return (Local3)
+        }
+
+        Method (GIOR, 2, NotSerialized)
+        {
+            Name (BUF0, ResourceTemplate ()
+            {
+                DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
+                    0x00000000, // Address Space Granularity
+                    0x00000000, // Address Range Minimum
+                    0x00000000, // Address Range Maximum
+                    0x00000000, // Address Translation Offset
+                    0x00000000,,,
+                    , TypeStatic)
+            })
+            CreateDWordField (BUF0, 0x0A, PMIN)
+            CreateDWordField (BUF0, 0x0E, PMAX)
+            CreateDWordField (BUF0, 0x16, PLEN)
+            Store (0x00, Local0)
+            Store (0x00, Local4)
+	    Store (0x00, Local3)
+            While (LLess (Local0, 0x08))
+            {
+                Store (DerefOf (Index (\_SB.PCI0.PCIO, Local0)), Local1)
+                Increment (Local0)
+                Store (DerefOf (Index (\_SB.PCI0.PCIO, Local0)), Local2)
+                If (LEqual (And (Local1, 0x03), 0x03))
+                {
+                    If (LEqual (Arg0, And (Local2, 0x07)))
+                    {
+                        If (LOr (LEqual (Arg1, 0xFF), LEqual (Arg1, ShiftRight (And (Local2, 0x30), 0x04))))
+                        {
+                            Store (And (Local1, 0x01FFF000), PMIN)
+                            Store (And (Local2, 0x01FFF000), PMAX)
+                            Or (PMAX, 0x0FFF, PMAX)
+                            Subtract (PMAX, PMIN, PLEN)
+                            Increment (PLEN)
+
+                            If (Local4)
+                            {
+                                Concatenate (RTAG (BUF0), Local3, Local5)
+       	                        Store (Local5, Local3)
+                            }
+                            Else
+                            {
+                                If (LGreater (PMAX, PMIN))
+                                {
+                                    If (LOr (LAnd (LEqual (Arg1, 0xFF), LEqual (Arg0, 0x00)), LEqual (Arg1, \_SB.PCI0.SBLK)))
+                                    {
+                                        Store (0x0D00, PMIN)
+                                        Subtract (PMAX, PMIN, PLEN)
+                                        Increment (PLEN)
+                                    }
+
+                                    Store (RTAG (BUF0), Local3)
+                                    Increment (Local4)
+                                }
+
+                                If (And (Local1, 0x10))
+                                {
+                                    Store (0x03B0, PMIN)
+                                    Store (0x03DF, PMAX)
+                                    Store (0x30, PLEN)
+                                    If (Local4)
+                                    {
+                                        Concatenate (RTAG (BUF0), Local3, Local5)
+                                        Store (Local5, Local3)
+                                    }
+                                    Else
+                                    {
+                                        Store (RTAG (BUF0), Local3)
+                                    }
+                                }
+                            }
+
+                            Increment (Local4)
+                        }
+                    }
+                }
+
+                Increment (Local0)
+            }
+
+            If (LNot (Local4))
+            {
+                Store (RTAG (BUF0), Local3)
+            }
+
+            Return (Local3)
+        }
+
+        Method (RTAG, 1, NotSerialized)
+        {
+            Store (Arg0, Local0)
+            Store (SizeOf (Local0), Local1)
+            Subtract (Local1, 0x02, Local1)
+            Multiply (Local1, 0x08, Local1)
+            CreateField (Local0, 0x00, Local1, RETB)
+            Store (RETB, Local2)
+            Return (Local2)
+        }
+    }
+
Index: svn/src/mainboard/tyan/s2895/amdk8_util.asl
===================================================================
--- /dev/null
+++ svn/src/mainboard/tyan/s2895/amdk8_util.asl
@@ -0,0 +1,315 @@
+/*
+ * Copyright 2005 AMD
+ */
+
+//AMD k8 util for BUSB and res range
+
+    Scope (\_SB)
+    {
+
+        Name (OSTB, Ones)
+        Method (OSTP, 0, NotSerialized)
+        {
+            If (LEqual (^OSTB, Ones))
+            {
+                Store (0x00, ^OSTB)
+            }
+
+            Return (^OSTB)
+        }
+
+       Method (SEQL, 2, Serialized)
+        {
+            Store (SizeOf (Arg0), Local0)
+            Store (SizeOf (Arg1), Local1)
+            If (LNot (LEqual (Local0, Local1))) { Return (Zero) }
+
+            Name (BUF0, Buffer (Local0) {})
+            Store (Arg0, BUF0)
+            Name (BUF1, Buffer (Local0) {})
+            Store (Arg1, BUF1)
+            Store (Zero, Local2)
+            While (LLess (Local2, Local0))
+            {
+                Store (DerefOf (Index (BUF0, Local2)), Local3)
+                Store (DerefOf (Index (BUF1, Local2)), Local4)
+                If (LNot (LEqual (Local3, Local4))) { Return (Zero) }
+
+                Increment (Local2)
+            }
+
+            Return (One)
+        }
+
+
+        Method (DADD, 2, NotSerialized)
+        {
+                Store( Arg1, Local0)
+                Store( Arg0, Local1)
+                Add( ShiftLeft(Local1,16), Local0, Local0)
+                Return (Local0)
+        }
+
+
+	Method (GHCE, 1, NotSerialized) // check if the HC enabled
+	{
+                Store (DerefOf (Index (\_SB.PCI0.HCLK, Arg0)), Local1)
+                if(LEqual ( And(Local1, 0x01), 0x01)) { Return (0x0F) }
+                Else { Return (0x00) }
+	}
+
+        Method (GHCN, 1, NotSerialized) // get the node num for the HC
+        {
+                Store (0x00, Local0)
+                Store (DerefOf (Index (\_SB.PCI0.HCLK, Arg0)), Local1)
+		Store (ShiftRight( And (Local1, 0xf0), 0x04), Local0)
+		Return (Local0)
+        }
+
+        Method (GHCL, 1, NotSerialized) // get the link num on node for the HC
+        {
+                Store (0x00, Local0)
+                Store (DerefOf (Index (\_SB.PCI0.HCLK, Arg0)), Local1)
+                Store (ShiftRight( And (Local1, 0xf00), 0x08), Local0)
+                Return (Local0)
+        }
+
+        Method (GHCD, 2, NotSerialized) // get the unit id base for the HT device in HC
+        {
+                Store (0x00, Local0)
+                Store (DerefOf (Index (\_SB.PCI0.HCDN, Arg0)), Local1)
+		Store (Arg1, Local2) // Arg1 could be 3, 2, 1, 0
+		Multiply (Local2, 0x08, Local2) // change to 24, 16, 8, 0
+                Store (And (ShiftRight( Local1, Local2), 0xff), Local0)
+                Return (Local0)
+        }
+
+        Method (GBUS, 2, NotSerialized)
+        {
+            Store (0x00, Local0)
+            While (LLess (Local0, 0x04))
+            {
+                Store (DerefOf (Index (\_SB.PCI0.BUSN, Local0)), Local1)
+                If (LEqual (And (Local1, 0x03), 0x03))
+                {
+                    If (LEqual (Arg0, ShiftRight (And (Local1, 0x70), 0x04)))
+                    {
+                        If (LOr (LEqual (Arg1, 0xFF), LEqual (Arg1, ShiftRight (And (Local1, 0x0300), 0x08))))
+                        {
+                            Return (ShiftRight (And (Local1, 0x00FF0000), 0x10))
+                        }
+                    }
+                }
+
+                Increment (Local0)
+            }
+
+            Return (0x00)
+        }
+
+        Method (GWBN, 2, NotSerialized)
+        {
+            Name (BUF0, ResourceTemplate ()
+            {
+                WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode,
+                    0x0000, // Address Space Granularity
+                    0x0000, // Address Range Minimum
+                    0x0000, // Address Range Maximum
+                    0x0000, // Address Translation Offset
+                    0x0000,,,)
+            })
+            CreateWordField (BUF0, 0x08, BMIN)
+            CreateWordField (BUF0, 0x0A, BMAX)
+            CreateWordField (BUF0, 0x0E, BLEN)
+            Store (0x00, Local0)
+            While (LLess (Local0, 0x04))
+            {
+                Store (DerefOf (Index (\_SB.PCI0.BUSN, Local0)), Local1)
+                If (LEqual (And (Local1, 0x03), 0x03))
+                {
+                    If (LEqual (Arg0, ShiftRight (And (Local1, 0x70), 0x04)))
+                    {
+                        If (LOr (LEqual (Arg1, 0xFF), LEqual (Arg1, ShiftRight (And (Local1, 0x0300), 0x08))))
+                        {
+                            Store (ShiftRight (And (Local1, 0x00FF0000), 0x10), BMIN)
+                            Store (ShiftRight (Local1, 0x18), BMAX)
+                            Subtract (BMAX, BMIN, BLEN)
+                            Increment (BLEN)
+                            Return (RTAG (BUF0))
+                        }
+                    }
+                }
+
+                Increment (Local0)
+            }
+
+            Return (RTAG (BUF0))
+        }
+
+        Method (GMEM, 2, NotSerialized)
+        {
+            Name (BUF0, ResourceTemplate ()
+            {
+                DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite,
+                    0x00000000, // Address Space Granularity
+                    0x00000000, // Address Range Minimum
+                    0x00000000, // Address Range Maximum
+                    0x00000000, // Address Translation Offset
+                    0x00000000,,,
+                    , AddressRangeMemory, TypeStatic)
+            })
+            CreateDWordField (BUF0, 0x0A, MMIN)
+            CreateDWordField (BUF0, 0x0E, MMAX)
+            CreateDWordField (BUF0, 0x16, MLEN)
+            Store (0x00, Local0)
+            Store (0x00, Local4)
+	    Store (0x00, Local3)
+            While (LLess (Local0, 0x10))
+            {
+                Store (DerefOf (Index (\_SB.PCI0.MMIO, Local0)), Local1)
+                Increment (Local0)
+                Store (DerefOf (Index (\_SB.PCI0.MMIO, Local0)), Local2)
+                If (LEqual (And (Local1, 0x03), 0x03))
+                {
+                    If (LEqual (Arg0, And (Local2, 0x07)))
+                    {
+                        If (LOr (LEqual (Arg1, 0xFF), LEqual (Arg1, ShiftRight (And (Local2, 0x30), 0x04))))
+                        {
+                            Store (ShiftLeft (And (Local1, 0xFFFFFF00), 0x08), MMIN)
+                            Store (ShiftLeft (And (Local2, 0xFFFFFF00), 0x08), MMAX)
+                            Or (MMAX, 0xFFFF, MMAX)
+                            Subtract (MMAX, MMIN, MLEN)
+
+                            If (Local4)
+                            {
+                                Concatenate (RTAG (BUF0), Local3, Local5)
+                               	Store (Local5, Local3)
+                            }
+                            Else
+                            {
+                                If (LOr (LAnd (LEqual (Arg1, 0xFF), LEqual (Arg0, 0x00)), LEqual (Arg1, \_SB.PCI0.SBLK)))
+                                {
+                                    Store (\_SB.PCI0.TOM1, MMIN)
+                                    Subtract (MMAX, MMIN, MLEN)
+                                    Increment (MLEN)
+                                }
+
+                                Store (RTAG (BUF0), Local3)
+                            }
+
+                            Increment (Local4)
+                        }
+                    }
+                }
+
+                Increment (Local0)
+            }
+
+            If (LNot (Local4))
+            {
+                Store (BUF0, Local3)
+            }
+
+            Return (Local3)
+        }
+
+        Method (GIOR, 2, NotSerialized)
+        {
+            Name (BUF0, ResourceTemplate ()
+            {
+                DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
+                    0x00000000, // Address Space Granularity
+                    0x00000000, // Address Range Minimum
+                    0x00000000, // Address Range Maximum
+                    0x00000000, // Address Translation Offset
+                    0x00000000,,,
+                    , TypeStatic)
+            })
+            CreateDWordField (BUF0, 0x0A, PMIN)
+            CreateDWordField (BUF0, 0x0E, PMAX)
+            CreateDWordField (BUF0, 0x16, PLEN)
+            Store (0x00, Local0)
+            Store (0x00, Local4)
+	    Store (0x00, Local3)
+            While (LLess (Local0, 0x08))
+            {
+                Store (DerefOf (Index (\_SB.PCI0.PCIO, Local0)), Local1)
+                Increment (Local0)
+                Store (DerefOf (Index (\_SB.PCI0.PCIO, Local0)), Local2)
+                If (LEqual (And (Local1, 0x03), 0x03))
+                {
+                    If (LEqual (Arg0, And (Local2, 0x07)))
+                    {
+                        If (LOr (LEqual (Arg1, 0xFF), LEqual (Arg1, ShiftRight (And (Local2, 0x30), 0x04))))
+                        {
+                            Store (And (Local1, 0x01FFF000), PMIN)
+                            Store (And (Local2, 0x01FFF000), PMAX)
+                            Or (PMAX, 0x0FFF, PMAX)
+                            Subtract (PMAX, PMIN, PLEN)
+                            Increment (PLEN)
+
+                            If (Local4)
+                            {
+                                Concatenate (RTAG (BUF0), Local3, Local5)
+       	                        Store (Local5, Local3)
+                            }
+                            Else
+                            {
+                                If (LGreater (PMAX, PMIN))
+                                {
+                                    If (LOr (LAnd (LEqual (Arg1, 0xFF), LEqual (Arg0, 0x00)), LEqual (Arg1, \_SB.PCI0.SBLK)))
+                                    {
+                                        Store (0x0D00, PMIN)
+                                        Subtract (PMAX, PMIN, PLEN)
+                                        Increment (PLEN)
+                                    }
+
+                                    Store (RTAG (BUF0), Local3)
+                                    Increment (Local4)
+                                }
+
+                                If (And (Local1, 0x10))
+                                {
+                                    Store (0x03B0, PMIN)
+                                    Store (0x03DF, PMAX)
+                                    Store (0x30, PLEN)
+                                    If (Local4)
+                                    {
+                                        Concatenate (RTAG (BUF0), Local3, Local5)
+                                        Store (Local5, Local3)
+                                    }
+                                    Else
+                                    {
+                                        Store (RTAG (BUF0), Local3)
+                                    }
+                                }
+                            }
+
+                            Increment (Local4)
+                        }
+                    }
+                }
+
+                Increment (Local0)
+            }
+
+            If (LNot (Local4))
+            {
+                Store (RTAG (BUF0), Local3)
+            }
+
+            Return (Local3)
+        }
+
+        Method (RTAG, 1, NotSerialized)
+        {
+            Store (Arg0, Local0)
+            Store (SizeOf (Local0), Local1)
+            Subtract (Local1, 0x02, Local1)
+            Multiply (Local1, 0x08, Local1)
+            CreateField (Local0, 0x00, Local1, RETB)
+            Store (RETB, Local2)
+            Return (Local2)
+        }
+    }
+
