...assume 3rdparty/blobs has working ones.
These have been tested on the Gardenia board, but not on the Embedded DB-FP4-LC.  I have no reason to believe they should be different.  I had originally looked at the Sapphire site for that board model and had the impression the system was more like Bettong -- the OPNs they cite are Family 15h model 60h-6Fh.  However, based on your CPU-Z report, your .config looks correct to me WRT the blobs.

How can I know if the COM ports are connected to the APU or to the superIO? Which is the right configuration in the first case and in the second one?
Your .config is set up for an APU UART.  Given that these are memory-mapped and have an unusual register mapping, I doubt this is a common configuration for most shipping systems.  The SuperIO is more likely.  You should be able to find other mainboard examples for how to add a superio to your mainboard/devicetree.cb file.  Unfortunately, if it's correct that Sapphire used an F81803, the coreboot tree doesn't contain that yet so you may have an uphill climb trying to add it.

Thanks,
Marshall


On Mon, Feb 27, 2017 at 4:50 AM, Kyösti Mälkki <kyosti.malkki@gmail.com> wrote:

On Fri, Feb 17, 2017 at 12:03 AM, giuseppe.ferrigni--- via coreboot <coreboot@coreboot.org> wrote:
Hi,

I'm trying to flash corboot on a IPC-FP4-DP G Series. The system has the following components (from CPU-Z software tool):

CPU: AMD GX-224IJ - 00670F00 - Prairie Falcon (Family 15h  Model 70h - Stoney Ridge)
MOTHERBOARD: Gardenia CRB
CHIPSET: AMD K15IMC
SOUTHBRIDGE: Carrizo FCH
LPCIO: Fintek F81803

It seems that the actual coreboot release is compatible with each component, so I configured it as in the attached file.
Obviously, nothing is so simple. After flashing, nothing on video, nothing on COM port.
I have now some simple questions:
- is my configuration correct?
- how can I start debugging, since I have no feedback?
- Can I test the boot process of the rom in some way using qemu?
- How can I know if the COM ports are connected to the APU or to the superIO? Which is the right configuration in the first case and in the second one?

I would check twice the  PSP firmware files you have embedded in your image. Unfortunately I cannot give you any SHA sums of correct files to have, but I would assume 3rdparty/blobs has working ones.

There is board-status output of a tested configuration for amd/gardenia here:

https://www.coreboot.org/Supported_Motherboards#amd.2Fgardenia

Kyösti

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