Port sdhci and mmc driver from depthcharge to coreboot. The purpose is to speed up boot time by starting

storage initialization on another CPU in parallel. On the Apollolake systems we checked, we found that cpu can take

up to 300ms sending CMD1s to HW, so we can avoid this delay by parallelizing.

- Why not add this parallelization in the payload instead?

                There is potentially more time to parallelize things in coreboot. Payload execution is much faster,

                so we don't get much parallel execution time.

- Why not send CMD1 once in coreboot to trigger power-up and let HW initialize using only 1 cpu?

                Jedec spec requires the CPU to keep sending CMD1s when the hardware is busy (section 6.4.3). We tested

                with real-world hardware and it indeed didn't work with a single CMD1.

- Why did you port the driver from depthcharge?

                I wanted to use a driver that is proven to avoid bugs. It is also easier to apply patches back and forth.

https://review.coreboot.org/#/c/18105

Thanks

Bora