coreboot-4.0-4728-gf8bf5a1-dirty Thu Oct 17 21:14:07 IST 2013 starting... Setting up static southbridge registers... done. Disabling Watchdog reboot... done. Setting up static northbridge registers... done. Initializing Graphics... Back from sandybridge_early_initialization() SMBus controller enabled. CPU id(206a7): Intel(R) Celeron(R) CPU 847 @ 1.10GHz AES NOT supported, TXT NOT supported, VT supported PCH type: NM70, device id: 1e5f, rev id 4 Intel ME early init Intel ME firmware is ready ME: Requested 16MB UMA Starting UEFI PEI System Agent Read scrambler seed 0x00002fd1 from CMOS 0x98 Read S3 scrambler seed 0x0000f49c from CMOS 0x9c No FMAP found at ffe10000. FMAP: area RW_MRC_CACHE not found find_current_mrc_cache_local: No valid MRC cache found. USB coreboot-4.0-4728-gf8bf5a1-dirty Thu Oct 17 21:14:07 IST 2013 starting... Setting up static southbridge registers... done. Disabling Watchdog reboot... done. Setting up static northbridge registers... done. Initializing Graphics... Back from sandybridge_early_initialization() SMBus controller enabled. CPU id(206a7): Intel(R) Celeron(R) CPU 847 @ 1.10GHz AES NOT supported, TXT NOT supported, VT supported PCH type: NM70, device id: 1e5f, rev id 4 Intel ME early init Intel ME firmware is ready ME: Requested 16MB UMA Starting UEFI PEI System Agent Read scrambler seed 0x00002fd1 from CMOS 0x98 Read S3 scrambler seed 0x0000f49c from CMOS 0x9c No FMAP found at ffe10000. FMAP: area RW_MRC_CACHE not found find_current_mrc_cache_local: No valid MRC cache found. USB System Agent Version 1.2.2 Build 0 ME: Sending Init Done with status: 0, UMA base: 0x0ff0 ME: Requested BIOS Action: Continue to boot ME: FW Partition Table : OK ME: Bringup Loader Failure : NO ME: Firmware Init Complete : NO ME: Manufacturing Mode : NO ME: Boot Options Present : NO ME: Update In Progress : NO ME: Current Working State : Normal ME: Current Operation State : Bring up ME: Current Operation Mode : Security Override via Jumper ME: Error Code : No Error ME: Progress Phase : BUP Phase ME: Power Management Event : Pseudo-global reset ME: Progress Phase State : 0x52 memcfg DDR3 clock 1333 MHz memcfg channel assignment: A: 0, B 1, C 2 memcfg channel[0] config (00620010): ECC inactive enhanced interleave mode on rank interleave on DIMMA 4096 MB width x8 dual rank, selected DIMMB 0 MB width x8 single rank memcfg channel[1] config (00600000): ECC inactive enhanced interleave mode on rank interleave on DIMMA 0 MB width x8 single rank, selected DIMMB 0 MB width x8 single rank CBMEM region acee0000-acffffff (cbmem_reinit) CBMEM region acee0000-acffffff (cbmem_init) Adding CBMEM entry as no. 1 Adding CBMEM entry as no. 2 Adding CBMEM entry as no. 3 Adding CBMEM entry as no. 4 Relocate MRC DATA from ff7e3237 to acee0800 (2992 bytes) Save scrambler seed 0x00002e3d to CMOS 0x98 Save s3 scrambler seed 0x000074c7 to CMOS 0x9c CBMEM region acee0000-acffffff (cbmem_reinit) Loading image. CBFS: loading stage fallback/coreboot_ram @ 0x100000 (372800 bytes), entry @ 0x100000 Jumping to image. EHCI debug port found in CBMEM. coreboot-4.0-4728-gf8bf5a1-dirty Thu Oct 17 21:14:07 IST 2013 booting... Enumerating buses... Show all devs...Before device enumeration. Root Device: enabled 1 CPU_CLUSTER: 0: enabled 1 APIC: 00: enabled 1 APIC: acac: enabled 0 DOMAIN: 0000: enabled 1 PCI: 00:00.0: enabled 1 PCI: 00:01.0: enabled 0 PCI: 00:02.0: enabled 1 PCI: 00:14.0: enabled 1 PCI: 00:16.0: enabled 1 PCI: 00:16.1: enabled 0 PCI: 00:16.2: enabled 0 PCI: 00:16.3: enabled 0 PCI: 00:19.0: enabled 0 PCI: 00:1a.0: enabled 1 PCI: 00:1b.0: enabled 1 PCI: 00:1c.0: enabled 1 PCI: 00:1c.1: enabled 1 PCI: 00:1c.2: enabled 1 PCI: 00:1c.3: enabled 0 PCI: 00:1c.4: enabled 0 PCI: 00:1c.5: enabled 0 PCI: 00:1c.6: enabled 0 PCI: 00:1c.7: enabled 0 PCI: 00:1d.0: enabled 1 PCI: 00:1e.0: enabled 0 PCI: 00:1f.0: enabled 1 PNP: 00ff.1: enabled 1 PCI: 00:1f.2: enabled 1 PCI: 00:1f.3: enabled 1 PCI: 00:1f.5: enabled 0 PCI: 00:1f.6: enabled 1 Compare with tree... Root Device: enabled 1 CPU_CLUSTER: 0: enabled 1 APIC: 00: enabled 1 APIC: acac: enabled 0 DOMAIN: 0000: enabled 1 PCI: 00:00.0: enabled 1 PCI: 00:01.0: enabled 0 PCI: 00:02.0: enabled 1 PCI: 00:14.0: enabled 1 PCI: 00:16.0: enabled 1 PCI: 00:16.1: enabled 0 PCI: 00:16.2: enabled 0 PCI: 00:16.3: enabled 0 PCI: 00:19.0: enabled 0 PCI: 00:1a.0: enabled 1 PCI: 00:1b.0: enabled 1 PCI: 00:1c.0: enabled 1 PCI: 00:1c.1: enabled 1 PCI: 00:1c.2: enabled 1 PCI: 00:1c.3: enabled 0 PCI: 00:1c.4: enabled 0 PCI: 00:1c.5: enabled 0 PCI: 00:1c.6: enabled 0 PCI: 00:1c.7: enabled 0 PCI: 00:1d.0: enabled 1 PCI: 00:1e.0: enabled 0 PCI: 00:1f.0: enabled 1 PNP: 00ff.1: enabled 1 PCI: 00:1f.2: enabled 1 PCI: 00:1f.3: enabled 1 PCI: 00:1f.5: enabled 0 PCI: 00:1f.6: enabled 1 scan_static_bus for Root Device CPU_CLUSTER: 0 enabled DOMAIN: 0000 enabled DOMAIN: 0000 scanning... PCI: pci_scan_bus for bus 00 PCI: 00:00.0 [8086/0104] ops Normal boot. PCI: 00:00.0 [8086/0104] enabled PCI: 00:02.0 [8086/0000] ops PCI: 00:02.0 [8086/0106] enabled PCI: Static device PCI: 00:14.0 not found, disabling it. PCI: 00:16.0 [8086/1e3a] bus ops PCI: 00:16.0 [8086/1e3a] enabled PCI: 00:16.1: Disabling device PCI: 00:16.2: Disabling device PCI: 00:16.3: Disabling device PCI: 00:19.0: Disabling device PCI: 00:1a.0 [8086/0000] ops PCI: 00:1a.0 [8086/1e2d] enabled PCI: 00:1b.0 [8086/0000] ops PCI: 00:1b.0 [8086/1e20] enabled PCH: PCIe Root Port coalescing is enabled PCI: 00:1c.0 [8086/0000] bus ops PCI: 00:1c.0 [8086/1e10] enabled PCI: 00:1c.1 [8086/0000] bus ops PCI: 00:1c.1 [8086/1e12] enabled PCI: 00:1c.2 [8086/0000] bus ops PCI: 00:1c.2 [8086/1e14] enabled PCI: 00:1c.3: Disabling device PCI: 00:1c.4: Disabling device PCI: 00:1c.4: check set enabled PCI: 00:1c.5: Disabling device PCI: 00:1c.6: Disabling device PCI: 00:1c.7: Disabling device PCH: RPFN 0x76543210 -> 0xfedcb210 PCI: 00:1d.0 [8086/0000] ops PCI: 00:1d.0 [8086/1e26] enabled PCI: 00:1e.0: Disabling device PCI: 00:1f.0 [8086/0000] bus ops PCI: 00:1f.0 [8086/1e5f] enabled PCI: 00:1f.2 [8086/0000] ops PCI: 00:1f.2 [8086/1e01] enabled PCI: 00:1f.3 [8086/0000] bus ops PCI: 00:1f.3 [8086/1e22] enabled PCI: 00:1f.5: Disabling device PCI: 00:1f.6 [8086/1e24] enabled scan_static_bus for PCI: 00:16.0 scan_static_bus for PCI: 00:16.0 done do_pci_scan_bridge for PCI: 00:1c.0 PCI: pci_scan_bus for bus 01 PCI: pci_scan_bus returning with max=001 do_pci_scan_bridge returns max 1 do_pci_scan_bridge for PCI: 00:1c.1 PCI: pci_scan_bus for bus 02 PCI: 02:00.0 [10ec/8136] enabled PCI: pci_scan_bus returning with max=002 Capability: type 0x01 @ 0x40 Capability: type 0x05 @ 0x50 Capability: type 0x10 @ 0x70 Capability: type 0x10 @ 0x40 Enabling Common Clock Configuration ASPM: Enabled L1 do_pci_scan_bridge returns max 2 do_pci_scan_bridge for PCI: 00:1c.2 PCI: pci_scan_bus for bus 03 PCI: 03:00.0 [10ec/5209] enabled PCI: pci_scan_bus returning with max=003 Capability: type 0x01 @ 0x40 Capability: type 0x05 @ 0x50 Capability: type 0x10 @ 0x70 Capability: type 0x10 @ 0x40 Enabling Common Clock Configuration ASPM: Enabled None do_pci_scan_bridge returns max 3 scan_static_bus for PCI: 00:1f.0 PNP: 00ff.1 enabled PNP: 00ff.0 enabled scan_static_bus for PCI: 00:1f.0 done scan_static_bus for PCI: 00:1f.3 scan_static_bus for PCI: 00:1f.3 done PCI: pci_scan_bus returning with max=003 scan_static_bus for Root Device done done found VGA at PCI: 00:02.0 Setting up VGA for PCI: 00:02.0 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device Allocating resources... Reading resources... Root Device read_resources bus 0 link: 0 CPU_CLUSTER: 0 read_resources bus 0 link: 0 APIC: 00 missing read_resources CPU_CLUSTER: 0 read_resources bus 0 link: 0 done DOMAIN: 0000 read_resources bus 0 link: 0 Adding PCIe enhanced config space BAR 0xf0000000-0xf4000000. More than one caller of pci_ehci_read_resources from PCI: 00:1a.0 PCI: 00:1c.0 read_resources bus 1 link: 0 PCI: 00:1c.0 read_resources bus 1 link: 0 done PCI: 00:1c.1 read_resources bus 2 link: 0 PCI: 00:1c.1 read_resources bus 2 link: 0 done PCI: 00:1c.2 read_resources bus 3 link: 0 PCI: 00:1c.2 read_resources bus 3 link: 0 done PCI: 00:1d.0 EHCI BAR hook registered PCI: 00:1f.0 read_resources bus 0 link: 0 PNP: 00ff.1 missing read_resources PCI: 00:1f.0 read_resources bus 0 link: 0 done DOMAIN: 0000 read_resources bus 0 link: 0 done Root Device read_resources bus 0 link: 0 done Done reading resources. Show resources in subtree (Root Device)...After reading. Root Device child on link 0 CPU_CLUSTER: 0 CPU_CLUSTER: 0 child on link 0 APIC: 00 APIC: 00 APIC: acac DOMAIN: 0000 child on link 0 PCI: 00:00.0 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100 PCI: 00:00.0 PCI: 00:00.0 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags e0000200 index cf PCI: 00:01.0 PCI: 00:02.0 PCI: 00:02.0 resource base 0 size 400000 align 22 gran 22 limit ffffffffffffffff flags 201 index 10 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 101201 index 18 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20 PCI: 00:14.0 PCI: 00:16.0 PCI: 00:16.0 resource base 0 size 10 align 4 gran 4 limit ffffffffffffffff flags 201 index 10 PCI: 00:16.1 PCI: 00:16.2 PCI: 00:16.3 PCI: 00:19.0 PCI: 00:1a.0 PCI: 00:1a.0 resource base 0 size 400 align 10 gran 10 limit ffffffff flags 200 index 10 PCI: 00:1b.0 PCI: 00:1b.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10 PCI: 00:1c.0 PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 PCI: 00:1c.1 child on link 0 PCI: 02:00.0 PCI: 00:1c.1 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 PCI: 02:00.0 PCI: 02:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10 PCI: 02:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 1201 index 18 PCI: 02:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 1201 index 20 PCI: 00:1c.2 child on link 0 PCI: 03:00.0 PCI: 00:1c.2 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 PCI: 03:00.0 PCI: 03:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 PCI: 00:1c.3 PCI: 00:1c.4 PCI: 00:1c.5 PCI: 00:1c.6 PCI: 00:1c.7 PCI: 00:1d.0 PCI: 00:1d.0 resource base 0 size 400 align 10 gran 10 limit ffffffff flags 200 index 10 PCI: 00:1e.0 PCI: 00:1f.0 child on link 0 PNP: 00ff.1 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 PCI: 00:1f.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100 PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 PNP: 00ff.1 PNP: 00ff.0 PCI: 00:1f.2 PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10 PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14 PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18 PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c PCI: 00:1f.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20 PCI: 00:1f.2 resource base 0 size 800 align 11 gran 11 limit ffffffff flags 200 index 24 PCI: 00:1f.3 PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20 PCI: 00:1f.3 resource base 0 size 100 align 8 gran 8 limit ffffffffffffffff flags 201 index 10 PCI: 00:1f.5 PCI: 00:1f.6 PCI: 00:1f.6 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10 DOMAIN: 0000 compute_resources_io: base: 0 size: 0 align: 0 gran: 0 limit: ffff PCI: 00:1c.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff PCI: 00:1c.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done PCI: 00:1c.1 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff PCI: 02:00.0 10 * [0x0 - 0xff] io PCI: 00:1c.1 compute_resources_io: base: 100 size: 1000 align: 12 gran: 12 limit: ffff done PCI: 00:1c.2 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff PCI: 00:1c.2 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done PCI: 00:1c.1 1c * [0x0 - 0xfff] io PCI: 00:02.0 20 * [0x1000 - 0x103f] io PCI: 00:1f.2 20 * [0x1040 - 0x105f] io PCI: 00:1f.2 10 * [0x1060 - 0x1067] io PCI: 00:1f.2 18 * [0x1068 - 0x106f] io PCI: 00:1f.2 14 * [0x1070 - 0x1073] io PCI: 00:1f.2 1c * [0x1074 - 0x1077] io DOMAIN: 0000 compute_resources_io: base: 1078 size: 1078 align: 12 gran: 0 limit: ffff done DOMAIN: 0000 compute_resources_mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff PCI: 00:1c.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff PCI: 00:1c.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done PCI: 00:1c.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff PCI: 00:1c.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done PCI: 00:1c.1 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff PCI: 02:00.0 20 * [0x0 - 0x3fff] prefmem PCI: 02:00.0 18 * [0x4000 - 0x4fff] prefmem PCI: 00:1c.1 compute_resources_prefmem: base: 5000 size: 100000 align: 20 gran: 20 limit: ffffffffffffffff done PCI: 00:1c.1 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff PCI: 00:1c.1 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done PCI: 00:1c.2 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff PCI: 00:1c.2 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done PCI: 00:1c.2 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff PCI: 03:00.0 10 * [0x0 - 0xfff] mem PCI: 00:1c.2 compute_resources_mem: base: 1000 size: 100000 align: 20 gran: 20 limit: ffffffff done PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem PCI: 00:02.0 10 * [0x10000000 - 0x103fffff] mem PCI: 00:1c.1 24 * [0x10400000 - 0x104fffff] prefmem PCI: 00:1c.2 20 * [0x10500000 - 0x105fffff] mem PCI: 00:1b.0 10 * [0x10600000 - 0x10603fff] mem PCI: 00:1f.6 10 * [0x10604000 - 0x10604fff] mem PCI: 00:1f.2 24 * [0x10605000 - 0x106057ff] mem PCI: 00:1a.0 10 * [0x10605800 - 0x10605bff] mem PCI: 00:1d.0 10 * [0x10605c00 - 0x10605fff] mem PCI: 00:1f.3 10 * [0x10606000 - 0x106060ff] mem PCI: 00:16.0 10 * [0x10606100 - 0x1060610f] mem DOMAIN: 0000 compute_resources_mem: base: 10606110 size: 10606110 align: 28 gran: 0 limit: ffffffff done avoid_fixed_resources: DOMAIN: 0000 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff constrain_resources: DOMAIN: 0000 constrain_resources: PCI: 00:00.0 constrain_resources: PCI: 00:02.0 constrain_resources: PCI: 00:16.0 constrain_resources: PCI: 00:1a.0 constrain_resources: PCI: 00:1b.0 constrain_resources: PCI: 00:1c.0 constrain_resources: PCI: 00:1c.1 constrain_resources: PCI: 02:00.0 constrain_resources: PCI: 00:1c.2 constrain_resources: PCI: 03:00.0 constrain_resources: PCI: 00:1d.0 constrain_resources: PCI: 00:1f.0 constrain_resources: PNP: 00ff.1 constrain_resources: PNP: 00ff.0 constrain_resources: PCI: 00:1f.2 constrain_resources: PCI: 00:1f.3 constrain_resources: PCI: 00:1f.6 avoid_fixed_resources2: DOMAIN: 0000@10000000 limit 0000ffff lim->base 00001000 lim->limit 0000ffff avoid_fixed_resources2: DOMAIN: 0000@10000100 limit ffffffff lim->base 00000000 lim->limit efffffff Setting resources... DOMAIN: 0000 allocate_resources_io: base:1000 size:1078 align:12 gran:0 limit:ffff Assigned: PCI: 00:1c.1 1c * [0x1000 - 0x1fff] io Assigned: PCI: 00:02.0 20 * [0x2000 - 0x203f] io Assigned: PCI: 00:1f.2 20 * [0x2040 - 0x205f] io Assigned: PCI: 00:1f.2 10 * [0x2060 - 0x2067] io Assigned: PCI: 00:1f.2 18 * [0x2068 - 0x206f] io Assigned: PCI: 00:1f.2 14 * [0x2070 - 0x2073] io Assigned: PCI: 00:1f.2 1c * [0x2074 - 0x2077] io DOMAIN: 0000 allocate_resources_io: next_base: 2078 size: 1078 align: 12 gran: 0 done PCI: 00:1c.0 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff PCI: 00:1c.0 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done PCI: 00:1c.1 allocate_resources_io: base:1000 size:1000 align:12 gran:12 limit:ffff Assigned: PCI: 02:00.0 10 * [0x1000 - 0x10ff] io PCI: 00:1c.1 allocate_resources_io: next_base: 1100 size: 1000 align: 12 gran: 12 done PCI: 00:1c.2 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff PCI: 00:1c.2 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done DOMAIN: 0000 allocate_resources_mem: base:d0000000 size:10606110 align:28 gran:0 limit:efffffff Assigned: PCI: 00:02.0 18 * [0xd0000000 - 0xdfffffff] prefmem Assigned: PCI: 00:02.0 10 * [0xe0000000 - 0xe03fffff] mem Assigned: PCI: 00:1c.1 24 * [0xe0400000 - 0xe04fffff] prefmem Assigned: PCI: 00:1c.2 20 * [0xe0500000 - 0xe05fffff] mem Assigned: PCI: 00:1b.0 10 * [0xe0600000 - 0xe0603fff] mem Assigned: PCI: 00:1f.6 10 * [0xe0604000 - 0xe0604fff] mem Assigned: PCI: 00:1f.2 24 * [0xe0605000 - 0xe06057ff] mem Assigned: PCI: 00:1a.0 10 * [0xe0605800 - 0xe0605bff] mem Assigned: PCI: 00:1d.0 10 * [0xe0605c00 - 0xe0605fff] mem Assigned: PCI: 00:1f.3 10 * [0xe0606000 - 0xe06060ff] mem Assigned: PCI: 00:16.0 10 * [0xe0606100 - 0xe060610f] mem DOMAIN: 0000 allocate_resources_mem: next_base: e0606110 size: 10606110 align: 28 gran: 0 done PCI: 00:1c.0 allocate_resources_prefmem: base:efffffff size:0 align:20 gran:20 limit:efffffff PCI: 00:1c.0 allocate_resources_prefmem: next_base: efffffff size: 0 align: 20 gran: 20 done PCI: 00:1c.0 allocate_resources_mem: base:efffffff size:0 align:20 gran:20 limit:efffffff PCI: 00:1c.0 allocate_resources_mem: next_base: efffffff size: 0 align: 20 gran: 20 done PCI: 00:1c.1 allocate_resources_prefmem: base:e0400000 size:100000 align:20 gran:20 limit:efffffff Assigned: PCI: 02:00.0 20 * [0xe0400000 - 0xe0403fff] prefmem Assigned: PCI: 02:00.0 18 * [0xe0404000 - 0xe0404fff] prefmem PCI: 00:1c.1 allocate_resources_prefmem: next_base: e0405000 size: 100000 align: 20 gran: 20 done PCI: 00:1c.1 allocate_resources_mem: base:efffffff size:0 align:20 gran:20 limit:efffffff PCI: 00:1c.1 allocate_resources_mem: next_base: efffffff size: 0 align: 20 gran: 20 done PCI: 00:1c.2 allocate_resources_prefmem: base:efffffff size:0 align:20 gran:20 limit:efffffff PCI: 00:1c.2 allocate_resources_prefmem: next_base: efffffff size: 0 align: 20 gran: 20 done PCI: 00:1c.2 allocate_resources_mem: base:e0500000 size:100000 align:20 gran:20 limit:efffffff Assigned: PCI: 03:00.0 10 * [0xe0500000 - 0xe0500fff] mem PCI: 00:1c.2 allocate_resources_mem: next_base: e0501000 size: 100000 align: 20 gran: 20 done Root Device assign_resources, bus 0 link: 0 TOUUD 0x14f600000 TOLUD 0xafa00000 TOM 0x100000000 MEBASE 0xff000000 IGD decoded, subtracting 32M UMA and 2M GTT TSEG base 0xad000000 size 8M Available memory below 4GB: 2768M Available memory above 4GB: 1270M Adding PCIe config bar base=0xf0000000 size=0x4000000 DOMAIN: 0000 assign_resources, bus 0 link: 0 PCI: 00:00.0 cf <- [0x00f0000000 - 0x00f3ffffff] size 0x04000000 gran 0x00 mem PCI: 00:02.0 10 <- [0x00e0000000 - 0x00e03fffff] size 0x00400000 gran 0x16 mem64 PCI: 00:02.0 18 <- [0x00d0000000 - 0x00dfffffff] size 0x10000000 gran 0x1c prefmem64 PCI: 00:02.0 20 <- [0x0000002000 - 0x000000203f] size 0x00000040 gran 0x06 io PCI: 00:16.0 10 <- [0x00e0606100 - 0x00e060610f] size 0x00000010 gran 0x04 mem64 PCI: 00:1a.0 10 <- [0x00e0605800 - 0x00e0605bff] size 0x00000400 gran 0x0a mem PCI: 00:1b.0 10 <- [0x00e0600000 - 0x00e0603fff] size 0x00004000 gran 0x0e mem64 PCI: 00:1c.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io PCI: 00:1c.0 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 01 prefmem PCI: 00:1c.0 20 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 01 mem PCI: 00:1c.1 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 02 io PCI: 00:1c.1 24 <- [0x00e0400000 - 0x00e04fffff] size 0x00100000 gran 0x14 bus 02 prefmem PCI: 00:1c.1 20 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 02 mem PCI: 00:1c.1 assign_resources, bus 2 link: 0 PCI: 02:00.0 10 <- [0x0000001000 - 0x00000010ff] size 0x00000100 gran 0x08 io PCI: 02:00.0 18 <- [0x00e0404000 - 0x00e0404fff] size 0x00001000 gran 0x0c prefmem64 PCI: 02:00.0 20 <- [0x00e0400000 - 0x00e0403fff] size 0x00004000 gran 0x0e prefmem64 PCI: 00:1c.1 assign_resources, bus 2 link: 0 PCI: 00:1c.2 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 03 io PCI: 00:1c.2 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 03 prefmem PCI: 00:1c.2 20 <- [0x00e0500000 - 0x00e05fffff] size 0x00100000 gran 0x14 bus 03 mem PCI: 00:1c.2 assign_resources, bus 3 link: 0 PCI: 03:00.0 10 <- [0x00e0500000 - 0x00e0500fff] size 0x00001000 gran 0x0c mem PCI: 00:1c.2 assign_resources, bus 3 link: 0 PCI: 00:1d.0 EHCI Debug Port hook triggered PCI: 00:1d.0 10 <- [0x00e0605c00 - 0x00e0605fff] size 0x00000400 gran 0x0a mem PCI: 00:1d.0 EHCI Debug Port relocated PCI: 00:1f.0 assign_resources, bus 0 link: 0 PCI: 00:1f.0 assign_resources, bus 0 link: 0 PCI: 00:1f.2 10 <- [0x0000002060 - 0x0000002067] size 0x00000008 gran 0x03 io PCI: 00:1f.2 14 <- [0x0000002070 - 0x0000002073] size 0x00000004 gran 0x02 io PCI: 00:1f.2 18 <- [0x0000002068 - 0x000000206f] size 0x00000008 gran 0x03 io PCI: 00:1f.2 1c <- [0x0000002074 - 0x0000002077] size 0x00000004 gran 0x02 io PCI: 00:1f.2 20 <- [0x0000002040 - 0x000000205f] size 0x00000020 gran 0x05 io PCI: 00:1f.2 24 <- [0x00e0605000 - 0x00e06057ff] size 0x00000800 gran 0x0b mem PCI: 00:1f.3 10 <- [0x00e0606000 - 0x00e06060ff] size 0x00000100 gran 0x08 mem64 PCI: 00:1f.6 10 <- [0x00e0604000 - 0x00e0604fff] size 0x00001000 gran 0x0c mem64 DOMAIN: 0000 assign_resources, bus 0 link: 0 CBMEM region acee0000-acffffff (cbmem_late_set_table) Root Device assign_resources, bus 0 link: 0 Done setting resources. Show resources in subtree (Root Device)...After assigning values. Root Device child on link 0 CPU_CLUSTER: 0 CPU_CLUSTER: 0 child on link 0 APIC: 00 APIC: 00 APIC: acac DOMAIN: 0000 child on link 0 PCI: 00:00.0 DOMAIN: 0000 resource base 1000 size 1078 align 12 gran 0 limit ffff flags 40040100 index 10000000 DOMAIN: 0000 resource base d0000000 size 10606110 align 28 gran 0 limit efffffff flags 40040200 index 10000100 DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 3 DOMAIN: 0000 resource base 100000 size acf00000 align 0 gran 0 limit 0 flags e0004200 index 4 DOMAIN: 0000 resource base 100000000 size 4f600000 align 0 gran 0 limit 0 flags e0004200 index 5 DOMAIN: 0000 resource base ad000000 size 2a00000 align 0 gran 0 limit 0 flags f0000200 index 6 DOMAIN: 0000 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 7 DOMAIN: 0000 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 8 DOMAIN: 0000 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 9 DOMAIN: 0000 resource base 20000000 size 200000 align 0 gran 0 limit 0 flags f0004200 index a DOMAIN: 0000 resource base 40000000 size 200000 align 0 gran 0 limit 0 flags f0004200 index b PCI: 00:00.0 PCI: 00:00.0 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags e0000200 index cf PCI: 00:01.0 PCI: 00:02.0 PCI: 00:02.0 resource base e0000000 size 400000 align 22 gran 22 limit efffffff flags 60000201 index 10 PCI: 00:02.0 resource base d0000000 size 10000000 align 28 gran 28 limit efffffff flags 60101201 index 18 PCI: 00:02.0 resource base 2000 size 40 align 6 gran 6 limit ffff flags 60000100 index 20 PCI: 00:14.0 PCI: 00:16.0 PCI: 00:16.0 resource base e0606100 size 10 align 4 gran 4 limit efffffff flags 60000201 index 10 PCI: 00:16.1 PCI: 00:16.2 PCI: 00:16.3 PCI: 00:19.0 PCI: 00:1a.0 PCI: 00:1a.0 resource base e0605800 size 400 align 10 gran 10 limit efffffff flags 60000200 index 10 PCI: 00:1b.0 PCI: 00:1b.0 resource base e0600000 size 4000 align 14 gran 14 limit efffffff flags 60000201 index 10 PCI: 00:1c.0 PCI: 00:1c.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c PCI: 00:1c.0 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60081202 index 24 PCI: 00:1c.0 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60080202 index 20 PCI: 00:1c.1 child on link 0 PCI: 02:00.0 PCI: 00:1c.1 resource base 1000 size 1000 align 12 gran 12 limit ffff flags 60080102 index 1c PCI: 00:1c.1 resource base e0400000 size 100000 align 20 gran 20 limit efffffff flags 60081202 index 24 PCI: 00:1c.1 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60080202 index 20 PCI: 02:00.0 PCI: 02:00.0 resource base 1000 size 100 align 8 gran 8 limit ffff flags 60000100 index 10 PCI: 02:00.0 resource base e0404000 size 1000 align 12 gran 12 limit efffffff flags 60001201 index 18 PCI: 02:00.0 resource base e0400000 size 4000 align 14 gran 14 limit efffffff flags 60001201 index 20 PCI: 00:1c.2 child on link 0 PCI: 03:00.0 PCI: 00:1c.2 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c PCI: 00:1c.2 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60081202 index 24 PCI: 00:1c.2 resource base e0500000 size 100000 align 20 gran 20 limit efffffff flags 60080202 index 20 PCI: 03:00.0 PCI: 03:00.0 resource base e0500000 size 1000 align 12 gran 12 limit efffffff flags 60000200 index 10 PCI: 00:1c.3 PCI: 00:1c.4 PCI: 00:1c.5 PCI: 00:1c.6 PCI: 00:1c.7 PCI: 00:1d.0 PCI: 00:1d.0 resource base e0605c00 size 400 align 10 gran 10 limit efffffff flags 60000200 index 10 PCI: 00:1e.0 PCI: 00:1f.0 child on link 0 PNP: 00ff.1 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 PCI: 00:1f.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100 PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 PNP: 00ff.1 PNP: 00ff.0 PCI: 00:1f.2 PCI: 00:1f.2 resource base 2060 size 8 align 3 gran 3 limit ffff flags 60000100 index 10 PCI: 00:1f.2 resource base 2070 size 4 align 2 gran 2 limit ffff flags 60000100 index 14 PCI: 00:1f.2 resource base 2068 size 8 align 3 gran 3 limit ffff flags 60000100 index 18 PCI: 00:1f.2 resource base 2074 size 4 align 2 gran 2 limit ffff flags 60000100 index 1c PCI: 00:1f.2 resource base 2040 size 20 align 5 gran 5 limit ffff flags 60000100 index 20 PCI: 00:1f.2 resource base e0605000 size 800 align 11 gran 11 limit efffffff flags 60000200 index 24 PCI: 00:1f.3 PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20 PCI: 00:1f.3 resource base e0606000 size 100 align 8 gran 8 limit efffffff flags 60000201 index 10 PCI: 00:1f.5 PCI: 00:1f.6 PCI: 00:1f.6 resource base e0604000 size 1000 align 12 gran 12 limit efffffff flags 60000201 index 10 Done allocating resources. Enabling resources... PCI: 00:00.0 subsystem <- 0000/0000 PCI: 00:00.0 cmd <- 06 PCI: 00:02.0 subsystem <- 0000/0000 PCI: 00:02.0 cmd <- 03 PCI: 00:16.0 subsystem <- 0000/0000 PCI: 00:16.0 cmd <- 02 PCI: 00:1a.0 subsystem <- 0000/0000 PCI: 00:1a.0 cmd <- 102 PCI: 00:1b.0 subsystem <- 0000/0000 PCI: 00:1b.0 cmd <- 102 PCI: 00:1c.0 bridge ctrl <- 0003 PCI: 00:1c.0 subsystem <- 0000/0000 PCI: 00:1c.0 cmd <- 100 PCI: 00:1c.1 bridge ctrl <- 0003 PCI: 00:1c.1 subsystem <- 0000/0000 PCI: 00:1c.1 cmd <- 107 PCI: 00:1c.2 bridge ctrl <- 0003 PCI: 00:1c.2 subsystem <- 0000/0000 PCI: 00:1c.2 cmd <- 106 PCI: 00:1d.0 subsystem <- 0000/0000 PCI: 00:1d.0 cmd <- 102 pch_decode_init PCI: 00:1f.0 subsystem <- 0000/0000 PCI: 00:1f.0 cmd <- 107 PCI: 00:1f.2 subsystem <- 0000/0000 PCI: 00:1f.2 cmd <- 03 PCI: 00:1f.3 subsystem <- 0000/0000 PCI: 00:1f.3 cmd <- 103 PCI: 00:1f.6 subsystem <- 0000/0000 PCI: 00:1f.6 cmd <- 02 PCI: 02:00.0 cmd <- 03 PCI: 03:00.0 cmd <- 02 done. Initializing devices... Root Device init No FMAP found at ffe10000. FMAP: area RO_VPD not found Butterfly EC Init EC version: 820DG1 Error: Could not locate VPD area Setting Keyboard type in EC to English. Realtek NIC io_base = 0x1000 Programming MAC Address CPU_CLUSTER: 0 init start_eip=0x00001000, code_size=0x00000031 Installing SMM handler to 0xad000000 Installing IED header to 0xad400000 Initializing SMM handler... ... pmbase = 0x0500 SMI_STS: MCSMI PM1 PM1_STS: WAK PWRBTN TMROF GPE0_STS: GPIO15 GPIO14 GPIO13 GPIO12 GPIO11 GPIO10 GPIO9 GPIO8 GPIO6 GPIO5 GPIO4 GPIO3 GPIO2 GPIO1 GPIO0 ALT_GP_SMI_STS: GPI15 GPI14 GPI13 GPI12 GPI11 GPI10 GPI9 GPI8 GPI6 GPI5 GPI4 GPI3 GPI2 GPI1 GPI0 TCO_STS: ... raise SMI# Initializing CPU #0 CPU: vendor Intel device 206a7 CPU: family 06, model 2a, stepping 07 Enabling cache microcode: sig=0x206a7 pf=0x10 revision=0x28 CPU: Intel(R) Celeron(R) CPU 847 @ 1.10GHz. MTRR: Physical address space: 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0 0x00000000000c0000 - 0x00000000ad000000 size 0xacf40000 type 6 0x00000000ad000000 - 0x00000000d0000000 size 0x23000000 type 0 0x00000000d0000000 - 0x00000000e0000000 size 0x10000000 type 1 0x00000000e0000000 - 0x00000000ff800000 size 0x1f800000 type 0 0x00000000ff800000 - 0x0000000100000000 size 0x00800000 type 5 0x0000000100000000 - 0x000000014f600000 size 0x4f600000 type 6 MTRR: Fixed MSR 0x250 0x0606060606060606 MTRR: Fixed MSR 0x258 0x0606060606060606 MTRR: Fixed MSR 0x259 0x0000000000000000 MTRR: Fixed MSR 0x268 0x0606060606060606 MTRR: Fixed MSR 0x269 0x0606060606060606 MTRR: Fixed MSR 0x26a 0x0606060606060606 MTRR: Fixed MSR 0x26b 0x0606060606060606 MTRR: Fixed MSR 0x26c 0x0606060606060606 MTRR: Fixed MSR 0x26d 0x0606060606060606 MTRR: Fixed MSR 0x26e 0x0606060606060606 MTRR: Fixed MSR 0x26f 0x0606060606060606 call enable_fixed_mtrr() MTRR: default type WB/UC MTRR counts: 12/8. MTRR: UC selected as default type. MTRR: 0 base 0x0000000000000000 mask 0x0000000f80000000 type 6 MTRR: 1 base 0x0000000080000000 mask 0x0000000fe0000000 type 6 MTRR: 2 base 0x00000000a0000000 mask 0x0000000ff0000000 type 6 MTRR: 3 base 0x00000000ad000000 mask 0x0000000fff000000 type 0 MTRR: 4 base 0x00000000ae000000 mask 0x0000000ffe000000 type 0 MTRR: 5 base 0x00000000d0000000 mask 0x0000000ff0000000 type 1 MTRR: 6 base 0x00000000ff800000 mask 0x0000000fff800000 type 0 MTRR: 7 base 0x0000000100000000 mask 0x0000000f00000000 type 6 MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled Setting up local apic... apic_id: 0x00 done. Enabling VMX model_x06ax: energy policy set to 6 model_x06ax: frequency set to 1100 Turbo is unavailable CPU: 0 has 2 cores, 1 threads per core CPU: 0 has core 2 CPU1: stack_base 00155000, stack_end 00155ff8 Asserting INIT. Waiting for send to finish... +Deasserting INIT. Waiting for send to finish... +#startup loops: 2. Sending STARTUP #1 to 2. After apic_write. Initializing CPU #1 Startup point 1. Waiting for send to finish... +CPU: vendor Intel device 206a7 Sending STARTUP #2 to 2. After apic_write. CPU: family 06, model 2a, stepping 07 Startup point 1. Waiting for send to finish... +Enabling cache After Startup. CPU #0 initialized Waiting for 1 CPUS to stop microcode: sig=0x206a7 pf=0x10 revision=0x0 microcode: updated to revision 0x28 date=2012-04-24 CPU: Intel(R) Celeron(R) CPU 847 @ 1.10GHz. MTRR: Fixed MSR 0x250 0x0606060606060606 MTRR: Fixed MSR 0x258 0x0606060606060606 MTRR: Fixed MSR 0x259 0x0000000000000000 MTRR: Fixed MSR 0x268 0x0606060606060606 MTRR: Fixed MSR 0x269 0x0606060606060606 MTRR: Fixed MSR 0x26a 0x0606060606060606 MTRR: Fixed MSR 0x26b 0x0606060606060606 MTRR: Fixed MSR 0x26c 0x0606060606060606 MTRR: Fixed MSR 0x26d 0x0606060606060606 MTRR: Fixed MSR 0x26e 0x0606060606060606 MTRR: Fixed MSR 0x26f 0x0606060606060606 call enable_fixed_mtrr() MTRR: 0 base 0x0000000000000000 mask 0x0000000f80000000 type 6 MTRR: 1 base 0x0000000080000000 mask 0x0000000fe0000000 type 6 MTRR: 2 base 0x00000000a0000000 mask 0x0000000ff0000000 type 6 MTRR: 3 base 0x00000000ad000000 mask 0x0000000fff000000 type 0 MTRR: 4 base 0x00000000ae000000 mask 0x0000000ffe000000 type 0 MTRR: 5 base 0x00000000d0000000 mask 0x0000000ff0000000 type 1 MTRR: 6 base 0x00000000ff800000 mask 0x0000000fff800000 type 0 MTRR: 7 base 0x0000000100000000 mask 0x0000000f00000000 type 6 MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled Setting up local apic... apic_id: 0x02 done. Enabling VMX model_x06ax: energy policy set to 6 model_x06ax: frequency set to 1100 CPU #1 initialized All AP CPUs stopped (10176 loops) CPU1: stack: 00155000 - 00156000, lowest used address 00155c3c, stack used: 964 bytes PCI: 00:00.0 init Set BIOS_RESET_CPL CPU TDP: 17 Watts PCI: 00:02.0 init GT Power Management Init SNB GT1 Power Meter Weights DEVELOPER MODE FROM GPIO 54: 0 RECOVERY MODE FROM EC: 0 In CBFS, ROM address for PCI: 00:02.0 = ffc004f8 PCI expansion ROM, signature 0xaa55, INIT size 0x10000, data ptr 0x0040 PCI ROM image, vendor ID 8086, device ID 0106, PCI ROM image, Class Code 030000, Code Type 00 Copying VGA ROM Image from ffc004f8 to 0xc0000, 0x10000 bytes Real mode stub @00000600: 867 bytes Calling Option ROM... int15_handler: INT15 function 1000! Unknown INT15 function 1000! ... Option ROM returned. VBE: Getting information about VESA mode 4117 VBE: resolution: 1024x768@16 VBE: framebuffer: d0000000 VBE: Setting VESA mode 4117 int15_handler: INT15 function 238e! Unknown INT15 function 238e! VGA Option ROM has been loaded GT Power Management Init (post VBIOS) PCI: 00:16.0 init ME: FW Partition Table : OK ME: Bringup Loader Failure : NO ME: Firmware Init Complete : NO ME: Manufacturing Mode : NO ME: Boot Options Present : NO ME: Update In Progress : NO ME: Current Working State : Normal ME: Current Operation State : Bring up ME: Current Operation Mode : Security Override via Jumper ME: Error Code : No Error ME: Progress Phase : BUP Phase ME: Power Management Event : Pseudo-global reset ME: Progress Phase State : 0x52 ME: BIOS path: Disable PCI: 00:1a.0 init EHCI: Setting up controller.. done. PCI: 00:1b.0 init Azalia: base = e0600000 Azalia: codec_mask = 09 Azalia: Initializing codec #3 Azalia: codec viddid: 80862806 Azalia: verb_size: 16 Azalia: verb loaded. Azalia: Initializing codec #0 Azalia: codec viddid: 111d76e5 Azalia: verb_size: 460 Azalia: verb loaded. PCI: 00:1c.0 init Initializing PCH PCIe bridge. PCI: 00:1c.1 init Initializing PCH PCIe bridge. PCI: 00:1c.2 init Initializing PCH PCIe bridge. PCI: 00:1d.0 init EHCI: Setting up controller.. done. PCI: 00:1f.0 init pch: lpc_init IOAPIC: Initializing IOAPIC at 0xfec00000 IOAPIC: Bootstrap Processor Local APIC = 0x00 IOAPIC: ID = 0x02 IOAPIC: Dumping registers reg 0x0000: 0x02000000 reg 0x0001: 0x00170020 reg 0x0002: 0x00170020 Set power off after power failure. NMI sources disabled. PantherPoint PM init rtc_failed = 0x0 RTC Init i8259_configure_irq_trigger: current interrupts are 0x0 i8259_configure_irq_trigger: try to set interrupts 0x200 Enabling BIOS updates outside of SMM... Disabling ACPI via APMC: done. Locking SMM. PCI: 00:1f.2 init SATA: Initializing... SATA: Controller in AHCI mode. ABAR: E0605000 PCI: 00:1f.3 init PCI: 00:1f.6 init DEVELOPER MODE FROM GPIO 54: 0 RECOVERY MODE FROM EC: 0 CBFS: ERROR: No file header found at 0x7ff980 - try next aligned address: 0x7ff9c0. CBFS: ERROR: No file header found at 0x7ff9c0 - try next aligned address: 0x7ffa00. CBFS: WARNING: 'pci8086,1e24.rom' not found. CBFS: Could not find file 'pci8086,1e24.rom'. PCI: 02:00.0 init DEVELOPER MODE FROM GPIO 54: 0 RECOVERY MODE FROM EC: 0 CBFS: ERROR: No file header found at 0x7ff980 - try next aligned address: 0x7ff9c0. CBFS: ERROR: No file header found at 0x7ff9c0 - try next aligned address: 0x7ffa00. CBFS: WARNING: 'pci10ec,8136.rom' not found. CBFS: Could not find file 'pci10ec,8136.rom'. PCI: 03:00.0 init DEVELOPER MODE FROM GPIO 54: 0 RECOVERY MODE FROM EC: 0 CBFS: ERROR: No file header found at 0x7ff980 - try next aligned address: 0x7ff9c0. CBFS: ERROR: No file header found at 0x7ff9c0 - try next aligned address: 0x7ffa00. CBFS: WARNING: 'pci10ec,5209.rom' not found. CBFS: Could not find file 'pci10ec,5209.rom'. PNP: 00ff.0 init Quanta EnE KB3940Q: Initializing keyboard. Keyboard init... Devices initialized Show all devs...After init. Root Device: enabled 1 CPU_CLUSTER: 0: enabled 1 APIC: 00: enabled 1 APIC: acac: enabled 0 DOMAIN: 0000: enabled 1 PCI: 00:00.0: enabled 1 PCI: 00:01.0: enabled 0 PCI: 00:02.0: enabled 1 PCI: 00:14.0: enabled 0 PCI: 00:16.0: enabled 1 PCI: 00:16.1: enabled 0 PCI: 00:16.2: enabled 0 PCI: 00:16.3: enabled 0 PCI: 00:19.0: enabled 0 PCI: 00:1a.0: enabled 1 PCI: 00:1b.0: enabled 1 PCI: 00:1c.0: enabled 1 PCI: 00:1c.1: enabled 1 PCI: 00:1c.2: enabled 1 PCI: 00:1c.3: enabled 0 PCI: 00:1c.4: enabled 0 PCI: 00:1c.5: enabled 0 PCI: 00:1c.6: enabled 0 PCI: 00:1c.7: enabled 0 PCI: 00:1d.0: enabled 1 PCI: 00:1e.0: enabled 0 PCI: 00:1f.0: enabled 1 PNP: 00ff.1: enabled 1 PCI: 00:1f.2: enabled 1 PCI: 00:1f.3: enabled 1 PCI: 00:1f.5: enabled 0 PCI: 00:1f.6: enabled 1 PCI: 02:00.0: enabled 1 PCI: 03:00.0: enabled 1 PNP: 00ff.0: enabled 1 APIC: 02: enabled 1 CBMEM region acee0000-acffffff (cbmem_reinit) Adding CBMEM entry as no. 5 Moving GDT to acee1400...ok Updating MRC cache data. No FMAP found at ffe10000. FMAP: area RW_MRC_CACHE not found find_current_mrc_cache_local: No valid MRC cache found. SF: Detected MX25L6405D with page size 1000, total 800000 Need to erase the MRC cache region of -1 bytes at 0010c647 SF: Erase offset/length not multiple of erase size Finally: write MRC cache update to flash at 0010c647 ICH SPI: SCIP timeout, read 4c1, expected c SF: Failed to send write command (57 bytes): -1 SF: Macronix Page Program failed CBMEM Base is acee0000. Adding CBMEM entry as no. 6 ACPI: Writing ACPI tables at acee1600. ACPI: * FACS ACPI: * DSDT ACPI: * FADT ACPI: added table 1/32, length now 40 ACPI: * HPET ACPI: added table 2/32, length now 44 ACPI: * MADT ACPI: added table 3/32, length now 48 ACPI: * MCFG ACPI: added table 4/32, length now 52 ACPI: Patching up global NVS in DSDT at offset 0x01b7 -> 0xacee4c80 Adding CBMEM entry as no. 7 ACPI: * DSDT @ acee1850 Length 3244 ACPI: * SSDT Found 1 CPU(s) with 2 core(s) each. PSS: 1100MHz power 17000 control 0xb00 status 0xb00 PSS: 800MHz power 11938 control 0x800 status 0x800 PSS: 1100MHz power 17000 control 0xb00 status 0xb00 PSS: 800MHz power 11938 control 0x800 status 0x800 ACPI: added table 5/32, length now 56 current = acee6360 ACPI: done. ACPI tables: 19808 bytes. Adding CBMEM entry as no. 8 smbios_write_tables: aceecc00 Root Device (Hewlett-Packard Butterfly) CPU_CLUSTER: 0 (Intel i7 (SandyBridge/IvyBridge) integrated Northbridge) APIC: 00 (Socket rPGA989 CPU) APIC: acac (Intel SandyBridge/IvyBridge CPU) DOMAIN: 0000 (Intel i7 (SandyBridge/IvyBridge) integrated Northbridge) PCI: 00:00.0 (Intel i7 (SandyBridge/IvyBridge) integrated Northbridge) PCI: 00:01.0 (Intel i7 (SandyBridge/IvyBridge) integrated Northbridge) PCI: 00:02.0 (Intel i7 (SandyBridge/IvyBridge) integrated Northbridge) PCI: 00:14.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:16.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:16.1 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:16.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:16.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:19.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:1a.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:1b.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:1c.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:1c.1 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:1c.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:1c.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:1c.4 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:1c.5 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:1c.6 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:1c.7 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:1d.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:1e.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:1f.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PNP: 00ff.1 (QUANTA EnE KB3940Q EC) PCI: 00:1f.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:1f.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:1f.5 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:1f.6 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 02:00.0 (unknown) PCI: 03:00.0 (unknown) PNP: 00ff.0 (unknown) APIC: 02 (unknown) SMBIOS tables: 394 bytes. Adding CBMEM entry as no. 9 Adding CBMEM entry as no. 10 Writing table forward entry at 0x00000500 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 7edf Table forward entry ends at 0x00000528. ... aligned to 0x00001000 Writing coreboot table at 0xacfed400 rom_table_end = 0xacfed400 ... aligned to 0xacff0000 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES 1. 0000000000001000-000000000009ffff: RAM 2. 00000000000a0000-00000000000fffff: RESERVED 3. 0000000000100000-000000001fffffff: RAM 4. 0000000020000000-00000000201fffff: RESERVED 5. 0000000020200000-000000003fffffff: RAM 6. 0000000040000000-00000000401fffff: RESERVED 7. 0000000040200000-00000000acedffff: RAM 8. 00000000acee0000-00000000acffffff: CONFIGURATION TABLES 9. 00000000ad000000-00000000af9fffff: RESERVED 10. 00000000f0000000-00000000f3ffffff: RESERVED 11. 0000000100000000-000000014f5fffff: RAM RECOVERY MODE FROM EC: 0 DEVELOPER MODE FROM GPIO 54: 0 LID SWITCH FROM EC: 1 Wrote coreboot table at: acfed400, 0x364 bytes, checksum a3b1 coreboot table: 892 bytes. Multiboot Information structure has been written. FREE SPACE 0. acff5400 0000ac00 CAR GLOBALS 1. acee0200 00000200 TIME STAMP 2. acee0400 00000200 USBDEBUG 3. acee0600 00000200 MRC DATA 4. acee0800 00000c00 GDT 5. acee1400 00000200 ACPI 6. acee1600 0000b400 GNVS PTR 7. aceeca00 00000200 SMBIOS 8. aceecc00 00000800 ACPI RESUME 9. aceed400 00100000 COREBOOT 10. acfed400 00008000