About the memory I just changed the dimm to address A0 and now coreboot is reporting correctly 1 dimm detected.
But still no luck on the 0x71 post code loop (looks it is in some kind of loop because is still responsive to power and reset buttons).
I don't know where this loop could be located (coreboot or FSP).
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Attached is the serial dump with extra information.
To begin with the system didn't find memory attached...
but there is memory attached, SPD address mismatch? I will check.
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.......Timeout while sending command 0x0d to EC!
recv_ec_data: 0xff
recv_ec_data: 0xff
SPD index 7
No memory dimm at address A0
No memory dimm at address A2
No memory dimm at address A6
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0 DIMMs found
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‐‐‐‐‐‐‐ Original Message ‐‐‐‐‐‐‐
Dear coreboot engineers:
Right now I am stuck with a Kabylake system with the following message:
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CPU #1 initialized
apic_id: 0x06 done.
microcode: updated to revision 0x8d date=2018-01-21
CPU #3 initialized
bsp_do_flight_plan done after 220 msecs.
CPU: frequency set to 3600 MHz
Enabling SMIs.
Locking SMM.
VMX : param.enable = 0
VMX: pre-conditions not met
SGX: pre-conditions not met
VMX: pre-conditions not met
VMX: pre-conditions not met
SGX: pre-conditions not met
SGX: pre-conditions not met
VMX: pre-conditions not met
SGX: pre-conditions not met
POST: 0x71
....
May be some configuration is missing and I am trying to find this out myself but if someone of you can give a hint on how to resolve it I will be grateful.
Attached is the full serial dump.
Thank you,
Jose Trujillo