Hi all,
That coreboot fork does not automate the process of obtaining mrc.bin at all. Instead, it contains a disassembled/decompiled version of MRC and uses that instead. I would not recommend using that fork because it's outdated. On coreboot master, there's https://review.coreboot.org/43559 which should fix hangs with libgfxinit when a VGA display is plugged in, and https://review.coreboot.org/44155 which might help with https://ticket.coreboot.org/issues/259 or similar issues. I don't have a T440p, though.
On Fri, Aug 21, 2020 at 5:54 AM Harshit Sharma harshitsharmajs@gmail.com wrote:
Hi yk,
As Matt said It is not just meant for chromebooks but haswell in general. Just follow the instructions given on the coreboot page to obtain mrc.bin and place it in the root coreboot directory as it says.
That tutorial seems fishy to me as well. I'd suggest just run 'make menuconfig' and select t440p from mainboard menu. You don't need to change any values. The default values should work.
Finally, build the coreboot image, split into 8MB + 4MB chunks and just flash the 4MB chip.
Best, Harshit
On Thu, Aug 20, 2020, 5:13 PM yk via coreboot coreboot@coreboot.org wrote:
To anyone who has corebooted a t440p:
I followed the instructions here https://doc.coreboot.org/northbridge/intel/haswell/mrc.bin.html to obtain an mrc.bin for the t440p, but it seems like these instructions are generalized and are meant for chromebooks, and not thinkpads. I gave it a try anyways and my t440p beeps and flashes LED's (as configured in .config, to do so on fatal error). Months of searching, and I can't find any documentation or archived emails from this mailing list for obtaining an mrc.bin specifically for the t440p.
There exists this tutorial https://0xcb.dev/lenovo-t440p-coreboot/ but it tells me to use a forked version of coreboot which seems really fishy. I browsed the commits from that fork and I couldn't find anything that "automates obtaining mrc.bin" as it promises.
What is the proper way to obtain the mrc.bin and configure for t440p?
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x30000 <-- also what should this value be if the mrc.bin is 186K? _______________________________________________ coreboot mailing list -- coreboot@coreboot.org To unsubscribe send an email to coreboot-leave@coreboot.org
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