Thanks Jose,

My actual query is FSP Binary also has below ucode update  which is same to coreboot\src\cpu\intel\microcode\microcode.c

        msr.lo = (unsigned long)m + sizeof(struct microcode);

msr.hi = 0;

wrmsr(0x79, msr);

Atom E3845 BayTrail with D-Stepping never returns after writing uCode, tried different ucode revisions 

On Mon, Oct 1, 2018 at 1:49 PM Jose Trujillo <ce.autom@protonmail.com> wrote:

Hello Ranga:

It is ASCII just not properly formatted....

Just remove the text from this:

0x00000001, /* Header Version */

0x00000901, /* Patch ID       */

0x04212014, /* DATE           */

0x00030679, /* CPUID          */

0x69c4e6f1, /* Checksum       */

0x00000001, /* Loader Version */

0x00000001, /* Platform ID    */

0x0000cbd0, /* Data size      */

0x0000cc00, /* Total size     */

0x00000000, /* reserved       */

0x00000000, /* reserved       */

0x00000000, /* reserved       */

to this format:

0x00000001, \

0x00000901, \

0x04212014, \

0x00030679, \

0x69c4e6f1, \

0x00000001, \

0x00000001, \

0x0000cbd0, \

0x0000cc00, \

0x00000000, \

0x00000000, \

0x00000000,

And try again...

Jose Trujillo.

‐‐‐‐‐‐‐ Original Message ‐‐‐‐‐‐‐

On Friday, September 28, 2018 7:28 PM, galla rao <galla.rao80@gmail.com> wrote:

Hi ,

How does the coreboot picks the cpu microcodes 

as a blob or ASCII ?

Tried both option GENERATE FROM TREE and INCLUDE EXTERNAL HEADER

In Memory it appears it picks the ASCII file, but not a blob

intel/cpu/baytrail/microcode/M0130679901.h

0x00000001, /* Header Version */

0x00000901, /* Patch ID       */

0x04212014, /* DATE           */

0x00030679, /* CPUID          */

0x69c4e6f1, /* Checksum       */

0x00000001, /* Loader Version */

0x00000001, /* Platform ID    */

0x0000cbd0, /* Data size      */

0x0000cc00, /* Total size     */

0x00000000, /* reserved       */

0x00000000, /* reserved       */

0x00000000, /* reserved       */

Help me out in understanding this issue

Regards

Ranga