Cosmetic changes.

Signed-off-by: Scott Duplichan <scott@notabs.org>

Index: src/cpu/amd/agesa_wrapper/family14/model_14_init.c
===================================================================
--- src/cpu/amd/agesa_wrapper/family14/model_14_init.c	(revision 6551)
+++ src/cpu/amd/agesa_wrapper/family14/model_14_init.c	(working copy)
@@ -31,7 +31,6 @@
 #include <cpu/cpu.h>
 #include <cpu/x86/cache.h>
 #include <cpu/x86/mtrr.h>
-#include <cpu/amd/multicore.h>
 #include <cpu/amd/amdfam14.h>
 
 #define MCI_STATUS 0x401
@@ -58,19 +57,15 @@
 
 static void model_14_init(device_t dev)
 {
-  printk(BIOS_DEBUG, "Model 14 Init - a no-op.\n");
+  printk(BIOS_DEBUG, "Model 14 Init.\n");
 
   u8 i;
   msr_t msr;
   int msrno;
-  struct node_core_id id;
 #if CONFIG_LOGICAL_CPUS == 1
   u32 siblings;
 #endif
 
-//  id = get_node_core_id(read_nb_cfg_54());  /* nb_cfg_54 can not be set */
-//  printk(BIOS_DEBUG, "nodeid = %02d, coreid = %02d\n", id.nodeid, id.coreid);
-
   disable_cache ();
   /* Enable access to AMD RdDram and WrDram extension bits */
   msr = rdmsr(SYSCFG_MSR);
@@ -100,10 +95,6 @@
   /* Enable the local cpu apics */
   setup_lapic();
 
-  /* Set the processor name string */
-//  init_processor_name();
-
-
 #if CONFIG_LOGICAL_CPUS == 1
   siblings = cpuid_ecx(0x80000008) & 0xff;
 
Index: src/include/cpu/amd/amdfam14.h
===================================================================
--- src/include/cpu/amd/amdfam14.h	(revision 6551)
+++ src/include/cpu/amd/amdfam14.h	(working copy)
@@ -36,18 +36,11 @@
 msr_t rdmsr_amd(u32 index);
 void wrmsr_amd(u32 index, msr_t msr);
 
-//#if defined(__GNUC__)
-//// it can be used to get unitid and coreid it running only
-//struct node_core_id get_node_core_id(u32 nb_cfg_54);
-//struct node_core_id get_node_core_id_x(void);
-//#endif
-
 #if defined(__PRE_RAM__)
 void wait_all_core0_started(void);
 void wait_all_other_cores_started(u32 bsp_apicid);
 void wait_all_aps_started(u32 bsp_apicid);
 void allow_all_aps_stop(u32 bsp_apicid);
 #endif
-u32 get_initial_apicid(void);
 
 #endif /* CPU_AMD_FAM14_H */
Index: src/mainboard/amd/persimmon/get_bus_conf.c
===================================================================
--- src/mainboard/amd/persimmon/get_bus_conf.c	(revision 6551)
+++ src/mainboard/amd/persimmon/get_bus_conf.c	(working copy)
@@ -42,25 +42,12 @@
   0x0000ff0,
 };
 
-/*
-* HT Chain device num, actually it is unit id base of every ht device in chain,
-* assume every chain only have 4 ht device at most
-*/
-u32 hcdnx[] = {
-  0x20202020,
-};
-
 u32 bus_type[256];
-
 u32 sbdn_sb800;
 
-//KZ [092110]extern void get_pci1234(void);
-
 static u32 get_bus_conf_done = 0;
 
 
-
-
 void get_bus_conf(void)
 {
   u32 apicid_base;
@@ -139,8 +126,5 @@
   /* I/O APICs:   APIC ID Version State   Address */
   bus_isa = 10;
   apicid_base = CONFIG_MAX_CPUS;
-//#if CONFIG_LOGICAL_CPUS==1
-//  apicid_base = get_apicid_base(1);
-//#endif
-  apicid_sb800 = apicid_base + 0;
+  apicid_sb800 = apicid_base;
 }
Index: src/mainboard/amd/persimmon/mainboard.c
===================================================================
--- src/mainboard/amd/persimmon/mainboard.c	(revision 6551)
+++ src/mainboard/amd/persimmon/mainboard.c	(working copy)
@@ -53,7 +53,8 @@
 *************************************************/
 static void persimmon_enable(device_t dev)
 {
-	printk(BIOS_INFO, "Mainboard Persimmon Enable. dev=0x%p\n", dev);
+	printk(BIOS_INFO, "Mainboard " CONFIG_MAINBOARD_PART_NUMBER " Enable.\n");
+
 #if (CONFIG_GFXUMA == 1)
 	msr_t msr, msr2;
 	uint32_t sys_mem;
@@ -110,6 +111,6 @@
 	return 0;
 }
 struct chip_operations mainboard_ops = {
-	CHIP_NAME("AMD PERSIMMON Mainboard")
+	CHIP_NAME(CONFIG_MAINBOARD_VENDOR " " CONFIG_MAINBOARD_PART_NUMBER " Mainboard")
 	.enable_dev = persimmon_enable,
 };
Index: src/northbridge/amd/agesa_wrapper/family14/northbridge.c
===================================================================
--- src/northbridge/amd/agesa_wrapper/family14/northbridge.c	(revision 6551)
+++ src/northbridge/amd/agesa_wrapper/family14/northbridge.c	(working copy)
@@ -849,7 +849,7 @@
     .set_resources    = cpu_bus_set_resources,
     .enable_resources = NULL,
     .init             = cpu_bus_init,
-    .scan_bus         = 0,
+    .scan_bus         = NULL,
 };
 
 
