I have no idea as well, I'm a beginner on coreboot stuff..you know better than me...

What I'm thinking, I need to find a way for initializing northbridge Intel 82946 ==>southbridge Intel 82801GX (ICH7) ==>IT8718 which is UART (I/0) since it has GPIO as well...
I got no idea on how to initialize northbridge yet....

what do you reckon ? can CPU talk directly to IT8718F in this case ? or it needs NB and SB ?
Is any more documentations for Intel 82946 ? or that's the only one we can obtain ?

It doesn't matter if we can not find it, I want to learn, it's very good if we can solve it...but it's not, I have nothing to loose...

On 8/11/2016 7:25 AM, Idwer Vollering wrote:
I don't know, what do you think?

2016-11-08 0:07 GMT+01:00 Riko Ho <antonius.riko@gmail.com>:
On 7/11/2016 10:55 AM, Idwer Vollering wrote:

/

2016-11-07 2:59 GMT+01:00 Riko Ho <antonius.riko@gmail.com>:

Next line you're talking about :
        |   f000:0f10    66becc8100e0 mov esi, 0xe00081cc
        |   f000:0f16    67268b06     mov ax, [es:esi]
        |   f000:0f1a    0d0010       or ax, 0x1000

======
>From what I recall is nico_h on IRC hinted that the PCIe bus must be
 up in order to be able to use the UART.
 There could be code for this that touches PCIEXBAR around these lines:
   |||||||   f000:0f10      66becc8100e0   mov esi, 0xe00081cc
   |||||||   f000:0f16      67268b06       mov ax, word es:[esi]
   |||||||   f000:0f1a      0d0010         or ax, 0x1000

Since this writes to ax, the C code could look like this:
 MCHBAR16(0xe00081cc) |=0x1000;
 This would end up in romstage.c
======

in which function I put that MCHBAR16(0xe00081cc) |=0x1000; on romstage.c ?

No idea, it might belong in src/northbridge/intel/i945/raminit.c
instead. The C macro, MCHBAR16(), I mentioned was an example and won't
be useful for PCIEXBAR.

So what should we do for getting the correct PCIEXBAR and making UART
running ?

=====
I suggest that you read at least chapter "5 Host Bridge/DRAM
Controller Registers (Device 0, Function 0) " starting on page 75.
=====

Ok, I will do that, but I'm sure I have a lot of questions in relation
with the reversed code and romstage.c and this chapter 5.

--
/***/
Kind Regards
Riko Ho
/***/



--
/*===*/
Kind regards,
Riko Ho
/*===*/

    


--
/*===*/
Kind regards,
Riko Ho
/*===*/