Hi Nico-
Can you clarify what you mean by coreboot on x86 is special?

Does that mean even if 3-byte addresses are supported (which would allow addressing more than 128Mb / 16MiB of memory), it specifically doesn't work on x86?

I'm looking at the coreboot port that was done for the Thinkpad X210, which is a Chinese custom motherboard that updates the X201 form factor with an i7-8650U / i7-8550u / i5-8250U CPU, and just for the hell of it I'm wondering what the largest piece of BIOS memory is I can get on there.

Hardware-wise, I can get up to 512Mb / 64MiB into the chip form factor. If we can address it, that opens up interesting possibilities for embedding full OS distributions there (such as my previous question about TinyCore).

Gruß,
R

On Fri, Mar 29, 2019 at 10:10 AM Nico Huber <nico.h@gmx.de> wrote:
>
> Hello Rafael,
>
> On 28.03.19 17:12, Rafael Send wrote:
> > Where would I generally find information about what controls the flash chip?
>
> in the datasheet of the chip that is connected to the BIOS flash. What
> chip that is, is not always easy to answer. If you don't have access to
> the board's schematics, visual inspection might help.
>
> What Peter told us, btw., applies only to x86 platforms. If you target
> x86, coreboot support for more than 16MiB will be hard, because that is
> the limit what is memory mapped. To access more than 16MiB on x86, you'd
> need a SPI driver (which coreboot has) and use that to access files
> (which is the harder part, because coreboot on x86 is special).
>
> Please tell us more about your target hardware and use case. Usually,
> you don't need that much flash for coreboot. So there may be other
> options to consider (e.g. a SPI driver in your payload).
>
> Nico