Hi all..

I have worked with PM49fl00x.diff patch ,its worked fine and i got the output as below

[root@localhost ~]# flashrom

Calibrating delay loop... OK.

No coreboot table found.

Found chipset "VIA VT8237", enabling flash write... OK.

Pm49FL004 found at physical address 0xfff80000.

Flash part is Pm49FL004 (512 KB).

No operations were specified.

[root@localhost ~]# flashrom -r backup.bin

Calibrating delay loop... OK.

No coreboot table found.

Found chipset "VIA VT8237", enabling flash write... OK.

Pm49FL004 found at physical address 0xfff80000.

Flash part is Pm49FL004 (512 KB).

Reading Flash...done

[root@localhost ~]# flashrom -E

Calibrating delay loop... OK.

No coreboot table found.

Found chipset "VIA VT8237", enabling flash write... OK.

Pm49FL004 found at physical address 0xfff80000.

Flash part is Pm49FL004 (512 KB).

Erasing flash chip

Erasing page: 0007 at address: 0x00070000

[root@localhost ~]# flashrom -w backup.bin

Calibrating delay loop... OK.

No coreboot table found.

Found chipset "VIA VT8237", enabling flash write... OK.

Pm49FL004 found at physical address 0xfff80000.

Flash part is Pm49FL004 (512 KB).

Flash image seems to be a legacy BIOS. Disabling checks.

Programming page: 0007 at address: 0x00070000

[root@localhost ~]# flashrom -v backup.bin

Calibrating delay loop... OK.

No coreboot table found.

Found chipset "VIA VT8237", enabling flash write... OK.

Pm49FL004 found at physical address 0xfff80000.

Flash part is Pm49FL004 (512 KB).

Flash image seems to be a legacy BIOS. Disabling checks.

Verifying flash... VERIFIED.

**************************************************************************************************************************************

Now i am working on SST49LF004B
                                   33-4C-NHE
                                   0710022-CA   with the motherboard K8Upgrade-VM800

The flashrom detect flash device on this board, But the erasing and writting operation is not happening properly
   hier flashrom output :

[root@localhost ~]# flashrom

Calibrating delay loop... OK.

No coreboot table found.

Found chipset "VIA VT8237", enabling flash write... OK.

SST49LF004A/B found at physical address 0xfff80000.

Flash part is SST49LF004A/B (512 KB).

No operations were specified.

[root@localhost ~]# flashrom -E

Calibrating delay loop... OK.

No coreboot table found.

Found chipset "VIA VT8237", enabling flash write... OK.

SST49LF004A/B found at physical address 0xfff80000.

Flash part is SST49LF004A/B (512 KB).

Erasing flash chip

[root@localhost ~]# flashrom -w backup.bin

Calibrating delay loop... OK.

No coreboot table found.

Found chipset "VIA VT8237", enabling flash write... OK.

SST49LF004A/B found at physical address 0xfff80000.

Flash part is SST49LF004A/B (512 KB).

Flash image seems to be a legacy BIOS. Disabling checks.

Programming page: 0007 at address: 0x00070000

[root@localhost ~]# flashrom -v backup.bin

Calibrating delay loop... OK.

No coreboot table found.

Found chipset "VIA VT8237", enabling flash write... OK.

SST49LF004A/B found at physical address 0xfff80000.

Flash part is SST49LF004A/B (512 KB).

Flash image seems to be a legacy BIOS. Disabling checks.

Verifying flash... FAILED!

Now we are analysing the code but we are not getting idea...

please guide us how to change the code ..we are ready to fix the things.

Thanks in advance........

with regards,

Malatesh kamatad..