Hi Matt

Thanks for the response. After quite a bit of fiddling I successfully built and flashed my own ROM.

I've put up a little repo/script that will reproduce this exactly: https://github.com/marcosscriven/chromebook-coreboot/blob/master/build.sh

For posterity, some issues I faced:

1) I fiddled for some time trying to build crossgcc - however the Wolf branch has some seriously old versions (including trying to download some source code tarballs that have moved), and ultimately I gave up and used the tools in Ubuntu 14.0.4

2) I also fiddled for a while trying to get vboot compiling, before stepping back and realising that was really only for a ChromeOS rom, and just switching it off.

3) The spd.bin I built ended up looking much larger than my existing one. Looking in the file showed that instead of hex, it was full of "-e -n \xnn". Googling yielded this: http://www.coreboot.org/pipermail/coreboot/2014-March/077480.html - so I just patched the Makefile: https://github.com/marcosscriven/chromebook-coreboot/blob/master/Makefile.inc.patch

4) Flashing the ROM on the Chromebook comes up with a scary "spi_block_erase_20 failed " message. Googling told me this was a 'normal' error, in true lazy developer fashion. I couldn't find an explanation as to why this was considered normal.

5) Despite attempting to set the boot menu key to ESC rather than F12 (and verifying the boot-menu-key and boot-menu-message appeared with csfbtool), it still came up with F12 when I booted. Fortunately I have a USB keyboard handy, and was still able to boot a Lubuntu install.

On the software side only things I needed to tweak from a vanilla Lubuntu install:

1) Sound didn't work straight away, I needed to install pulseaudio
2) Trackpad pressure sensitivity seemed low. Had to change the "Synaptics Finger" settings from 25,30,0 to 15,20,0

The next step is moving onto upstream coreboot, but I'll open a separate question on that.

Marcos

On Sat, May 9, 2015 at 5:03 AM, Matt DeVillier <matt.devillier@gmail.com> wrote:
hi Marcos,

I'm not a Google dev, just a hobbyist, but I've spent a lot of time over the past year working with coreboot for the Haswell ChromeOS devices (mostly the ChromeBoxes) and can offer some answers, inline below.

On 5/8/2015 2:38 PM, Marcos Scriven wrote:
I have a Dell Chromebook 11 (Google codename 'Wolf') which I'd like to install a custom coreboot ROM on. Although John Lewis provides ROMs here https://johnlewis.ie/custom-chromebook-firmware/rom-download/, I'd rather not use them for a few reasons:

1) It's replacing one 'closed' ROM with another, in the sense it's from a 3rd party with no public repo or build scripts. Although it's possible to extract the coreboot config used to build them, it's not possible to reproduce and modify the payloads.
2) I don't need his closed 'Jeltka' payload.
3) I'd like to experiment with other payloads, custom splash screens etc.
4) I wouldn't learn anything, and I'm interested!


 that's what I started with, and a good overview for what you need to build your own firmware.  I'd suggest however that you first build coreboot using the same tree/branch as the shipped firmware (which you linked below) before trying to get upstream coreboot working, particularly since Wolf hasn't been upstreamed yet. 

Payload wise, SeaBIOS is fine to build from upstream;  I build off the 1.8.1 tag currently.  You're welcome to use my configs and build scripts for reference: https://github.com/MattDevo/coreboot and https://github.com/MattDevo/SeaBIOS


However, that prompted some questions, which I'm hoping someone here might be able to help with. (I did ask in the #chromimum-os IRC channel, but they suggested Google coreboot developers would be more likely to help here).

 also try #coreboot.  I loiter in there and am happy to help if I'm around (I'm MattDevo on IRC).


1) What blobs do I use?

Although the guide sensibly says to backup the existing bios with 'flashrom -r', it also says to extract a bios.bin from /usr/sbin/chromeos-firwmwareupdate (I've posted details of both at the end). From the latter, it goes on to get you to extract four blobs:

- SPI Descriptor
- Management Engine
- MRC
- VBIOS

 that list is correct.


The first discrepancy is that the guide says the 'Management Engine firmware' is only in the latter, but I was able to use ifdtool on both images to extract the same set of three files. The flashregion_0_flashdescriptor.bin files were identical, though the other two were different despite being the same size.

 The ME firmware isn't always reliably read from a running system, so using the blob extracted from the shell-ball firmware image is preferred.


The other thing is there's no reason given as to why one would use the MRC and VBIOS blobs from the extract, rather than the backup. Curiously, they are slightly different sizes (again details below). Looking at the config it seems the extracted bios image was built with from a Google coreboot fork four months older than the one backed up from the machine.

 these should be identical between the backup image and shell-ball extract. 



2) Which mainboard do I use for the Dell Chromebook 11?

 Wolf


Assuming I have the correct four proprietary blobs, the next thing is choosing the right mainboard. The guide I link to mentions suggests 'Falco', but I don't see how, without knowing the target, such a suggestion could be meaningful?

 Falco is used as an example because it was already upstreamed.  Since Wolf isn't, you would need to do so yourself, which is why I suggested starting with the stock firmware tree/branch.  I upstreamed Panther, which was somewhat easier since it doesn't have a built-in display or EC to worry about, but you can use Falco as a guide, comparing the upstream Falco branch to the shipped firmware tree/branch, and make similar adjustments for Wolf.


Looking here https://www.chromium.org/chromium-os/developer-information-for-chrome-os-devices Falco appears to be unique to the HP Chromebook 14. The mainboard codename for my Chromebook is 'Wolf', and that's not in coreboot upstream.

Comparing 'src/mainboard/google' in Google's fork, and coreboot upstream:



It seems there is at least some attempt to merge upstream, and yet wolf isn't there. Is there a particular reason some mainboards are missing? Did Google stop doing so for some reason?

 To my knowledge, upstreaming boards during the Haswell days wasn't a priority, and was often done by non-Google devs (like me) who happened to have a particular device.  Within the last ~6 mos this has changed significantly, and there's been a large push to keep the two in sync.


as per above, use that config to build from that branch.



Thanks

Marcos


--- Some further ROM details ---

bios extracted with 'flashrom -r' from my Dell Chromebook 11:

chromebook11.rom: 8192 kB, bootblocksize 3144, romsize 8388608, offset 0x700000
alignment: 64 bytes, architecture: x86

Name                           Offset     Type         Size
cmos_layout.bin                0x700000   cmos_layout  1164
pci8086,0406.rom               0x7004c0   optionrom    65536
cpu_microcode_blob.bin         0x710500   microcode    41024
config                         0x71a5c0   raw          5536
fallback/vboot                 0x71bbc0   stage        15083
(empty)                        0x71f700   null         2136
fallback/romstage              0x71ff80   stage        42497
fallback/coreboot_ram          0x72a600   stage        91450
fallback/payload               0x740b80   payload      54898
u-boot.dtb                     0x74e240   mrc_cache    7919
(empty)                        0x750180   null         327192
mrc.bin                        0x79ffc0   spd          190180
(empty)                        0x7ce700   null         120984
spd.bin                        0x7ebfc0   spd          1536
(empty)                        0x7ec600   null         77144

Extracting config shows "# This image was built using git revision 52034fc1537d4a38e792e700cbc8e9dd1fc36a9c", which is a commit hash from Google's fork:

 I'd start with this one, or whatever the latest commit is for that branch.



commit cef55018e4e936af9a758675353e332df4d9d1a6
Author: David Wu <David_Wu@quantatw.com>
Date:   Tue Apr 29 12:59:04 2014 -0700


bios extracted from the chromeos-firwmwareupdate utility (which on my machine is a 7.7M binary built on 27th Apr this year):

bios.bin: 8192 kB, bootblocksize 3144, romsize 8388608, offset 0x700000
alignment: 64 bytes, architecture: x86

Name                           Offset     Type         Size
cmos_layout.bin                0x700000   cmos_layout  1164
pci8086,0406.rom               0x7004c0   optionrom    65536
cpu_microcode_blob.bin         0x710500   microcode    43072
config                         0x71adc0   raw          5536
fallback/vboot                 0x71c3c0   stage        15083
(empty)                        0x71ff00   null         88
fallback/romstage              0x71ff80   stage        42497
fallback/coreboot_ram          0x72a600   stage        91491
fallback/payload               0x740bc0   payload      54898
u-boot.dtb                     0x74e280   mrc_cache    7919
(empty)                        0x7501c0   null         327128
mrc.bin                        0x79ffc0   spd          191020
(empty)                        0x7cea40   null         120152
spd.bin                        0x7ebfc0   spd          1536
(empty)                        0x7ec600   null         77144

Extracting config shows "# This image was built using git revision 52034fc1537d4a38e792e700cbc8e9dd1fc36a9c", which is also a commit hash from Google's fork, but older:

commit 52034fc1537d4a38e792e700cbc8e9dd1fc36a9c
Author: Marc Jones <marc.jones@se-eng.com>
Date:   Thu Dec 12 13:13:30 2013 -0700


Differences in SPI/ME from backed up ROM and the one extracted from firmwareupdate tool:

marcosscriven@ubuntuvm:~/coreboot/util/ifdtool$ ls -altr frombackup/
total 8200
-rw-r--r-- 1 marcosscriven marcosscriven 6291456 May  8 19:20 flashregion_1_bios.bin
-rw-r--r-- 1 marcosscriven marcosscriven    4096 May  8 19:20 flashregion_0_flashdescriptor.bin
-rw-r--r-- 1 marcosscriven marcosscriven 2093056 May  8 19:20 flashregion_2_intel_me.bin
drwxrwxr-x 2 marcosscriven marcosscriven    4096 May  8 19:20 .
drwxrwxr-x 4 marcosscriven marcosscriven    4096 May  8 19:21 ..

marcosscriven@ubuntuvm:~/coreboot/util/ifdtool$ ls -altr fromextract/
total 8200
-rw-r--r-- 1 marcosscriven marcosscriven 6291456 May  8 19:20 flashregion_1_bios.bin
-rw-r--r-- 1 marcosscriven marcosscriven    4096 May  8 19:20 flashregion_0_flashdescriptor.bin
-rw-r--r-- 1 marcosscriven marcosscriven 2093056 May  8 19:20 flashregion_2_intel_me.bin
drwxrwxr-x 4 marcosscriven marcosscriven    4096 May  8 19:21 ..
drwxrwxr-x 2 marcosscriven marcosscriven    4096 May  8 19:21 .

marcosscriven@ubuntuvm:~/coreboot/util/ifdtool$ diff frombackup/ fromextract/
Binary files frombackup/flashregion_1_bios.bin and fromextract/flashregion_1_bios.bin differ
Binary files frombackup/flashregion_2_intel_me.bin and fromextract/flashregion_2_intel_me.bin differ

the bios.bin isn't applicable (just the firmware descriptor and ME); as I noted above, the ME extracted from a running system will differ slightly.

Good luck!

cheers,
Matt