22 Mar
2013
22 Mar
'13
3:33 a.m.
for GSOC students, i think this ideas would be enough for new guys. we can
not assume the potential guy is much familiar with coreboot.
Best wishes
QingPei Wang
Phone: 86+18930528086
On Thu, Mar 21, 2013 at 4:53 AM, Marc Jones <marcj303(a)gmail.com> wrote:
On Wed, Mar 20, 2013 at 2:26 PM, Patrick Georgi
<patrick(a)georgi-clan.de>
wrote:
Am 20.03.2013 21:09, schrieb Marc Jones:
Yes, I think we would need a cbfs file for allocating the region
before hand and then that would be used by ERST and pstore. I don' t
know how the region internals work. Also, there are problaly some
pstore limitation and knowing the flash device before hand to set
alignment (erase blocks) etc.
Marc
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The ACPI APIE and ERST methods allow the kernel
to mount pstore to
store information in NVRAM (coreboot cbfs). This could be used to
store errors that are otherwise difficult to track, like suspend and
resume issues. The implementation would need to be able to find an
area free in cbfs for storing the data.
Reserve it beforehand? That's what I
intend to do for Tiano variables