coreboot-4.0-1657-g2aac3f6-dirty Sat Sep 3 23:55:35 CST 2011 starting... BSP Family_Model: 00100fa0 *sysinfo range: [000cc000,000cf360] bsp_apicid = 00 cpu_init_detectedx = 00000000 microcode: equivalent rev id = 0x10a0, current patch id = 0x00000000 microcode: patch id to apply = 0x010000bf microcode: updated to patch id = 0x010000bf success cpuSetAMDMSR done Enter amd_ht_init() Exit amd_ht_init() cpuSetAMDPCI 00cpuSetAMDPCI revision 40000000 done Prep FID/VID Node:00 P-state info in MSRC001_0064 is invalid !!! P-state info in MSRc0010064 is invalid !!! F3x80: e600e681 F3x84: 80e641e6 F3xD4: c8810f26 F3xD8: 03001316 F3xDC: 0000611a core0 started: start_other_cores() init node: 00 cores: 05 Start other core - nodeid: 00 cores: 05 started ap apicid: cccccooooorrrrreeeeexxxxx::::: --------------- {{{{{ A AAAAPPPPPIIIIICCCCCIIIIIDDDDD ===== 0000034521 NNNNNOOOOODDDDDEEEEEIIIIIDDDDD = ==== 0000000000 CCCCCOOOOORRRRREEEEEIIIIIDDDDD ===== 0000024315}}}}} ------ --------- *m mmmmiiiiAiccccPcrrr rrooo0ooccc1ccooooodddddeeeee::::: eeeeeqqqqquuuuuiiiiivvvvvaaaaalll lleeeeennnnnttttt rrrrreeeeevvvvv iiiiiddddd ===== 00000xxxxx1111100000aaa aa00000,,,,, cccccuuuuurrrrrrrrrreeeeennnnnttttt pppppaaaaatttttccccchhhhh iiiiiddd dd ===== 00000xxxxx0000000000000000000000000000000000000000 startemmdiimmmcciiirrccc oorrrcoooccccooddoooeeddd:eee: ::: pppppaaattaatcctthhccc hhh iiiiidddd d tt tootto ooa apaaapppppppppllllyylyy y == ===00 x000x0xxx00001111100000000000000000bb000 ffbbbfff mmmmm*iiii icccAccrrrPrrooo ooccc0ccooo2oodddddeeeee::::: uuuuupppppdddddaaaaattttteeeeeddd dd tttttooooo pppppaaaaatttttccccchhhhh iiiiiddddd ===== 00000xxxxx00000111 1100000000000000000000bbbbbfffff sssssuuuuucccccccccceeeeessssssssss sctccccpppppauuuuurSSSSSteeeeeettttdtAAAAAMMMM MDDDDDMMMMMSSSSSRRRRR * AP 0 3FdIFFFoXIIIXXXnMMMMeEEE!E!! ! C PCCCPPPUUU U V VeVVreeerrrsssisiioioonon nn uuununnknkknknonnwooowwwnnn n o oroo rrr nnnonootott t s usssuuupppppppoporootrrrttteeededd!d!! ! sFtIFFFiIInaXIXXirMXMMttEMEE_e!E!!fd ! iC Cd PCCPvUPPUi UUdV eVVV_reeeasrrrpisss(iiisoootnonna n gu uenuuknnn1nkkk)nnn ooooawwwpnwnn i nco irooo rrrdn :nnn oooo0ttt5 t s s usspuuupppppppoorootrrretttdeeeddd!!! ! F* dd I ooddDAnnooVPeennI eeD0 4 on AsPtiiiiannnn:riiii ttttt0e____5ffffdiiii dddd vvvviiiidddd____aaaapppp((((ssssttttaaaaggggeeee1111)))) aaaappppiiiicccciiiidddd:::: 00001324 *FFFFIIII DDDDAVVVVPIIII DDDD0 5 oooonnnn AAAAPPPP:::: 00002413 started rs780_early_setup() fam10_optimization() rs780_por_init Begin FIDVID MSR 0xc0010071 0x01800001 0x3c013440 FIDVID on BSP, APIC_id: 00 BSP fid = 0 Wait for AP stage 1: ap_apicid = 1 readback = 1000001 common_fid(packed) = 0 Wait for AP stage 1: ap_apicid = 2 readback = 2000001 common_fid(packed) = 0 Wait for AP stage 1: ap_apicid = 3 readback = 3000001 common_fid(packed) = 0 Wait for AP stage 1: ap_apicid = 4 readback = 4000001 common_fid(packed) = 0 Wait for AP stage 1: ap_apicid = 5 readback = 5000001 common_fid(packed) = 0 common_fid = 0 End FIDVIDMSR 0xc0010071 0x01800001 0x3c013440 rs780_htinit cpu_ht_freq=b. rs780_htinit: HT3 mode ...WARM RESET... coreboot-4.0-1657-g2aac3f6-dirty Sat Sep 3 23:55:35 CST 2011 starting... BSP Family_Model: 00100fa0 *sysinfo range: [000cc000,000cf360] bsp_apicid = 00 cpu_init_detectedx = 00000000 microcode: equivalent rev id = 0x10a0, current patch id = 0x00000000 microcode: patch id to apply = 0x010000bf microcode: updated to patch id = 0x010000bf success cpuSetAMDMSR done Enter amd_ht_init() Exit amd_ht_init() cpuSetAMDPCI 00cpuSetAMDPCI revision 40000000 done Prep FID/VID Node:00 P-state info in MSRC001_0064 is invalid !!! P-state info in MSRc0010064 is invalid !!! F3x80: e600e681 F3x84: 80e641e6 F3xD4: c8810f26 F3xD8: 03001316 F3xDC: 0000611a core0 started: start_other_cores() init node: 00 cores: 05 Start other core - nodeid: 00 cores: 05 started ap apicid: cccccooooorrrrreeeeexxxxx::::: --------------- {{{{{ A AAAAPPPPPIIIIICCCCCIIIIIDDDDD ===== 0000043512 NNNNNOOOOODDDDDEEEEEIIIIIDDDDD = ==== 0000000000 CCCCCOOOOORRRRREEEEEIIIIIDDDDD ===== 0000034152}}}}} ------ --------- * mmmAmmiiiiiPcccc crrr0rroo1ooocccccooooodddddeeeee::::: eeeeeqqqqquuuuuiiiiivvvvvaaaaalll lleeeeennnnnttttt rrrrreeeeevvvvv iiiiiddddd ===== 00000xxxxx1111100000aaa aa00000,,,,, cccccuuuuurrrrrrrrrreeeeennnnnttttt pppppaaaaatttttccccchhhhh iiiiiddd dd ===== 00000xxxxx0000000000000000000000000000000000000000 startedmmmmmiiiiic ccccrrrrrooooocccccooooodddddeeeee::::: pppppaaaaatttttccccchhhhh iiiiiddddd tt tttooooo aaaaapppppppppplllllyyyyy ===== 00000xxxxx000001111100000000000000000000bb bbbfffff m*mmmmiiii icccAccrrPrrro oooo0cccccooooo2dddddeeeee::::: uuuuupppppdddddaaaaattttteeeeeddd dd tttttooooo pppppaaaaatttttccccchhhhh iiiiiddddd ===== 00000xxxxx00000111 1100000000000000000000bbbbbfffff sssssuuuuucccccccccceeeeessssssssss scctcccpappppruuuuuSSSSSteeeeeettdtttAAAAA MMMMMDDDDDMMMMMSSSSSRRRRR * AP 03 FFdFFIIoIIXnXXXMeMMMEEEE !!!! CCCCPPPPUUUU VVVVeeeerrrrssssiiiioooonnnn uuuunnnnkkkknnnnoooowwwwnnnn ooo orrrr nnnnooootttt ssssuuuuppppppppoooorrrrtttteeeedddd!!!! sFFitIFFIIInaXXXirMXMttEMM_e!EEEd !!!fC iCCCd PPvUPPUi UU dV _eVVVsreeesrrrtisssaiiigooooennn2 n u uanuunpknnkinkkconnniwooonwwwd nnn: oooo0rrr2 r n n onnotoot tt s sussupuupppppopporoortrrtteteededd!d!! ! * ddd odAoooPnnn eeene0 4 siiitinnanniriiittttte____ffffdiiiidd ddvvvviiiidddd____ssssttttaaaaggggeeee2222 aaaappppiiiicccciiiidddd:::: 00005341 * AP 05started rs780_early_setup() fam10_optimization() rs780_por_init Begin FIDVID MSR 0xc0010071 0x01800001 0x3c013440 End FIDVIDMSR 0xc0010071 0x01800001 0x3c013440 rs780_htinit cpu_ht_freq=b. rs780_htinit: HT3 mode fill_mem_ctrl() raminit_amdmct() raminit_amdmct begin: DIMMPresence: DIMMValid=1 DIMMPresence: DIMMPresent=1 DIMMPresence: RegDIMMPresent=0 DIMMPresence: DimmECCPresent=0 DIMMPresence: DimmPARPresent=0 DIMMPresence: Dimmx4Present=0 DIMMPresence: Dimmx8Present=1 DIMMPresence: Dimmx16Present=0 DIMMPresence: DimmPlPresent=0 DIMMPresence: DimmDRPresent=1 DIMMPresence: DimmQRPresent=0 DIMMPresence: DATAload[0]=2 DIMMPresence: MAload[0]=10 DIMMPresence: MAdimms[0]=1 DIMMPresence: DATAload[1]=0 DIMMPresence: MAload[1]=0 DIMMPresence: MAdimms[1]=0 DIMMPresence: Status 1000 DIMMPresence: ErrStatus 0 DIMMPresence: ErrCode 0 DIMMPresence: Done DCTInit_D: mct_DIMMPresence Done SPDCalcWidth: Status 1000 SPDCalcWidth: ErrStatus 0 SPDCalcWidth: ErrCode 0 SPDCalcWidth: Done DCTInit_D: mct_SPDCalcWidth Done SPDGetTCL_D: DIMMCASL 4 SPDGetTCL_D: DIMMAutoSpeed 4 SPDGetTCL_D: Status 1000 SPDGetTCL_D: ErrStatus 0 SPDGetTCL_D: ErrCode 0 SPDGetTCL_D: Done AutoCycTiming: Status 1000 AutoCycTiming: ErrStatus 0 AutoCycTiming: ErrCode 0 AutoCycTiming: Done DCTInit_D: AutoCycTiming_D Done SPDSetBanks: CSPresent 3 SPDSetBanks: Status 1000 SPDSetBanks: ErrStatus 0 SPDSetBanks: ErrCode 0 SPDSetBanks: Done AfterStitch pDCTstat->NodeSysBase = 0 mct_AfterStitchMemory: pDCTstat->NodeSysLimit = ffffff StitchMemory: Status 1000 StitchMemory: ErrStatus 0 StitchMemory: ErrCode 0 StitchMemory: Done InterleaveBanks_D: Status 1000 InterleaveBanks_D: ErrStatus 0 InterleaveBanks_D: ErrCode 0 InterleaveBanks_D: Done AutoConfig_D: DramControl: 2a06 AutoConfig_D: DramTimingLo: 90092 AutoConfig_D: DramConfigMisc: 0 AutoConfig_D: DramConfigMisc2: 0 AutoConfig_D: DramConfigLo: 10000 AutoConfig_D: DramConfigHi: f40000b AutoConfig: Status 1000 AutoConfig: ErrStatus 0 AutoConfig: ErrCode 0 AutoConfig: Done DCTInit_D: AutoConfig_D Done DCTInit_D: PlatformSpec_D Done DCTInit_D: StartupDCT_D mctAutoInitMCT_D: SyncDCTsReady_D mctAutoInitMCT_D: HTMemMapInit_D Node: 00 base: 00 limit: ffffff BottomIO: c00000 Node: 00 base: 03 limit: 13fffff Node: 01 base: 00 limit: 00 Node: 02 base: 00 limit: 00 Node: 03 base: 00 limit: 00 Node: 04 base: 00 limit: 00 Node: 05 base: 00 limit: 00 Node: 06 base: 00 limit: 00 Node: 07 base: 00 limit: 00 mctAutoInitMCT_D: CPUMemTyping_D CPUMemTyping: Cache32bTOP:c00000 CPUMemTyping: Bottom32bIO:c00000 CPUMemTyping: Bottom40bIO:1400000 mctAutoInitMCT_D: DQSTiming_D TrainRcvrEn: Status 1100 TrainRcvrEn: ErrStatus 0 TrainRcvrEn: ErrCode 0 TrainRcvrEn: Done TrainDQSRdWrPos: Status 1100 TrainDQSRdWrPos: TrainErrors 0 TrainDQSRdWrPos: ErrStatus 0 TrainDQSRdWrPos: ErrCode 0 TrainDQSRdWrPos: Done TrainDQSRdWrPos: Status 1100 TrainDQSRdWrPos: TrainErrors 0 TrainDQSRdWrPos: ErrStatus 0 TrainDQSRdWrPos: ErrCode 0 TrainDQSRdWrPos: Done TrainDQSRdWrPos: Status 1100 TrainDQSRdWrPos: TrainErrors 0 TrainDQSRdWrPos: ErrStatus 0 TrainDQSRdWrPos: ErrCode 0 TrainDQSRdWrPos: Done TrainDQSRdWrPos: Status 1100 TrainDQSRdWrPos: TrainErrors 0 TrainDQSRdWrPos: ErrStatus 0 TrainDQSRdWrPos: ErrCode 0 TrainDQSRdWrPos: Done mctAutoInitMCT_D: UMAMemTyping_D mctAutoInitMCT_D: :OtherTiming InterleaveNodes_D: Status 1100 InterleaveNodes_D: ErrStatus 0 InterleaveNodes_D: ErrCode 0 InterleaveNodes_D: Done InterleaveChannels_D: Node 0 InterleaveChannels_D: Status 1100 InterleaveChannels_D: ErrStatus 0 InterleaveChannels_D: ErrCode 0 InterleaveChannels_D: Node 1 InterleaveChannels_D: Status 1000 InterleaveChannels_D: ErrStatus 0 InterleaveChannels_D: ErrCode 0 InterleaveChannels_D: Node 2 InterleaveChannels_D: Status 1000 InterleaveChannels_D: ErrStatus 0 InterleaveChannels_D: ErrCode 0 InterleaveChannels_D: Node 3 InterleaveChannels_D: Status 1000 InterleaveChannels_D: ErrStatus 0 InterleaveChannels_D: ErrCode 0 InterleaveChannels_D: Node 4 InterleaveChannels_D: Status 1000 InterleaveChannels_D: ErrStatus 0 InterleaveChannels_D: ErrCode 0 InterleaveChannels_D: Node 5 InterleaveChannels_D: Status 1000 InterleaveChannels_D: ErrStatus 0 InterleaveChannels_D: ErrCode 0 InterleaveChannels_D: Node 6 InterleaveChannels_D: Status 1000 InterleaveChannels_D: ErrStatus 0 InterleaveChannels_D: ErrCode 0 InterleaveChannels_D: Node 7 InterleaveChannels_D: Status 1000 InterleaveChannels_D: ErrStatus 0 InterleaveChannels_D: ErrCode 0 InterleaveChannels_D: Done mctAutoInitMCT_D: ECCInit_D All Done raminit_amdmct end: v_esp=000cbef8 testx = 5a5a5a5a Copying data from cache to RAM -- switching to use RAM as stack... Done testx = 5a5a5a5a Disabling cache as ram now Clearing initial memory region: Done Loading image. Searching for fallback/coreboot_ram Check cmos_layout.bin Check fallback/romstage Check fallback/coreboot_ram Stage: loading fallback/coreboot_ram @ 0x200000 (1212416 bytes), entry @ 0x200000 Stage: done loading. Jumping to image. coreboot-4.0-1657-g2aac3f6-dirty Sat Sep 3 23:55:35 CST 2011 booting... Enumerating buses... Show all devs...Before device enumeration. Root Device: enabled 1 APIC_CLUSTER: 0: enabled 1 APIC: 00: enabled 1 PCI_DOMAIN: 0000: enabled 1 PCI: 00:18.0: enabled 1 PCI: 00:00.0: enabled 1 PCI: 00:01.0: enabled 1 PCI: 00:02.0: enabled 1 PCI: 00:03.0: enabled 0 PCI: 00:04.0: enabled 1 PCI: 00:05.0: enabled 0 PCI: 00:06.0: enabled 0 PCI: 00:07.0: enabled 0 PCI: 00:08.0: enabled 0 PCI: 00:09.0: enabled 1 PCI: 00:0a.0: enabled 1 PCI: 00:11.0: enabled 1 PCI: 00:12.0: enabled 1 PCI: 00:12.2: enabled 1 PCI: 00:13.0: enabled 1 PCI: 00:13.2: enabled 1 PCI: 00:14.0: enabled 1 I2C: 00:50: enabled 1 I2C: 00:51: enabled 1 I2C: 00:52: enabled 1 I2C: 00:53: enabled 1 PCI: 00:14.1: enabled 1 PCI: 00:14.2: enabled 1 PCI: 00:14.3: enabled 1 PNP: 002e.0: enabled 0 PNP: 002e.1: enabled 0 PNP: 002e.2: enabled 1 PNP: 002e.3: enabled 1 PNP: 002e.5: enabled 1 PNP: 002e.6: enabled 0 PNP: 002e.7: enabled 0 PNP: 002e.8: enabled 0 PNP: 002e.9: enabled 0 PNP: 002e.a: enabled 0 PNP: 002e.b: enabled 1 PCI: 00:14.4: enabled 0 PCI: 00:14.5: enabled 1 PCI: 00:14.6: enabled 0 PCI: 00:15.0: enabled 1 PCI: 00:15.1: enabled 1 PCI: 00:15.2: enabled 1 PCI: 00:15.3: enabled 1 PCI: 00:16.0: enabled 1 PCI: 00:16.2: enabled 1 PCI: 00:18.1: enabled 1 PCI: 00:18.2: enabled 1 PCI: 00:18.3: enabled 1 PCI: 00:18.4: enabled 1 Compare with tree... Root Device: enabled 1 APIC_CLUSTER: 0: enabled 1 APIC: 00: enabled 1 PCI_DOMAIN: 0000: enabled 1 PCI: 00:18.0: enabled 1 PCI: 00:00.0: enabled 1 PCI: 00:01.0: enabled 1 PCI: 00:02.0: enabled 1 PCI: 00:03.0: enabled 0 PCI: 00:04.0: enabled 1 PCI: 00:05.0: enabled 0 PCI: 00:06.0: enabled 0 PCI: 00:07.0: enabled 0 PCI: 00:08.0: enabled 0 PCI: 00:09.0: enabled 1 PCI: 00:0a.0: enabled 1 PCI: 00:11.0: enabled 1 PCI: 00:12.0: enabled 1 PCI: 00:12.2: enabled 1 PCI: 00:13.0: enabled 1 PCI: 00:13.2: enabled 1 PCI: 00:14.0: enabled 1 I2C: 00:50: enabled 1 I2C: 00:51: enabled 1 I2C: 00:52: enabled 1 I2C: 00:53: enabled 1 PCI: 00:14.1: enabled 1 PCI: 00:14.2: enabled 1 PCI: 00:14.3: enabled 1 PNP: 002e.0: enabled 0 PNP: 002e.1: enabled 0 PNP: 002e.2: enabled 1 PNP: 002e.3: enabled 1 PNP: 002e.5: enabled 1 PNP: 002e.6: enabled 0 PNP: 002e.7: enabled 0 PNP: 002e.8: enabled 0 PNP: 002e.9: enabled 0 PNP: 002e.a: enabled 0 PNP: 002e.b: enabled 1 PCI: 00:14.4: enabled 0 PCI: 00:14.5: enabled 1 PCI: 00:14.6: enabled 0 PCI: 00:15.0: enabled 1 PCI: 00:15.1: enabled 1 PCI: 00:15.2: enabled 1 PCI: 00:15.3: enabled 1 PCI: 00:16.0: enabled 1 PCI: 00:16.2: enabled 1 PCI: 00:18.1: enabled 1 PCI: 00:18.2: enabled 1 PCI: 00:18.3: enabled 1 PCI: 00:18.4: enabled 1 Mainboard ASUS M5A88PMEnable. dev=0x0021fe6c m5a88pm_enable, TOP MEM: msr.lo = 0xc0000000, msr.hi = 0x00000000 m5a88pm_enable, TOP MEM2: msr2.lo = 0x40000000, msr2.hi = 0x00000001 m5a88pm_enable: uma size 0x10000000, memory start 0xb0000000 scan_static_bus for Root Device APIC_CLUSTER: 0 enabled PCI_DOMAIN: 0000 enabled APIC_CLUSTER: 0 scanning... PCI: 00:18.3 siblings=5 CPU: APIC: 00 enabled CPU: APIC: 01 enabled CPU: APIC: 02 enabled CPU: APIC: 03 enabled CPU: APIC: 04 enabled CPU: APIC: 05 enabled PCI_DOMAIN: 0000 scanning... PCI: pci_scan_bus for bus 00 PCI: 00:18.0 [1022/1200] bus ops PCI: 00:18.0 [1022/1200] enabled PCI: 00:18.1 [1022/1201] enabled PCI: 00:18.2 [1022/1202] enabled PCI: 00:18.3 [1022/1203] ops PCI: 00:18.3 [1022/1203] enabled PCI: 00:18.4 [1022/1204] enabled PCI: Using configuration type 1 rs780_enable: dev=002203b8, VID_DID=0x96011022 Bus-0, Dev-0, Fun-0. enable_pcie_bar3() gpp_sb_init nb_dev=0x0, dev=0x40, port=0x8 NB_PCI_REG04 = 6. NB_PCI_REG84 = 3000095. NB_PCI_REG4C = 52042. PCI: 00:00.0 [1022/9601] enabled Capability: type 0x08 @ 0xc4 flags: 0x0181 PCI: pci_scan_bus for bus 00 PCI: pci_scan_bus limits devfn 0 - devfn ffffffff PCI: pci_scan_bus upper limit too big. Using 0xff. rs780_enable: dev=002203b8, VID_DID=0x96011022 Bus-0, Dev-0, Fun-0. enable_pcie_bar3() gpp_sb_init nb_dev=0x0, dev=0x40, port=0x8 NB_PCI_REG04 = 6. NB_PCI_REG84 = 3000095. NB_PCI_REG4C = 52042. PCI: 00:00.0 [1022/9601] enabled rs780_enable: dev=00220568, VID_DID=0x96021022 Bus-0, Dev-1, Fun-0. GC is accessible from now on. Capability: type 0x08 @ 0x44 Capability: type 0x0d @ 0xb0 Capability: type 0x08 @ 0x44 Capability: type 0x08 @ 0x44 Capability: type 0x0d @ 0xb0 Capability: type 0x08 @ 0x44 Capability: type 0x0d @ 0xb0 PCI: 00:01.0 [1022/9602] enabled rs780_enable: dev=00220718, VID_DID=0x96031022 Bus-0, Dev-2,3, Fun-0. enable=1 rs780_gfx_init, nb_dev=0x002203b8, dev=0x00220718, port=0x2. misc 28 = 0 rs780_gfx_init step5.9.12.1. rs780_gfx_init step5.9.12.3. rs780_gfx_init step5.9.12.9. rs780_gfx_init step1. device = 2 rs780_gfx_init single_port_configuration. PcieLinkTraining port=2:lc current state=2030400 rs780_gfx_init single_port_configuration step12. rs780_gfx_init single_port_configuration step13. rs780_gfx_init single_port_configuration step14. PCI: Static device PCI: 00:02.0 not found, disabling it. rs780_enable: dev=002208c8, VID_DID=0xffffffff Bus-0, Dev-2,3, Fun-0. enable=0 rs780_enable: dev=002209e8, VID_DID=0x96041022 Bus-0, Dev-4,5,6,7, Fun-0. enable=1 gpp_sb_init nb_dev=0x0, dev=0x20, port=0x4 PcieLinkTraining port=4:lc current state=10203 PcieTrainPort port=0x4 result=0 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 Capability: type 0x05 @ 0xa0 Capability: type 0x0d @ 0xb0 Capability: type 0x08 @ 0xb8 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 Capability: type 0x05 @ 0xa0 Capability: type 0x0d @ 0xb0 Capability: type 0x08 @ 0xb8 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 Capability: type 0x05 @ 0xa0 Capability: type 0x0d @ 0xb0 Capability: type 0x08 @ 0xb8 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 PCI: 00:04.0 subordinate bus PCI Express PCI: 00:04.0 [1022/9604] enabled rs780_enable: dev=00220ac0, VID_DID=0x96051022 Bus-0, Dev-4,5,6,7, Fun-0. enable=0 rs780_enable: dev=00220b98, VID_DID=0x96061022 Bus-0, Dev-4,5,6,7, Fun-0. enable=0 rs780_enable: dev=00220c70, VID_DID=0x96071022 Bus-0, Dev-4,5,6,7, Fun-0. enable=0 rs780_enable: dev=00220d48, VID_DID=0x960a1022 Bus-0, Dev-8, Fun-0. enable=0 rs780_enable: dev=00220e20, VID_DID=0x96081022 Bus-0, Dev-9, 10, Fun-0. enable=1 gpp_sb_init nb_dev=0x0, dev=0x48, port=0x9 PcieLinkTraining port=9:lc current state=a0b0f10 addr=e0000000,bus=0,devfn=48 PcieTrainPort reg=0x10000 PcieTrainPort port=0x9 result=1 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 Capability: type 0x05 @ 0xa0 Capability: type 0x0d @ 0xb0 Capability: type 0x08 @ 0xb8 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 Capability: type 0x05 @ 0xa0 Capability: type 0x0d @ 0xb0 Capability: type 0x08 @ 0xb8 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 Capability: type 0x05 @ 0xa0 Capability: type 0x0d @ 0xb0 Capability: type 0x08 @ 0xb8 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 PCI: 00:09.0 subordinate bus PCI Express PCI: 00:09.0 [1022/9608] enabled rs780_enable: dev=00220ef8, VID_DID=0x96091022 Bus-0, Dev-9, 10, Fun-0. enable=1 gpp_sb_init nb_dev=0x0, dev=0x50, port=0xa PcieLinkTraining port=a:lc current state=a0b0f10 addr=e0000000,bus=0,devfn=50 PcieTrainPort reg=0x10000 PcieTrainPort port=0xa result=1 disable_pcie_bar3() Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 Capability: type 0x05 @ 0xa0 Capability: type 0x0d @ 0xb0 Capability: type 0x08 @ 0xb8 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 Capability: type 0x05 @ 0xa0 Capability: type 0x0d @ 0xb0 Capability: type 0x08 @ 0xb8 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 Capability: type 0x05 @ 0xa0 Capability: type 0x0d @ 0xb0 Capability: type 0x08 @ 0xb8 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 PCI: 00:0a.0 subordinate bus PCI Express PCI: 00:0a.0 [1022/9609] enabled sb800_enable() PCI: 00:11.0 [1002/4390] enabled sb800_enable() PCI: 00:12.0 [1002/4397] ops PCI: 00:12.0 [1002/4397] enabled sb800_enable() PCI: 00:12.2 [1002/4396] ops PCI: 00:12.2 [1002/4396] enabled sb800_enable() PCI: 00:13.0 [1002/4397] ops PCI: 00:13.0 [1002/4397] enabled sb800_enable() PCI: 00:13.2 [1002/4396] ops PCI: 00:13.2 [1002/4396] enabled sb800_enable() sm_init(). IOAPIC: Clearing IOAPIC at 0xfec00000 IOAPIC: 23 interrupts IOAPIC: reg 0x00000000 value 0x00000000 0x00010000 IOAPIC: reg 0x00000001 value 0x00000000 0x00010000 IOAPIC: reg 0x00000002 value 0x00000000 0x00010000 IOAPIC: reg 0x00000003 value 0x00000000 0x00010000 IOAPIC: reg 0x00000004 value 0x00000000 0x00010000 IOAPIC: reg 0x00000005 value 0x00000000 0x00010000 IOAPIC: reg 0x00000006 value 0x00000000 0x00010000 IOAPIC: reg 0x00000007 value 0x00000000 0x00010000 IOAPIC: reg 0x00000008 value 0x00000000 0x00010000 IOAPIC: reg 0x00000009 value 0x00000000 0x00010000 IOAPIC: reg 0x0000000a value 0x00000000 0x00010000 IOAPIC: reg 0x0000000b value 0x00000000 0x00010000 IOAPIC: reg 0x0000000c value 0x00000000 0x00010000 IOAPIC: reg 0x0000000d value 0x00000000 0x00010000 IOAPIC: reg 0x0000000e value 0x00000000 0x00010000 IOAPIC: reg 0x0000000f value 0x00000000 0x00010000 IOAPIC: reg 0x00000010 value 0x00000000 0x00010000 IOAPIC: reg 0x00000011 value 0x00000000 0x00010000 IOAPIC: reg 0x00000012 value 0x00000000 0x00010000 IOAPIC: reg 0x00000013 value 0x00000000 0x00010000 IOAPIC: reg 0x00000014 value 0x00000000 0x00010000 IOAPIC: reg 0x00000015 value 0x00000000 0x00010000 IOAPIC: reg 0x00000016 value 0x00000000 0x00010000 IOAPIC: Initializing IOAPIC at 0xfec00000 IOAPIC: Bootstrap Processor Local APIC = 0x00 IOAPIC: ID = 0x08 IOAPIC: 23 interrupts IOAPIC: Enabling interrupts on FSB IOAPIC: reg 0x00000000 value 0x00000000 0x00000700 IOAPIC: reg 0x00000001 value 0x00000000 0x00010000 IOAPIC: reg 0x00000002 value 0x00000000 0x00010000 IOAPIC: reg 0x00000003 value 0x00000000 0x00010000 IOAPIC: reg 0x00000004 value 0x00000000 0x00010000 IOAPIC: reg 0x00000005 value 0x00000000 0x00010000 IOAPIC: reg 0x00000006 value 0x00000000 0x00010000 IOAPIC: reg 0x00000007 value 0x00000000 0x00010000 IOAPIC: reg 0x00000008 value 0x00000000 0x00010000 IOAPIC: reg 0x00000009 value 0x00000000 0x00010000 IOAPIC: reg 0x0000000a value 0x00000000 0x00010000 IOAPIC: reg 0x0000000b value 0x00000000 0x00010000 IOAPIC: reg 0x0000000c value 0x00000000 0x00010000 IOAPIC: reg 0x0000000d value 0x00000000 0x00010000 IOAPIC: reg 0x0000000e value 0x00000000 0x00010000 IOAPIC: reg 0x0000000f value 0x00000000 0x00010000 IOAPIC: reg 0x00000010 value 0x00000000 0x00010000 IOAPIC: reg 0x00000011 value 0x00000000 0x00010000 IOAPIC: reg 0x00000012 value 0x00000000 0x00010000 IOAPIC: reg 0x00000013 value 0x00000000 0x00010000 IOAPIC: reg 0x00000014 value 0x00000000 0x00010000 IOAPIC: reg 0x00000015 value 0x00000000 0x00010000 IOAPIC: reg 0x00000016 value 0x00000000 0x00010000 PCI: 00:14.0 [1002/4385] enabled sb800_enable() PCI: 00:14.1 [1002/439c] enabled sb800_enable() hda enabled PCI: 00:14.2 [1002/4383] ops PCI: 00:14.2 [1002/4383] enabled sb800_enable() PCI: 00:14.3 [1002/439d] bus ops PCI: 00:14.3 [1002/439d] enabled sb800_enable() PCI: 00:14.4 [1002/4384] bus ops PCI: 00:14.4 [1002/4384] disabled sb800_enable() PCI: 00:14.5 [1002/4399] ops PCI: 00:14.5 [1002/4399] enabled sb800_enable() gec disabled sb800_enable() PCI: 00:15.0 [1002/43a0] bus ops PCI: 00:15.0 [1002/43a0] enabled sb800_enable() PCI: 00:15.1 [1002/43a1] bus ops PCI: 00:15.1 [1002/43a1] enabled sb800_enable() PCI: 00:15.2 [1002/43a2] bus ops PCI: 00:15.2 [1002/43a2] enabled sb800_enable() PCI: 00:15.3 [1002/43a3] bus ops PCI: 00:15.3 [1002/43a3] enabled sb800_enable() PCI: 00:16.0 [1002/4397] ops PCI: 00:16.0 [1002/4397] enabled sb800_enable() PCI: 00:16.2 [1002/4396] ops PCI: 00:16.2 [1002/4396] enabled PCI: 00:18.0 [1022/1200] bus ops PCI: 00:18.0 [1022/1200] enabled PCI: 00:18.1 [1022/1201] enabled PCI: 00:18.2 [1022/1202] enabled PCI: 00:18.3 [1022/1203] ops PCI: 00:18.3 [1022/1203] enabled PCI: 00:18.4 [1022/1204] enabled do_pci_scan_bridge for PCI: 00:01.0 PCI: pci_scan_bus for bus 01 PCI: 01:05.0 [1002/9715] enabled PCI: 01:05.1 [1002/970f] enabled PCI: pci_scan_bus returning with max=001 do_pci_scan_bridge returns max 1 do_pci_scan_bridge for PCI: 00:04.0 PCI: pci_scan_bus for bus 02 PCI: pci_scan_bus returning with max=002 do_pci_scan_bridge returns max 2 do_pci_scan_bridge for PCI: 00:09.0 PCI: pci_scan_bus for bus 03 PCI: 03:00.0 [1106/3403] enabled PCI: 03:00.1 [1106/0415] enabled PCI: pci_scan_bus returning with max=003 Capability: type 0x01 @ 0x50 Capability: type 0x05 @ 0x80 Capability: type 0x10 @ 0x98 Capability: type 0x01 @ 0x50 Capability: type 0x05 @ 0x70 Capability: type 0x10 @ 0x90 do_pci_scan_bridge returns max 3 do_pci_scan_bridge for PCI: 00:0a.0 PCI: pci_scan_bus for bus 04 PCI: 04:00.0 [1b21/1042] enabled PCI: pci_scan_bus returning with max=004 Capability: type 0x05 @ 0x50 Capability: type 0x11 @ 0x68 Capability: type 0x01 @ 0x78 Capability: type 0x10 @ 0x80 do_pci_scan_bridge returns max 4 scan_static_bus for PCI: 00:14.3 PNP: 002e.0 disabled PNP: 002e.1 disabled PNP: 002e.2 enabled PNP: 002e.3 enabled PNP: 002e.5 enabled PNP: 002e.6 disabled PNP: 002e.7 disabled PNP: 002e.8 disabled PNP: 002e.9 disabled PNP: 002e.a disabled PNP: 002e.b enabled scan_static_bus for PCI: 00:14.3 done do_pci_scan_bridge for PCI: 00:15.0 PCI: pci_scan_bus for bus 05 PCI: pci_scan_bus returning with max=005 do_pci_scan_bridge returns max 5 do_pci_scan_bridge for PCI: 00:15.1 PCI: pci_scan_bus for bus 06 PCI: 06:00.0 [10ec/8168] enabled PCI: pci_scan_bus returning with max=006 do_pci_scan_bridge returns max 6 do_pci_scan_bridge for PCI: 00:15.2 PCI: pci_scan_bus for bus 07 PCI: pci_scan_bus returning with max=007 do_pci_scan_bridge returns max 7 do_pci_scan_bridge for PCI: 00:15.3 PCI: pci_scan_bus for bus 08 PCI: pci_scan_bus returning with max=008 do_pci_scan_bridge returns max 8 PCI: pci_scan_bus returning with max=008 PCI: pci_scan_bus returning with max=008 PCI_DOMAIN: 0000 passpw: enabled scan_static_bus for Root Device done done Setting up VGA for PCI: 01:05.0 Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:01.0 Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:18.0 Setting PCI_BRIDGE_CTL_VGA for bridge PCI_DOMAIN: 0000 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device Allocating resources... Reading resources... Root Device read_resources bus 0 link: 0 APIC_CLUSTER: 0 read_resources bus 0 link: 0 APIC: 00 missing read_resources APIC: 01 missing read_resources APIC: 02 missing read_resources APIC: 03 missing read_resources APIC: 04 missing read_resources APIC: 05 missing read_resources APIC_CLUSTER: 0 read_resources bus 0 link: 0 done PCI_DOMAIN: 0000 read_resources bus 0 link: 0 PCI: 00:18.0 read_resources bus 0 link: 0 PCI: 00:00.0 register 1c(00000004), read-only ignoring it PCI: 00:01.0 read_resources bus 1 link: 0 PCI: 00:01.0 read_resources bus 1 link: 0 done PCI: 00:04.0 read_resources bus 2 link: 0 PCI: 00:04.0 read_resources bus 2 link: 0 done PCI: 00:09.0 read_resources bus 3 link: 0 PCI: 00:09.0 read_resources bus 3 link: 0 done PCI: 00:0a.0 read_resources bus 4 link: 0 PCI: 00:0a.0 read_resources bus 4 link: 0 done PCI: 00:14.0 read_resources bus 0 link: 0 I2C: 00:50 missing read_resources I2C: 00:51 missing read_resources I2C: 00:52 missing read_resources I2C: 00:53 missing read_resources PCI: 00:14.0 read_resources bus 0 link: 0 done PCI: 00:14.3 read_resources bus 0 link: 0 PNP: 002e.3 missing read_resources PNP: 002e.b missing read_resources PCI: 00:14.3 read_resources bus 0 link: 0 done PCI: 00:15.0 read_resources bus 5 link: 0 PCI: 00:15.0 read_resources bus 5 link: 0 done PCI: 00:15.1 read_resources bus 6 link: 0 PCI: 00:15.1 read_resources bus 6 link: 0 done PCI: 00:15.2 read_resources bus 7 link: 0 PCI: 00:15.2 read_resources bus 7 link: 0 done PCI: 00:15.3 read_resources bus 8 link: 0 PCI: 00:15.3 read_resources bus 8 link: 0 done PCI: 00:18.0 read_resources bus 0 link: 0 done PCI: 00:18.0 read_resources bus 0 link: 1 PCI: 00:18.0 read_resources bus 0 link: 1 done PCI: 00:18.0 read_resources bus 0 link: 2 PCI: 00:18.0 read_resources bus 0 link: 2 done PCI: 00:18.0 read_resources bus 0 link: 3 PCI: 00:18.0 read_resources bus 0 link: 3 done PCI: 00:18.0 read_resources bus 0 link: 4 PCI: 00:18.0 read_resources bus 0 link: 4 done PCI: 00:18.0 read_resources bus 0 link: 5 PCI: 00:18.0 read_resources bus 0 link: 5 done PCI: 00:18.0 read_resources bus 0 link: 6 PCI: 00:18.0 read_resources bus 0 link: 6 done PCI: 00:18.0 read_resources bus 0 link: 7 PCI: 00:18.0 read_resources bus 0 link: 7 done PCI_DOMAIN: 0000 read_resources bus 0 link: 0 done Root Device read_resources bus 0 link: 0 done Done reading resources. Show resources in subtree (Root Device)...After reading. Root Device child on link 0 APIC_CLUSTER: 0 APIC_CLUSTER: 0 child on link 0 APIC: 00 APIC: 00 APIC: 01 APIC: 02 APIC: 03 APIC: 04 APIC: 05 PCI_DOMAIN: 0000 child on link 0 PCI: 00:18.0 PCI_DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 100000 00 PCI_DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10 000100 PCI_DOMAIN: 0000 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 i ndex c0010058 PCI: 00:18.0 child on link 0 PCI: 00:00.0 PCI: 00:18.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80100 index 10d8 PCI: 00:18.0 resource base 0 size 0 align 20 gran 20 limit ffffffffff flags 81200 index 10b8 PCI: 00:18.0 resource base 0 size 0 align 20 gran 20 limit ffffffffff flags 80200 index 10b0 PCI: 00:00.0 PCI: 00:01.0 child on link 0 PCI: 01:05.0 PCI: 00:01.0 resource base 0 size 0 align 12 gran 12 limit 1ffffff flags 80102 index 1c PCI: 00:01.0 resource base 0 size 0 align 20 gran 20 limit ffffffffff flags 81202 index 24 PCI: 00:01.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 PCI: 01:05.0 PCI: 01:05.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffff flags 1200 inde x 10 PCI: 01:05.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 14 PCI: 01:05.0 resource base 0 size 10000 align 16 gran 16 limit ffffffff flags 200 index 18 PCI: 01:05.0 resource base 0 size 100000 align 20 gran 20 limit ffffffff flags 200 index 2 4 PCI: 01:05.1 PCI: 01:05.1 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 10 PCI: 00:02.0 PCI: 00:03.0 PCI: 00:04.0 PCI: 00:04.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c PCI: 00:04.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 ind ex 24 PCI: 00:04.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 PCI: 00:05.0 PCI: 00:06.0 PCI: 00:07.0 PCI: 00:08.0 PCI: 00:09.0 child on link 0 PCI: 03:00.0 PCI: 00:09.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c PCI: 00:09.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 ind ex 24 PCI: 00:09.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 PCI: 03:00.0 PCI: 03:00.0 resource base 0 size 800 align 11 gran 11 limit ffffffffffffffff flags 201 in dex 10 PCI: 03:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 18 PCI: 03:00.1 PCI: 03:00.1 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10 PCI: 03:00.1 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14 PCI: 03:00.1 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18 PCI: 03:00.1 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c PCI: 03:00.1 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20 PCI: 03:00.1 resource base 0 size 10000 align 16 gran 16 limit ffffffff flags 2200 index 3 0 PCI: 00:0a.0 child on link 0 PCI: 04:00.0 PCI: 00:0a.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c PCI: 00:0a.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 ind ex 24 PCI: 00:0a.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 PCI: 04:00.0 PCI: 04:00.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 i ndex 10 PCI: 00:11.0 PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10 PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14 PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18 PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c PCI: 00:11.0 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20 PCI: 00:11.0 resource base 0 size 400 align 10 gran 10 limit ffffffff flags 200 index 24 PCI: 00:12.0 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 PCI: 00:12.2 PCI: 00:12.2 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 10 PCI: 00:13.0 PCI: 00:13.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 PCI: 00:13.2 PCI: 00:13.2 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 10 PCI: 00:14.0 child on link 0 I2C: 00:50 I2C: 00:50 I2C: 00:51 I2C: 00:52 I2C: 00:53 PCI: 00:14.1 PCI: 00:14.1 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10 PCI: 00:14.1 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14 PCI: 00:14.1 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18 PCI: 00:14.1 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c PCI: 00:14.1 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20 PCI: 00:14.2 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 in dex 10 PCI: 00:14.3 child on link 0 PNP: 002e.0 PCI: 00:14.3 resource base 0 size 1 align 0 gran 0 limit ffffffff flags 200 index a0 PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 PCI: 00:14.3 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100 PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 PNP: 002e.0 PNP: 002e.0 resource base 3f0 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 PNP: 002e.0 resource base 6 size 0 align 0 gran 0 limit 0 flags c0000400 index 70 PNP: 002e.0 resource base 2 size 0 align 0 gran 0 limit 0 flags c0000800 index 74 PNP: 002e.1 PNP: 002e.1 resource base 378 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 PNP: 002e.1 resource base 7 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 PNP: 002e.2 PNP: 002e.2 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 PNP: 002e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 PNP: 002e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 PNP: 002e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 75 PNP: 002e.3 PNP: 002e.3 resource base 2f8 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 PNP: 002e.3 resource base 3 size 0 align 0 gran 0 limit 0 flags c0000400 index 70 PNP: 002e.5 PNP: 002e.5 resource base 60 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 PNP: 002e.5 resource base 64 size 8 align 3 gran 3 limit 7ff flags c0000100 index 62 PNP: 002e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 PNP: 002e.5 resource base c size 0 align 0 gran 0 limit 0 flags c0000400 index 72 PNP: 002e.6 PNP: 002e.6 resource base 100 size 0 align 0 gran 0 limit 0 flags c0000100 index 62 PNP: 002e.7 PNP: 002e.7 resource base 220 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 PNP: 002e.7 resource base 300 size 0 align 0 gran 0 limit 0 flags c0000100 index 62 PNP: 002e.7 resource base 9 size 0 align 0 gran 0 limit 0 flags c0000400 index 70 PNP: 002e.8 PNP: 002e.9 PNP: 002e.a PNP: 002e.b PNP: 002e.b resource base 290 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 PNP: 002e.b resource base 5 size 0 align 0 gran 0 limit 0 flags c0000400 index 70 PCI: 00:14.4 PCI: 00:14.5 PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 PCI: 00:14.6 PCI: 00:15.0 PCI: 00:15.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c PCI: 00:15.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 ind ex 24 PCI: 00:15.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 PCI: 00:15.1 child on link 0 PCI: 06:00.0 PCI: 00:15.1 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c PCI: 00:15.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 ind ex 24 PCI: 00:15.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 PCI: 06:00.0 PCI: 06:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10 PCI: 06:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 1201 index 18 PCI: 06:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 1201 index 20 PCI: 00:15.2 PCI: 00:15.2 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c PCI: 00:15.2 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 ind ex 24 PCI: 00:15.2 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 PCI: 00:15.3 PCI: 00:15.3 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c PCI: 00:15.3 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 ind ex 24 PCI: 00:15.3 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 PCI: 00:16.0 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 PCI: 00:16.2 PCI: 00:16.2 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 10 PCI: 00:18.0 PCI: 00:18.1 PCI: 00:18.2 PCI: 00:18.3 PCI: 00:18.3 resource base 0 size 4000000 align 26 gran 26 limit ffffffff flags 200 index 9 4 PCI: 00:18.4 PCI: 00:18.1 PCI: 00:18.2 PCI: 00:18.3 PCI: 00:18.3 resource base 0 size 4000000 align 26 gran 26 limit ffffffff flags 200 index 94 PCI: 00:18.4 PCI_DOMAIN: 0000 compute_resources_io: base: 0 size: 0 align: 0 gran: 0 limit: ffff PCI: 00:18.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff PCI: 00:01.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: 1ffffff PCI: 01:05.0 14 * [0x0 - 0xff] io PCI: 00:01.0 compute_resources_io: base: 100 size: 1000 align: 12 gran: 12 limit: ffff done PCI: 00:04.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff PCI: 00:04.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done PCI: 00:09.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff PCI: 03:00.0 18 * [0x0 - 0xff] io PCI: 03:00.1 20 * [0x400 - 0x40f] io PCI: 03:00.1 10 * [0x410 - 0x417] io PCI: 03:00.1 18 * [0x418 - 0x41f] io PCI: 03:00.1 14 * [0x420 - 0x423] io PCI: 03:00.1 1c * [0x424 - 0x427] io PCI: 00:09.0 compute_resources_io: base: 428 size: 1000 align: 12 gran: 12 limit: ffff done PCI: 00:0a.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff PCI: 00:0a.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done PCI: 00:15.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff PCI: 00:15.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done PCI: 00:15.1 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff PCI: 06:00.0 10 * [0x0 - 0xff] io PCI: 00:15.1 compute_resources_io: base: 100 size: 1000 align: 12 gran: 12 limit: ffff done PCI: 00:15.2 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff PCI: 00:15.2 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done PCI: 00:15.3 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff PCI: 00:15.3 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done PCI: 00:01.0 1c * [0x0 - 0xfff] io PCI: 00:09.0 1c * [0x1000 - 0x1fff] io PCI: 00:15.1 1c * [0x2000 - 0x2fff] io PCI: 00:11.0 20 * [0x3000 - 0x300f] io PCI: 00:14.1 20 * [0x3010 - 0x301f] io PCI: 00:11.0 10 * [0x3020 - 0x3027] io PCI: 00:11.0 18 * [0x3028 - 0x302f] io PCI: 00:14.1 10 * [0x3030 - 0x3037] io PCI: 00:14.1 18 * [0x3038 - 0x303f] io PCI: 00:11.0 14 * [0x3040 - 0x3043] io PCI: 00:11.0 1c * [0x3044 - 0x3047] io PCI: 00:14.1 14 * [0x3048 - 0x304b] io PCI: 00:14.1 1c * [0x304c - 0x304f] io PCI: 00:18.0 compute_resources_io: base: 3050 size: 4000 align: 12 gran: 12 limit: ffff done PCI: 00:18.0 10d8 * [0x0 - 0x3fff] io PCI_DOMAIN: 0000 compute_resources_io: base: 4000 size: 4000 align: 12 gran: 0 limit: ffff done PCI_DOMAIN: 0000 compute_resources_mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff PCI: 00:18.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffff PCI: 00:01.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffff PCI: 01:05.0 10 * [0x0 - 0xfffffff] prefmem PCI: 00:01.0 compute_resources_prefmem: base: 10000000 size: 10000000 align: 28 gran: 20 limit: ffffffff done PCI: 00:04.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: fffffffffffff fff PCI: 00:04.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: fffffffffffff fff done PCI: 00:09.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: fffffffffffff fff PCI: 00:09.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: fffffffffffff fff done PCI: 00:0a.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: fffffffffffff fff PCI: 00:0a.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: fffffffffffff fff done PCI: 00:15.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: fffffffffffff fff PCI: 00:15.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: fffffffffffff fff done PCI: 00:15.1 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: fffffffffffff fff PCI: 06:00.0 20 * [0x0 - 0x3fff] prefmem PCI: 06:00.0 18 * [0x4000 - 0x4fff] prefmem PCI: 00:15.1 compute_resources_prefmem: base: 5000 size: 100000 align: 20 gran: 20 limit: fffff fffffffffff done PCI: 00:15.2 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: fffffffffffff fff PCI: 00:15.2 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: fffffffffffff fff done PCI: 00:15.3 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: fffffffffffff fff PCI: 00:15.3 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: fffffffffffff fff done PCI: 00:01.0 24 * [0x0 - 0xfffffff] prefmem PCI: 00:15.1 24 * [0x10000000 - 0x100fffff] prefmem PCI: 00:18.0 compute_resources_prefmem: base: 10100000 size: 10100000 align: 28 gran: 20 limit: ffffffff done PCI: 00:18.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffff PCI: 00:01.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff PCI: 01:05.0 24 * [0x0 - 0xfffff] mem PCI: 01:05.0 18 * [0x100000 - 0x10ffff] mem PCI: 01:05.1 10 * [0x110000 - 0x113fff] mem PCI: 00:01.0 compute_resources_mem: base: 114000 size: 200000 align: 20 gran: 20 limit: fffffff f done PCI: 00:04.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff PCI: 00:04.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done PCI: 00:09.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff PCI: 03:00.1 30 * [0x0 - 0xffff] mem PCI: 03:00.0 10 * [0x10000 - 0x107ff] mem PCI: 00:09.0 compute_resources_mem: base: 10800 size: 100000 align: 20 gran: 20 limit: ffffffff done PCI: 00:0a.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff PCI: 04:00.0 10 * [0x0 - 0x7fff] mem PCI: 00:0a.0 compute_resources_mem: base: 8000 size: 100000 align: 20 gran: 20 limit: ffffffff done PCI: 00:15.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff PCI: 00:15.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done PCI: 00:15.1 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff PCI: 00:15.1 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done PCI: 00:15.2 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff PCI: 00:15.2 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done PCI: 00:15.3 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff PCI: 00:15.3 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done PCI: 00:18.3 94 * [0x0 - 0x3ffffff] mem PCI: 00:01.0 20 * [0x4000000 - 0x41fffff] mem PCI: 00:09.0 20 * [0x4200000 - 0x42fffff] mem PCI: 00:0a.0 20 * [0x4300000 - 0x43fffff] mem PCI: 00:14.2 10 * [0x4400000 - 0x4403fff] mem PCI: 00:12.0 10 * [0x4404000 - 0x4404fff] mem PCI: 00:13.0 10 * [0x4405000 - 0x4405fff] mem PCI: 00:14.5 10 * [0x4406000 - 0x4406fff] mem PCI: 00:16.0 10 * [0x4407000 - 0x4407fff] mem PCI: 00:11.0 24 * [0x4408000 - 0x44083ff] mem PCI: 00:12.2 10 * [0x4408400 - 0x44084ff] mem PCI: 00:13.2 10 * [0x4408500 - 0x44085ff] mem PCI: 00:16.2 10 * [0x4408600 - 0x44086ff] mem PCI: 00:14.3 a0 * [0x4408700 - 0x4408700] mem PCI: 00:18.0 compute_resources_mem: base: 4408701 size: 4500000 align: 26 gran: 20 limit: fffff fff done PCI: 00:18.0 10b8 * [0x0 - 0x100fffff] prefmem PCI: 00:18.0 10b0 * [0x14000000 - 0x184fffff] mem PCI: 00:18.3 94 * [0x1c000000 - 0x1fffffff] mem PCI_DOMAIN: 0000 compute_resources_mem: base: 20000000 size: 20000000 align: 28 gran: 0 limit: ffffffff done avoid_fixed_resources: PCI_DOMAIN: 0000 avoid_fixed_resources:@PCI_DOMAIN: 0000 10000000 limit 0000ffff avoid_fixed_resources:@PCI_DOMAIN: 0000 10000100 limit ffffffff constrain_resources: PCI_DOMAIN: 0000 constrain_resources: PCI: 00:18.0 constrain_resources: PCI: 00:00.0 constrain_resources: PCI: 00:01.0 constrain_resources: PCI: 01:05.0 constrain_resources: PCI: 01:05.1 constrain_resources: PCI: 00:04.0 constrain_resources: PCI: 00:09.0 constrain_resources: PCI: 03:00.0 constrain_resources: PCI: 03:00.1 constrain_resources: PCI: 00:0a.0 constrain_resources: PCI: 04:00.0 constrain_resources: PCI: 00:11.0 constrain_resources: PCI: 00:12.0 constrain_resources: PCI: 00:12.2 constrain_resources: PCI: 00:13.0 constrain_resources: PCI: 00:13.2 constrain_resources: PCI: 00:14.0 constrain_resources: I2C: 00:50 constrain_resources: I2C: 00:51 constrain_resources: I2C: 00:52 constrain_resources: I2C: 00:53 constrain_resources: PCI: 00:14.1 constrain_resources: PCI: 00:14.2 constrain_resources: PCI: 00:14.3 constrain_resources: PNP: 002e.2 constrain_resources: PNP: 002e.3 skipping PNP: 002e.3@60 fixed resource, size=0! skipping PNP: 002e.3@70 fixed resource, size=0! constrain_resources: PNP: 002e.5 skipping PNP: 002e.5@72 fixed resource, size=0! constrain_resources: PNP: 002e.b skipping PNP: 002e.b@60 fixed resource, size=0! skipping PNP: 002e.b@70 fixed resource, size=0! constrain_resources: PCI: 00:14.5 constrain_resources: PCI: 00:15.0 constrain_resources: PCI: 00:15.1 constrain_resources: PCI: 06:00.0 constrain_resources: PCI: 00:15.2 constrain_resources: PCI: 00:15.3 constrain_resources: PCI: 00:16.0 constrain_resources: PCI: 00:16.2 constrain_resources: PCI: 00:18.0 constrain_resources: PCI: 00:18.1 constrain_resources: PCI: 00:18.2 constrain_resources: PCI: 00:18.3 constrain_resources: PCI: 00:18.4 constrain_resources: PCI: 00:18.1 constrain_resources: PCI: 00:18.2 constrain_resources: PCI: 00:18.3 constrain_resources: PCI: 00:18.4 avoid_fixed_resources2: PCI_DOMAIN: 0000@10000000 limit 0000ffff lim->base 00001000 lim->limit 0000ffff avoid_fixed_resources2: PCI_DOMAIN: 0000@10000100 limit ffffffff lim->base 00000000 lim->limit dfffffff Setting resources... PCI_DOMAIN: 0000 allocate_resources_io: base:1000 size:4000 align:12 gran:0 limit:ffff Assigned: PCI: 00:18.0 10d8 * [0x1000 - 0x4fff] io PCI_DOMAIN: 0000 allocate_resources_io: next_base: 5000 size: 4000 align: 12 gran: 0 done PCI: 00:18.0 allocate_resources_io: base:1000 size:4000 align:12 gran:12 limit:ffff Assigned: PCI: 00:01.0 1c * [0x1000 - 0x1fff] io Assigned: PCI: 00:09.0 1c * [0x2000 - 0x2fff] io Assigned: PCI: 00:15.1 1c * [0x3000 - 0x3fff] io Assigned: PCI: 00:11.0 20 * [0x4000 - 0x400f] io Assigned: PCI: 00:14.1 20 * [0x4010 - 0x401f] io Assigned: PCI: 00:11.0 10 * [0x4020 - 0x4027] io Assigned: PCI: 00:11.0 18 * [0x4028 - 0x402f] io Assigned: PCI: 00:14.1 10 * [0x4030 - 0x4037] io Assigned: PCI: 00:14.1 18 * [0x4038 - 0x403f] io Assigned: PCI: 00:11.0 14 * [0x4040 - 0x4043] io Assigned: PCI: 00:11.0 1c * [0x4044 - 0x4047] io Assigned: PCI: 00:14.1 14 * [0x4048 - 0x404b] io Assigned: PCI: 00:14.1 1c * [0x404c - 0x404f] io PCI: 00:18.0 allocate_resources_io: next_base: 4050 size: 4000 align: 12 gran: 12 done PCI: 00:01.0 allocate_resources_io: base:1000 size:1000 align:12 gran:12 limit:ffff Assigned: PCI: 01:05.0 14 * [0x1000 - 0x10ff] io PCI: 00:01.0 allocate_resources_io: next_base: 1100 size: 1000 align: 12 gran: 12 done PCI: 00:04.0 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff PCI: 00:04.0 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done PCI: 00:09.0 allocate_resources_io: base:2000 size:1000 align:12 gran:12 limit:ffff Assigned: PCI: 03:00.0 18 * [0x2000 - 0x20ff] io Assigned: PCI: 03:00.1 20 * [0x2400 - 0x240f] io Assigned: PCI: 03:00.1 10 * [0x2410 - 0x2417] io Assigned: PCI: 03:00.1 18 * [0x2418 - 0x241f] io Assigned: PCI: 03:00.1 14 * [0x2420 - 0x2423] io Assigned: PCI: 03:00.1 1c * [0x2424 - 0x2427] io PCI: 00:09.0 allocate_resources_io: next_base: 2428 size: 1000 align: 12 gran: 12 done PCI: 00:0a.0 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff PCI: 00:0a.0 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done PCI: 00:15.0 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff PCI: 00:15.0 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done PCI: 00:15.1 allocate_resources_io: base:3000 size:1000 align:12 gran:12 limit:ffff Assigned: PCI: 06:00.0 10 * [0x3000 - 0x30ff] io PCI: 00:15.1 allocate_resources_io: next_base: 3100 size: 1000 align: 12 gran: 12 done PCI: 00:15.2 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff PCI: 00:15.2 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done PCI: 00:15.3 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff PCI: 00:15.3 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done PCI_DOMAIN: 0000 allocate_resources_mem: base:c0000000 size:20000000 align:28 gran:0 limit:dfff ffff Assigned: PCI: 00:18.0 10b8 * [0xc0000000 - 0xd00fffff] prefmem Assigned: PCI: 00:18.0 10b0 * [0xd4000000 - 0xd84fffff] mem Assigned: PCI: 00:18.3 94 * [0xdc000000 - 0xdfffffff] mem PCI_DOMAIN: 0000 allocate_resources_mem: next_base: e0000000 size: 20000000 align: 28 gran: 0 d one PCI: 00:18.0 allocate_resources_prefmem: base:c0000000 size:10100000 align:28 gran:20 limit:dff fffff Assigned: PCI: 00:01.0 24 * [0xc0000000 - 0xcfffffff] prefmem Assigned: PCI: 00:15.1 24 * [0xd0000000 - 0xd00fffff] prefmem PCI: 00:18.0 allocate_resources_prefmem: next_base: d0100000 size: 10100000 align: 28 gran: 20 done PCI: 00:01.0 allocate_resources_prefmem: base:c0000000 size:10000000 align:28 gran:20 limit:dff fffff Assigned: PCI: 01:05.0 10 * [0xc0000000 - 0xcfffffff] prefmem PCI: 00:01.0 allocate_resources_prefmem: next_base: d0000000 size: 10000000 align: 28 gran: 20 done PCI: 00:04.0 allocate_resources_prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff PCI: 00:04.0 allocate_resources_prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done PCI: 00:09.0 allocate_resources_prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff PCI: 00:09.0 allocate_resources_prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done PCI: 00:0a.0 allocate_resources_prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff PCI: 00:0a.0 allocate_resources_prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done PCI: 00:15.0 allocate_resources_prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff PCI: 00:15.0 allocate_resources_prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done PCI: 00:15.1 allocate_resources_prefmem: base:d0000000 size:100000 align:20 gran:20 limit:dffff fff Assigned: PCI: 06:00.0 20 * [0xd0000000 - 0xd0003fff] prefmem Assigned: PCI: 06:00.0 18 * [0xd0004000 - 0xd0004fff] prefmem PCI: 00:15.1 allocate_resources_prefmem: next_base: d0005000 size: 100000 align: 20 gran: 20 do ne PCI: 00:15.2 allocate_resources_prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff PCI: 00:15.2 allocate_resources_prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done PCI: 00:15.3 allocate_resources_prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff PCI: 00:15.3 allocate_resources_prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done PCI: 00:18.0 allocate_resources_mem: base:d4000000 size:4500000 align:26 gran:20 limit:dfffffff Assigned: PCI: 00:18.3 94 * [0xd4000000 - 0xd7ffffff] mem Assigned: PCI: 00:01.0 20 * [0xd8000000 - 0xd81fffff] mem Assigned: PCI: 00:09.0 20 * [0xd8200000 - 0xd82fffff] mem Assigned: PCI: 00:0a.0 20 * [0xd8300000 - 0xd83fffff] mem Assigned: PCI: 00:14.2 10 * [0xd8400000 - 0xd8403fff] mem Assigned: PCI: 00:12.0 10 * [0xd8404000 - 0xd8404fff] mem Assigned: PCI: 00:13.0 10 * [0xd8405000 - 0xd8405fff] mem Assigned: PCI: 00:14.5 10 * [0xd8406000 - 0xd8406fff] mem Assigned: PCI: 00:16.0 10 * [0xd8407000 - 0xd8407fff] mem Assigned: PCI: 00:11.0 24 * [0xd8408000 - 0xd84083ff] mem Assigned: PCI: 00:12.2 10 * [0xd8408400 - 0xd84084ff] mem Assigned: PCI: 00:13.2 10 * [0xd8408500 - 0xd84085ff] mem Assigned: PCI: 00:16.2 10 * [0xd8408600 - 0xd84086ff] mem Assigned: PCI: 00:14.3 a0 * [0xd8408700 - 0xd8408700] mem PCI: 00:18.0 allocate_resources_mem: next_base: d8408701 size: 4500000 align: 26 gran: 20 done PCI: 00:01.0 allocate_resources_mem: base:d8000000 size:200000 align:20 gran:20 limit:dfffffff Assigned: PCI: 01:05.0 24 * [0xd8000000 - 0xd80fffff] mem Assigned: PCI: 01:05.0 18 * [0xd8100000 - 0xd810ffff] mem Assigned: PCI: 01:05.1 10 * [0xd8110000 - 0xd8113fff] mem PCI: 00:01.0 allocate_resources_mem: next_base: d8114000 size: 200000 align: 20 gran: 20 done PCI: 00:04.0 allocate_resources_mem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff PCI: 00:04.0 allocate_resources_mem: next_base: dfffffff size: 0 align: 20 gran: 20 done PCI: 00:09.0 allocate_resources_mem: base:d8200000 size:100000 align:20 gran:20 limit:dfffffff Assigned: PCI: 03:00.1 30 * [0xd8200000 - 0xd820ffff] mem Assigned: PCI: 03:00.0 10 * [0xd8210000 - 0xd82107ff] mem PCI: 00:09.0 allocate_resources_mem: next_base: d8210800 size: 100000 align: 20 gran: 20 done PCI: 00:0a.0 allocate_resources_mem: base:d8300000 size:100000 align:20 gran:20 limit:dfffffff Assigned: PCI: 04:00.0 10 * [0xd8300000 - 0xd8307fff] mem PCI: 00:0a.0 allocate_resources_mem: next_base: d8308000 size: 100000 align: 20 gran: 20 done PCI: 00:15.0 allocate_resources_mem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff PCI: 00:15.0 allocate_resources_mem: next_base: dfffffff size: 0 align: 20 gran: 20 done PCI: 00:15.1 allocate_resources_mem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff PCI: 00:15.1 allocate_resources_mem: next_base: dfffffff size: 0 align: 20 gran: 20 done PCI: 00:15.2 allocate_resources_mem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff PCI: 00:15.2 allocate_resources_mem: next_base: dfffffff size: 0 align: 20 gran: 20 done PCI: 00:15.3 allocate_resources_mem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff PCI: 00:15.3 allocate_resources_mem: next_base: dfffffff size: 0 align: 20 gran: 20 done Root Device assign_resources, bus 0 link: 0 split: 64K table at =afff0000 0: mmio_basek=00300000, basek=00400000, limitk=00500000 Adding UMA memory area PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0 VGA: PCI: 00:18.0 (aka node 0) link 0 has VGA device PCI: 00:18.0 10d8 <- [0x0000001000 - 0x0000004fff] size 0x00004000 gran 0x0c io PCI: 00:18.0 10b8 <- [0x00c0000000 - 0x00d00fffff] size 0x10100000 gran 0x14 prefmem PCI: 00:18.0 10b0 <- [0x00d4000000 - 0x00d84fffff] size 0x04500000 gran 0x14 mem PCI: 00:18.0 assign_resources, bus 0 link: 0 PCI: 00:01.0 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 01 io PCI: 00:01.0 24 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x14 bus 01 prefmem PCI: 00:01.0 20 <- [0x00d8000000 - 0x00d81fffff] size 0x00200000 gran 0x14 bus 01 mem PCI: 00:01.0 assign_resources, bus 1 link: 0 PCI: 01:05.0 10 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem PCI: 01:05.0 14 <- [0x0000001000 - 0x00000010ff] size 0x00000100 gran 0x08 io PCI: 01:05.0 18 <- [0x00d8100000 - 0x00d810ffff] size 0x00010000 gran 0x10 mem PCI: 01:05.0 24 <- [0x00d8000000 - 0x00d80fffff] size 0x00100000 gran 0x14 mem PCI: 01:05.1 10 <- [0x00d8110000 - 0x00d8113fff] size 0x00004000 gran 0x0e mem PCI: 00:01.0 assign_resources, bus 1 link: 0 PCI: 00:04.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io PCI: 00:04.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 02 prefmem PCI: 00:04.0 20 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 02 mem PCI: 00:09.0 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 03 io PCI: 00:09.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 03 prefmem PCI: 00:09.0 20 <- [0x00d8200000 - 0x00d82fffff] size 0x00100000 gran 0x14 bus 03 mem PCI: 00:09.0 assign_resources, bus 3 link: 0 PCI: 03:00.0 10 <- [0x00d8210000 - 0x00d82107ff] size 0x00000800 gran 0x0b mem64 PCI: 03:00.0 18 <- [0x0000002000 - 0x00000020ff] size 0x00000100 gran 0x08 io PCI: 03:00.1 10 <- [0x0000002410 - 0x0000002417] size 0x00000008 gran 0x03 io PCI: 03:00.1 14 <- [0x0000002420 - 0x0000002423] size 0x00000004 gran 0x02 io PCI: 03:00.1 18 <- [0x0000002418 - 0x000000241f] size 0x00000008 gran 0x03 io PCI: 03:00.1 1c <- [0x0000002424 - 0x0000002427] size 0x00000004 gran 0x02 io PCI: 03:00.1 20 <- [0x0000002400 - 0x000000240f] size 0x00000010 gran 0x04 io PCI: 03:00.1 30 <- [0x00d8200000 - 0x00d820ffff] size 0x00010000 gran 0x10 romem PCI: 00:09.0 assign_resources, bus 3 link: 0 PCI: 00:0a.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 04 io PCI: 00:0a.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 04 prefmem PCI: 00:0a.0 20 <- [0x00d8300000 - 0x00d83fffff] size 0x00100000 gran 0x14 bus 04 mem PCI: 00:0a.0 assign_resources, bus 4 link: 0 PCI: 04:00.0 10 <- [0x00d8300000 - 0x00d8307fff] size 0x00008000 gran 0x0f mem64 PCI: 00:0a.0 assign_resources, bus 4 link: 0 PCI: 00:11.0 10 <- [0x0000004020 - 0x0000004027] size 0x00000008 gran 0x03 io PCI: 00:11.0 14 <- [0x0000004040 - 0x0000004043] size 0x00000004 gran 0x02 io PCI: 00:11.0 18 <- [0x0000004028 - 0x000000402f] size 0x00000008 gran 0x03 io PCI: 00:11.0 1c <- [0x0000004044 - 0x0000004047] size 0x00000004 gran 0x02 io PCI: 00:11.0 20 <- [0x0000004000 - 0x000000400f] size 0x00000010 gran 0x04 io PCI: 00:11.0 24 <- [0x00d8408000 - 0x00d84083ff] size 0x00000400 gran 0x0a mem PCI: 00:12.0 10 <- [0x00d8404000 - 0x00d8404fff] size 0x00001000 gran 0x0c mem PCI: 00:12.2 10 <- [0x00d8408400 - 0x00d84084ff] size 0x00000100 gran 0x08 mem PCI: 00:13.0 10 <- [0x00d8405000 - 0x00d8405fff] size 0x00001000 gran 0x0c mem PCI: 00:13.2 10 <- [0x00d8408500 - 0x00d84085ff] size 0x00000100 gran 0x08 mem PCI: 00:14.1 10 <- [0x0000004030 - 0x0000004037] size 0x00000008 gran 0x03 io PCI: 00:14.1 14 <- [0x0000004048 - 0x000000404b] size 0x00000004 gran 0x02 io PCI: 00:14.1 18 <- [0x0000004038 - 0x000000403f] size 0x00000008 gran 0x03 io PCI: 00:14.1 1c <- [0x000000404c - 0x000000404f] size 0x00000004 gran 0x02 io PCI: 00:14.1 20 <- [0x0000004010 - 0x000000401f] size 0x00000010 gran 0x04 io PCI: 00:14.2 10 <- [0x00d8400000 - 0x00d8403fff] size 0x00004000 gran 0x0e mem64 PCI: 00:14.3 a0 <- [0x00d8408700 - 0x00d8408700] size 0x00000001 gran 0x00 mem PCI: 00:14.3 assign_resources, bus 0 link: 0 PNP: 002e.2 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io PNP: 002e.2 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq ERROR: PNP: 002e.2 74 drq size: 0x0000000001 not assigned ERROR: PNP: 002e.2 75 drq size: 0x0000000001 not assigned PNP: 002e.3 missing set_resources PNP: 002e.5 60 <- [0x0000000060 - 0x0000000067] size 0x00000008 gran 0x03 io PNP: 002e.5 62 <- [0x0000000064 - 0x000000006b] size 0x00000008 gran 0x03 io PNP: 002e.5 70 <- [0x0000000001 - 0x0000000001] size 0x00000001 gran 0x00 irq PNP: 002e.5 72 <- [0x000000000c - 0x000000000b] size 0x00000000 gran 0x00 irq PNP: 002e.b missing set_resources PCI: 00:14.3 assign_resources, bus 0 link: 0 PCI: 00:14.5 10 <- [0x00d8406000 - 0x00d8406fff] size 0x00001000 gran 0x0c mem PCI: 00:15.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 05 io PCI: 00:15.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 05 prefmem PCI: 00:15.0 20 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 05 mem PCI: 00:15.1 1c <- [0x0000003000 - 0x0000003fff] size 0x00001000 gran 0x0c bus 06 io PCI: 00:15.1 24 <- [0x00d0000000 - 0x00d00fffff] size 0x00100000 gran 0x14 bus 06 prefmem PCI: 00:15.1 20 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 06 mem PCI: 00:15.1 assign_resources, bus 6 link: 0 PCI: 06:00.0 10 <- [0x0000003000 - 0x00000030ff] size 0x00000100 gran 0x08 io PCI: 06:00.0 18 <- [0x00d0004000 - 0x00d0004fff] size 0x00001000 gran 0x0c prefmem64 PCI: 06:00.0 20 <- [0x00d0000000 - 0x00d0003fff] size 0x00004000 gran 0x0e prefmem64 PCI: 00:15.1 assign_resources, bus 6 link: 0 PCI: 00:15.2 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 07 io PCI: 00:15.2 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 07 prefmem PCI: 00:15.2 20 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 07 mem PCI: 00:15.3 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 08 io PCI: 00:15.3 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 08 prefmem PCI: 00:15.3 20 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 08 mem PCI: 00:16.0 10 <- [0x00d8407000 - 0x00d8407fff] size 0x00001000 gran 0x0c mem PCI: 00:16.2 10 <- [0x00d8408600 - 0x00d84086ff] size 0x00000100 gran 0x08 mem PCI: 00:18.3 94 <- [0x00d4000000 - 0x00d7ffffff] size 0x04000000 gran 0x1a mem PCI: 00:18.3 94 <- [0x00d4000000 - 0x00d7ffffff] size 0x04000000 gran 0x1a mem PCI: 00:18.0 assign_resources, bus 0 link: 0 PCI: 00:18.3 94 <- [0x00dc000000 - 0x00dfffffff] size 0x04000000 gran 0x1a mem PCI: 00:18.3 94 <- [0x00dc000000 - 0x00dfffffff] size 0x04000000 gran 0x1a mem PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0 Root Device assign_resources, bus 0 link: 0 Done setting resources. Show resources in subtree (Root Device)...After assigning values. Root Device child on link 0 APIC_CLUSTER: 0 APIC_CLUSTER: 0 child on link 0 APIC: 00 APIC: 00 APIC: 01 APIC: 02 APIC: 03 APIC: 04 APIC: 05 PCI_DOMAIN: 0000 child on link 0 PCI: 00:18.0 PCI_DOMAIN: 0000 resource base 1000 size 4000 align 12 gran 0 limit ffff flags 40040100 index 10000000 PCI_DOMAIN: 0000 resource base c0000000 size 20000000 align 28 gran 0 limit dfffffff flags 40 040200 index 10000100 PCI_DOMAIN: 0000 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 i ndex c0010058 PCI_DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 10 PCI_DOMAIN: 0000 resource base c0000 size bff40000 align 0 gran 0 limit 0 flags e0004200 inde x 20 PCI_DOMAIN: 0000 resource base 100000000 size 30000000 align 0 gran 0 limit 0 flags e0004200 index 30 PCI_DOMAIN: 0000 resource base b0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 i ndex 7 PCI: 00:18.0 child on link 0 PCI: 00:00.0 PCI: 00:18.0 resource base 1000 size 4000 align 12 gran 12 limit ffff flags 60080100 index 1 0d8 PCI: 00:18.0 resource base c0000000 size 10100000 align 28 gran 20 limit dfffffff flags 6008 1200 index 10b8 PCI: 00:18.0 resource base d4000000 size 4500000 align 26 gran 20 limit dfffffff flags 60080 200 index 10b0 PCI: 00:00.0 PCI: 00:01.0 child on link 0 PCI: 01:05.0 PCI: 00:01.0 resource base 1000 size 1000 align 12 gran 12 limit ffff flags 60080102 index 1c PCI: 00:01.0 resource base c0000000 size 10000000 align 28 gran 20 limit dfffffff flags 600 81202 index 24 PCI: 00:01.0 resource base d8000000 size 200000 align 20 gran 20 limit dfffffff flags 60080 202 index 20 PCI: 01:05.0 PCI: 01:05.0 resource base c0000000 size 10000000 align 28 gran 28 limit dfffffff flags 60 001200 index 10 PCI: 01:05.0 resource base 1000 size 100 align 8 gran 8 limit ffff flags 60000100 index 14 PCI: 01:05.0 resource base d8100000 size 10000 align 16 gran 16 limit dfffffff flags 60000 200 index 18 PCI: 01:05.0 resource base d8000000 size 100000 align 20 gran 20 limit dfffffff flags 6000 0200 index 24 PCI: 01:05.1 PCI: 01:05.1 resource base d8110000 size 4000 align 14 gran 14 limit dfffffff flags 600002 00 index 10 PCI: 00:02.0 PCI: 00:03.0 PCI: 00:04.0 PCI: 00:04.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c PCI: 00:04.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 i ndex 24 PCI: 00:04.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60080202 i ndex 20 PCI: 00:05.0 PCI: 00:06.0 PCI: 00:07.0 PCI: 00:08.0 PCI: 00:09.0 child on link 0 PCI: 03:00.0 PCI: 00:09.0 resource base 2000 size 1000 align 12 gran 12 limit ffff flags 60080102 index 1c PCI: 00:09.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 i ndex 24 PCI: 00:09.0 resource base d8200000 size 100000 align 20 gran 20 limit dfffffff flags 60080 202 index 20 PCI: 03:00.0 PCI: 03:00.0 resource base d8210000 size 800 align 11 gran 11 limit dfffffff flags 6000020 1 index 10 PCI: 03:00.0 resource base 2000 size 100 align 8 gran 8 limit ffff flags 60000100 index 18 PCI: 03:00.1 PCI: 03:00.1 resource base 2410 size 8 align 3 gran 3 limit ffff flags 60000100 index 10 PCI: 03:00.1 resource base 2420 size 4 align 2 gran 2 limit ffff flags 60000100 index 14 PCI: 03:00.1 resource base 2418 size 8 align 3 gran 3 limit ffff flags 60000100 index 18 PCI: 03:00.1 resource base 2424 size 4 align 2 gran 2 limit ffff flags 60000100 index 1c PCI: 03:00.1 resource base 2400 size 10 align 4 gran 4 limit ffff flags 60000100 index 20 PCI: 03:00.1 resource base d8200000 size 10000 align 16 gran 16 limit dfffffff flags 60002 200 index 30 PCI: 00:0a.0 child on link 0 PCI: 04:00.0 PCI: 00:0a.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c PCI: 00:0a.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 i ndex 24 PCI: 00:0a.0 resource base d8300000 size 100000 align 20 gran 20 limit dfffffff flags 60080 202 index 20 PCI: 04:00.0 PCI: 04:00.0 resource base d8300000 size 8000 align 15 gran 15 limit dfffffff flags 600002 01 index 10 PCI: 00:11.0 PCI: 00:11.0 resource base 4020 size 8 align 3 gran 3 limit ffff flags 60000100 index 10 PCI: 00:11.0 resource base 4040 size 4 align 2 gran 2 limit ffff flags 60000100 index 14 PCI: 00:11.0 resource base 4028 size 8 align 3 gran 3 limit ffff flags 60000100 index 18 PCI: 00:11.0 resource base 4044 size 4 align 2 gran 2 limit ffff flags 60000100 index 1c PCI: 00:11.0 resource base 4000 size 10 align 4 gran 4 limit ffff flags 60000100 index 20 PCI: 00:11.0 resource base d8408000 size 400 align 10 gran 10 limit dfffffff flags 60000200 index 24 PCI: 00:12.0 PCI: 00:12.0 resource base d8404000 size 1000 align 12 gran 12 limit dfffffff flags 6000020 0 index 10 PCI: 00:12.2 PCI: 00:12.2 resource base d8408400 size 100 align 8 gran 8 limit dfffffff flags 60000200 i ndex 10 PCI: 00:13.0 PCI: 00:13.0 resource base d8405000 size 1000 align 12 gran 12 limit dfffffff flags 6000020 0 index 10 PCI: 00:13.2 PCI: 00:13.2 resource base d8408500 size 100 align 8 gran 8 limit dfffffff flags 60000200 i ndex 10 PCI: 00:14.0 child on link 0 I2C: 00:50 I2C: 00:50 I2C: 00:51 I2C: 00:52 I2C: 00:53 PCI: 00:14.1 PCI: 00:14.1 resource base 4030 size 8 align 3 gran 3 limit ffff flags 60000100 index 10 PCI: 00:14.1 resource base 4048 size 4 align 2 gran 2 limit ffff flags 60000100 index 14 PCI: 00:14.1 resource base 4038 size 8 align 3 gran 3 limit ffff flags 60000100 index 18 PCI: 00:14.1 resource base 404c size 4 align 2 gran 2 limit ffff flags 60000100 index 1c PCI: 00:14.1 resource base 4010 size 10 align 4 gran 4 limit ffff flags 60000100 index 20 PCI: 00:14.2 PCI: 00:14.2 resource base d8400000 size 4000 align 14 gran 14 limit dfffffff flags 6000020 1 index 10 PCI: 00:14.3 child on link 0 PNP: 002e.0 PCI: 00:14.3 resource base d8408700 size 1 align 0 gran 0 limit dfffffff flags 60000200 ind ex a0 PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 PCI: 00:14.3 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100 PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 PNP: 002e.0 PNP: 002e.0 resource base 3f0 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 PNP: 002e.0 resource base 6 size 0 align 0 gran 0 limit 0 flags c0000400 index 70 PNP: 002e.0 resource base 2 size 0 align 0 gran 0 limit 0 flags c0000800 index 74 PNP: 002e.1 PNP: 002e.1 resource base 378 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 PNP: 002e.1 resource base 7 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 PNP: 002e.2 PNP: 002e.2 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60 PNP: 002e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 PNP: 002e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 PNP: 002e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 75 PNP: 002e.3 PNP: 002e.3 resource base 2f8 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 PNP: 002e.3 resource base 3 size 0 align 0 gran 0 limit 0 flags c0000400 index 70 PNP: 002e.5 PNP: 002e.5 resource base 60 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60 PNP: 002e.5 resource base 64 size 8 align 3 gran 3 limit 7ff flags e0000100 index 62 PNP: 002e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 PNP: 002e.5 resource base c size 0 align 0 gran 0 limit 0 flags e0000400 index 72 PNP: 002e.6 PNP: 002e.6 resource base 100 size 0 align 0 gran 0 limit 0 flags c0000100 index 62 PNP: 002e.7 PNP: 002e.7 resource base 220 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 PNP: 002e.7 resource base 300 size 0 align 0 gran 0 limit 0 flags c0000100 index 62 PNP: 002e.7 resource base 9 size 0 align 0 gran 0 limit 0 flags c0000400 index 70 PNP: 002e.8 PNP: 002e.9 PNP: 002e.a PNP: 002e.b PNP: 002e.b resource base 290 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 PNP: 002e.b resource base 5 size 0 align 0 gran 0 limit 0 flags c0000400 index 70 PCI: 00:14.4 PCI: 00:14.5 PCI: 00:14.5 resource base d8406000 size 1000 align 12 gran 12 limit dfffffff flags 6000020 0 index 10 PCI: 00:14.6 PCI: 00:15.0 PCI: 00:15.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c PCI: 00:15.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 i ndex 24 PCI: 00:15.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60080202 i ndex 20 PCI: 00:15.1 child on link 0 PCI: 06:00.0 PCI: 00:15.1 resource base 3000 size 1000 align 12 gran 12 limit ffff flags 60080102 index 1c PCI: 00:15.1 resource base d0000000 size 100000 align 20 gran 20 limit dfffffff flags 60081 202 index 24 PCI: 00:15.1 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60080202 i ndex 20 PCI: 06:00.0 PCI: 06:00.0 resource base 3000 size 100 align 8 gran 8 limit ffff flags 60000100 index 10 PCI: 06:00.0 resource base d0004000 size 1000 align 12 gran 12 limit dfffffff flags 600012 01 index 18 PCI: 06:00.0 resource base d0000000 size 4000 align 14 gran 14 limit dfffffff flags 600012 01 index 20 PCI: 00:15.2 PCI: 00:15.2 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c PCI: 00:15.2 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 i ndex 24 PCI: 00:15.2 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60080202 i ndex 20 PCI: 00:15.3 PCI: 00:15.3 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c PCI: 00:15.3 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 i ndex 24 PCI: 00:15.3 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60080202 i ndex 20 PCI: 00:16.0 PCI: 00:16.0 resource base d8407000 size 1000 align 12 gran 12 limit dfffffff flags 6000020 0 index 10 PCI: 00:16.2 PCI: 00:16.2 resource base d8408600 size 100 align 8 gran 8 limit dfffffff flags 60000200 i ndex 10 PCI: 00:18.0 PCI: 00:18.1 PCI: 00:18.2 PCI: 00:18.3 PCI: 00:18.3 resource base d4000000 size 4000000 align 26 gran 26 limit dfffffff flags 6000 0200 index 94 PCI: 00:18.4 PCI: 00:18.1 PCI: 00:18.2 PCI: 00:18.3 PCI: 00:18.3 resource base dc000000 size 4000000 align 26 gran 26 limit dfffffff flags 60000 200 index 94 PCI: 00:18.4 Done allocating resources. Enabling resources... PCI: 00:18.0 cmd <- 00 PCI: 00:18.1 subsystem <- 1612/3060 PCI: 00:18.1 cmd <- 00 PCI: 00:18.2 subsystem <- 1612/3060 PCI: 00:18.2 cmd <- 00 PCI: 00:18.3 cmd <- 00 PCI: 00:18.4 subsystem <- 1612/3060 PCI: 00:18.4 cmd <- 00 PCI: 00:00.0 subsystem <- 1612/3060 PCI: 00:00.0 cmd <- 06 PCI: 00:01.0 bridge ctrl <- 000b PCI: 00:01.0 cmd <- 07 PCI: 00:04.0 bridge ctrl <- 0003 PCI: 00:04.0 cmd <- 00 PCI: 00:09.0 bridge ctrl <- 0003 PCI: 00:09.0 cmd <- 07 PCI: 00:0a.0 bridge ctrl <- 0003 PCI: 00:0a.0 cmd <- 06 PCI: 00:11.0 subsystem <- 1612/3060 PCI: 00:11.0 cmd <- 03 PCI: 00:12.0 cmd <- 02 PCI: 00:12.2 cmd <- 02 PCI: 00:13.0 cmd <- 02 PCI: 00:13.2 cmd <- 02 PCI: 00:14.0 subsystem <- 1612/3060 PCI: 00:14.0 cmd <- 403 PCI: 00:14.1 subsystem <- 1612/3060 PCI: 00:14.1 cmd <- 01 PCI: 00:14.2 cmd <- 02 PCI: 00:14.3 cmd <- 0f PCI: 00:14.5 cmd <- 02 PCI: 00:15.0 bridge ctrl <- 0003 PCI: 00:15.0 cmd <- 00 PCI: 00:15.1 bridge ctrl <- 0003 PCI: 00:15.1 cmd <- 07 PCI: 00:15.2 bridge ctrl <- 0003 PCI: 00:15.2 cmd <- 00 PCI: 00:15.3 bridge ctrl <- 0003 PCI: 00:15.3 cmd <- 00 PCI: 00:16.0 cmd <- 02 PCI: 00:16.2 cmd <- 02 PCI: 00:18.0 cmd <- 00 PCI: 00:18.1 cmd <- 00 PCI: 00:18.2 cmd <- 00 PCI: 00:18.3 cmd <- 00 PCI: 00:18.4 cmd <- 00 PCI: 01:05.0 cmd <- 03 PCI: 01:05.1 cmd <- 02 PCI: 03:00.0 cmd <- 03 PCI: 03:00.1 cmd <- 03 PCI: 04:00.0 cmd <- 02 PCI: 06:00.0 cmd <- 03 done. Initializing devices... Root Device init APIC_CLUSTER: 0 init start_eip=0x00000000, offset=0x00210000, code_size=0x0000005b Initializing CPU #0 CPU: vendor AMD device 100fa0 CPU: family 10, model 0a, stepping 00 nodeid = 00, coreid = 00 Enabling cache Setting fixed MTRRs(0-88) type: UC Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM DONE fixed MTRRs Warning: Can't set up MTRR hole for UMA due to pre-existing MTRR hole. Setting variable MTRR 0, base: 0MB, range: 4096MB, type WB ADDRESS_MASK_HIGH=0xffff Setting variable MTRR 1, base: 4096MB, range: 512MB, type WB Setting variable MTRR 1, base: 4608MB, range: 256MB, type WB Setting variable MTRR 1, base: 3072MB, range: 1024MB, type UC ADDRESS_MASK_HIGH=0xffff DONE variable MTRRs Clear out the extra MTRR's call enable_var_mtrr() Leave x86_setup_var_mtrrs MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled Setting up local apic... apic_id: 0x00 done. CPU model: AMD Processor model unknown siblings = 05, CPU #0 initialized Asserting INIT. Waiting for send to finish... +Deasserting INIT. Waiting for send to finish... +#startup loops: 1. Sending STARTUP #1 to 1. After apic_write. Startup point 1. Waiting for send to finish... +After Startup. Initializing CPU #1 CPU: vendor AMD device 100fa0 CPU: family 10, model 0a, stepping 00 nodeid = 00, coreid = 01 Enabling cache Setting fixed MTRRs(0-88) type: UC Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM DONE fixed MTRRs Warning: Can't set up MTRR hole for UMA due to pre-existing MTRR hole. Setting variable MTRR 0, base: 0MB, range: 4096MB, type WB ADDRESS_MASK_HIGH=0xffff Setting variable MTRR 1, base: 4096MB, range: 512MB, type WB Setting variable MTRR 1, base: 4608MB, range: 256MB, type WB Setting variable MTRR 1, base: 3072MB, range: 1024MB, type UC ADDRESS_MASK_HIGH=0xffff DONE variable MTRRs Clear out the extra MTRR's call enable_var_mtrr() Leave x86_setup_var_mtrrs MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled Setting up local apic... apic_id: 0x01 done. CPU model: AMD Processor model unknown siblings = 05, CPU #1 initialized Asserting INIT. Waiting for send to finish... +Deasserting INIT. Waiting for send to finish... +#startup loops: 1. Sending STARTUP #1 to 2. After apic_write. Startup point 1. Waiting for send to finish... +After Startup. Initializing CPU #2 CPU: vendor AMD device 100fa0 CPU: family 10, model 0a, stepping 00 nodeid = 00, coreid = 02 Enabling cache Setting fixed MTRRs(0-88) type: UC Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM DONE fixed MTRRs Warning: Can't set up MTRR hole for UMA due to pre-existing MTRR hole. Setting variable MTRR 0, base: 0MB, range: 4096MB, type WB ADDRESS_MASK_HIGH=0xffff Setting variable MTRR 1, base: 4096MB, range: 512MB, type WB Setting variable MTRR 1, base: 4608MB, range: 256MB, type WB Setting variable MTRR 1, base: 3072MB, range: 1024MB, type UC ADDRESS_MASK_HIGH=0xffff DONE variable MTRRs Clear out the extra MTRR's call enable_var_mtrr() Leave x86_setup_var_mtrrs MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled Setting up local apic... apic_id: 0x02 done. CPU model: AMD Processor model unknown siblings = 05, CPU #2 initialized Asserting INIT. Waiting for send to finish... +Deasserting INIT. Waiting for send to finish... +#startup loops: 1. Sending STARTUP #1 to 3. After apic_write. Startup point 1. Waiting for send to finish... +After Startup. Initializing CPU #3 CPU: vendor AMD device 100fa0 CPU: family 10, model 0a, stepping 00 nodeid = 00, coreid = 03 Enabling cache Setting fixed MTRRs(0-88) type: UC Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM DONE fixed MTRRs Warning: Can't set up MTRR hole for UMA due to pre-existing MTRR hole. Setting variable MTRR 0, base: 0MB, range: 4096MB, type WB ADDRESS_MASK_HIGH=0xffff Setting variable MTRR 1, base: 4096MB, range: 512MB, type WB Setting variable MTRR 1, base: 4608MB, range: 256MB, type WB Setting variable MTRR 1, base: 3072MB, range: 1024MB, type UC ADDRESS_MASK_HIGH=0xffff DONE variable MTRRs Clear out the extra MTRR's call enable_var_mtrr() Leave x86_setup_var_mtrrs MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled Setting up local apic... apic_id: 0x03 done. CPU model: AMD Processor model unknown siblings = 05, CPU #3 initialized Asserting INIT. Waiting for send to finish... +Deasserting INIT. Waiting for send to finish... +#startup loops: 1. Sending STARTUP #1 to 4. After apic_write. Startup point 1. Waiting for send to finish... +After Startup. Initializing CPU #4 CPU: vendor AMD device 100fa0 CPU: family 10, model 0a, stepping 00 nodeid = 00, coreid = 04 Enabling cache Setting fixed MTRRs(0-88) type: UC Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM DONE fixed MTRRs Warning: Can't set up MTRR hole for UMA due to pre-existing MTRR hole. Setting variable MTRR 0, base: 0MB, range: 4096MB, type WB ADDRESS_MASK_HIGH=0xffff Setting variable MTRR 1, base: 4096MB, range: 512MB, type WB Setting variable MTRR 1, base: 4608MB, range: 256MB, type WB Setting variable MTRR 1, base: 3072MB, range: 1024MB, type UC ADDRESS_MASK_HIGH=0xffff DONE variable MTRRs Clear out the extra MTRR's call enable_var_mtrr() Leave x86_setup_var_mtrrs MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled Setting up local apic... apic_id: 0x04 done. CPU model: AMD Processor model unknown siblings = 05, CPU #4 initialized Asserting INIT. Waiting for send to finish... +Deasserting INIT. Waiting for send to finish... +#startup loops: 1. Sending STARTUP #1 to 5. After apic_write. Startup point 1. Waiting for send to finish... +After Startup. Initializing CPU #5 Waiting for 1 CPUS to stop CPU: vendor AMD device 100fa0 CPU: family 10, model 0a, stepping 00 nodeid = 00, coreid = 05 Enabling cache Setting fixed MTRRs(0-88) type: UC Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM DONE fixed MTRRs Warning: Can't set up MTRR hole for UMA due to pre-existing MTRR hole. Setting variable MTRR 0, base: 0MB, range: 4096MB, type WB ADDRESS_MASK_HIGH=0xffff Setting variable MTRR 1, base: 4096MB, range: 512MB, type WB Setting variable MTRR 1, base: 4608MB, range: 256MB, type WB Setting variable MTRR 1, base: 3072MB, range: 1024MB, type UC ADDRESS_MASK_HIGH=0xffff DONE variable MTRRs Clear out the extra MTRR's call enable_var_mtrr() Leave x86_setup_var_mtrrs MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled Setting up local apic... apic_id: 0x05 done. CPU model: AMD Processor model unknown siblings = 05, CPU #5 initialized All AP CPUs stopped PCI: 00:18.0 init PCI: 00:18.1 init Searching for pci1022,1201.rom Check cmos_layout.bin Check fallback/romstage Check fallback/coreboot_ram Check fallback/payload Check config Check No file header found at fffffc00, searching for header No file header found at fffffc40, searching for header No file header found at fffffc80, searching for header No file header found at fffffcc0, searching for header No file header found at fffffd00, searching for header No file header found at fffffd40, searching for header No file header found at fffffd80, searching for header No file header found at fffffdc0, searching for header No file header found at fffffe00, searching for header No file header found at fffffe40, searching for header No file header found at fffffe80, searching for header No file header found at fffffec0, searching for header No file header found at ffffff00, searching for header No file header found at ffffff40, searching for header No file header found at ffffff80, searching for header No file header found at ffffffc0, searching for header Could not find file 'pci1022,1201.rom'. PCI: 00:18.2 init Searching for pci1022,1202.rom Check cmos_layout.bin Check fallback/romstage Check fallback/coreboot_ram Check fallback/payload Check config Check No file header found at fffffc00, searching for header No file header found at fffffc40, searching for header No file header found at fffffc80, searching for header No file header found at fffffcc0, searching for header No file header found at fffffd00, searching for header No file header found at fffffd40, searching for header No file header found at fffffd80, searching for header No file header found at fffffdc0, searching for header No file header found at fffffe00, searching for header No file header found at fffffe40, searching for header No file header found at fffffe80, searching for header No file header found at fffffec0, searching for header No file header found at ffffff00, searching for header No file header found at ffffff40, searching for header No file header found at ffffff80, searching for header No file header found at ffffffc0, searching for header Could not find file 'pci1022,1202.rom'. PCI: 00:18.3 init NB: Function 3 Misc Control.. done. PCI: 00:18.4 init Searching for pci1022,1204.rom Check cmos_layout.bin Check fallback/romstage Check fallback/coreboot_ram Check fallback/payload Check config Check No file header found at fffffc00, searching for header No file header found at fffffc40, searching for header No file header found at fffffc80, searching for header No file header found at fffffcc0, searching for header No file header found at fffffd00, searching for header No file header found at fffffd40, searching for header No file header found at fffffd80, searching for header No file header found at fffffdc0, searching for header No file header found at fffffe00, searching for header No file header found at fffffe40, searching for header No file header found at fffffe80, searching for header No file header found at fffffec0, searching for header No file header found at ffffff00, searching for header No file header found at ffffff40, searching for header No file header found at ffffff80, searching for header No file header found at ffffffc0, searching for header Could not find file 'pci1022,1204.rom'. PCI: 00:00.0 init Searching for pci1022,9601.rom Check cmos_layout.bin Check fallback/romstage Check fallback/coreboot_ram Check fallback/payload Check config Check No file header found at fffffc00, searching for header No file header found at fffffc40, searching for header No file header found at fffffc80, searching for header No file header found at fffffcc0, searching for header No file header found at fffffd00, searching for header No file header found at fffffd40, searching for header No file header found at fffffd80, searching for header No file header found at fffffdc0, searching for header No file header found at fffffe00, searching for header No file header found at fffffe40, searching for header No file header found at fffffe80, searching for header No file header found at fffffec0, searching for header No file header found at ffffff00, searching for header No file header found at ffffff40, searching for header No file header found at ffffff80, searching for header No file header found at ffffffc0, searching for header Could not find file 'pci1022,9601.rom'. PCI: 00:11.0 init Searching for pci1002,4390.rom Check cmos_layout.bin Check fallback/romstage Check fallback/coreboot_ram Check fallback/payload Check config Check No file header found at fffffc00, searching for header No file header found at fffffc40, searching for header No file header found at fffffc80, searching for header No file header found at fffffcc0, searching for header No file header found at fffffd00, searching for header No file header found at fffffd40, searching for header No file header found at fffffd80, searching for header No file header found at fffffdc0, searching for header No file header found at fffffe00, searching for header No file header found at fffffe40, searching for header No file header found at fffffe80, searching for header No file header found at fffffec0, searching for header No file header found at ffffff00, searching for header No file header found at ffffff40, searching for header No file header found at ffffff80, searching for header No file header found at ffffffc0, searching for header Could not find file 'pci1002,4390.rom'. PCI: 00:12.0 init PCI: 00:12.2 init PCI: 00:13.0 init PCI: 00:13.2 init PCI: 00:14.0 init Searching for pci1002,4385.rom Check cmos_layout.bin Check fallback/romstage Check fallback/coreboot_ram Check fallback/payload Check config Check No file header found at fffffc00, searching for header No file header found at fffffc40, searching for header No file header found at fffffc80, searching for header No file header found at fffffcc0, searching for header No file header found at fffffd00, searching for header No file header found at fffffd40, searching for header No file header found at fffffd80, searching for header No file header found at fffffdc0, searching for header No file header found at fffffe00, searching for header No file header found at fffffe40, searching for header No file header found at fffffe80, searching for header No file header found at fffffec0, searching for header No file header found at ffffff00, searching for header No file header found at ffffff40, searching for header No file header found at ffffff80, searching for header No file header found at ffffffc0, searching for header Could not find file 'pci1002,4385.rom'. PCI: 00:14.1 init Searching for pci1002,439c.rom Check cmos_layout.bin Check fallback/romstage Check fallback/coreboot_ram Check fallback/payload Check config Check No file header found at fffffc00, searching for header No file header found at fffffc40, searching for header No file header found at fffffc80, searching for header No file header found at fffffcc0, searching for header No file header found at fffffd00, searching for header No file header found at fffffd40, searching for header No file header found at fffffd80, searching for header No file header found at fffffdc0, searching for header No file header found at fffffe00, searching for header No file header found at fffffe40, searching for header No file header found at fffffe80, searching for header No file header found at fffffec0, searching for header No file header found at ffffff00, searching for header No file header found at ffffff40, searching for header No file header found at ffffff80, searching for header No file header found at ffffffc0, searching for header Could not find file 'pci1002,439c.rom'. PCI: 00:14.2 init PCI: 00:14.3 init PCI: 00:14.5 init PCI: 00:15.0 init PCI: 00:15.1 init PCI: 00:15.2 init PCI: 00:15.3 init PCI: 00:16.0 init PCI: 00:16.2 init PCI: 00:18.0 init PCI: 00:18.1 init Searching for pci1022,1201.rom Check cmos_layout.bin Check fallback/romstage Check fallback/coreboot_ram Check fallback/payload Check config Check No file header found at fffffc00, searching for header No file header found at fffffc40, searching for header No file header found at fffffc80, searching for header No file header found at fffffcc0, searching for header No file header found at fffffd00, searching for header No file header found at fffffd40, searching for header No file header found at fffffd80, searching for header No file header found at fffffdc0, searching for header No file header found at fffffe00, searching for header No file header found at fffffe40, searching for header No file header found at fffffe80, searching for header No file header found at fffffec0, searching for header No file header found at ffffff00, searching for header No file header found at ffffff40, searching for header No file header found at ffffff80, searching for header No file header found at ffffffc0, searching for header Could not find file 'pci1022,1201.rom'. PCI: 00:18.2 init Searching for pci1022,1202.rom Check cmos_layout.bin Check fallback/romstage Check fallback/coreboot_ram Check fallback/payload Check config Check No file header found at fffffc00, searching for header No file header found at fffffc40, searching for header No file header found at fffffc80, searching for header No file header found at fffffcc0, searching for header No file header found at fffffd00, searching for header No file header found at fffffd40, searching for header No file header found at fffffd80, searching for header No file header found at fffffdc0, searching for header No file header found at fffffe00, searching for header No file header found at fffffe40, searching for header No file header found at fffffe80, searching for header No file header found at fffffec0, searching for header No file header found at ffffff00, searching for header No file header found at ffffff40, searching for header No file header found at ffffff80, searching for header No file header found at ffffffc0, searching for header Could not find file 'pci1022,1202.rom'. PCI: 00:18.3 init NB: Function 3 Misc Control.. done. PCI: 00:18.4 init Searching for pci1022,1204.rom Check cmos_layout.bin Check fallback/romstage Check fallback/coreboot_ram Check fallback/payload Check config Check No file header found at fffffc00, searching for header No file header found at fffffc40, searching for header No file header found at fffffc80, searching for header No file header found at fffffcc0, searching for header No file header found at fffffd00, searching for header No file header found at fffffd40, searching for header No file header found at fffffd80, searching for header No file header found at fffffdc0, searching for header No file header found at fffffe00, searching for header No file header found at fffffe40, searching for header No file header found at fffffe80, searching for header No file header found at fffffec0, searching for header No file header found at ffffff00, searching for header No file header found at ffffff40, searching for header No file header found at ffffff80, searching for header No file header found at ffffffc0, searching for header Could not find file 'pci1022,1204.rom'. PCI: 01:05.0 init Searching for pci1002,9715.rom Check cmos_layout.bin Check fallback/romstage Check fallback/coreboot_ram Check fallback/payload Check config Check No file header found at fffffc00, searching for header No file header found at fffffc40, searching for header No file header found at fffffc80, searching for header No file header found at fffffcc0, searching for header No file header found at fffffd00, searching for header No file header found at fffffd40, searching for header No file header found at fffffd80, searching for header No file header found at fffffdc0, searching for header No file header found at fffffe00, searching for header No file header found at fffffe40, searching for header No file header found at fffffe80, searching for header No file header found at fffffec0, searching for header No file header found at ffffff00, searching for header No file header found at ffffff40, searching for header No file header found at ffffff80, searching for header No file header found at ffffffc0, searching for header Could not find file 'pci1002,9715.rom'. PCI: 01:05.1 init Searching for pci1002,970f.rom Check cmos_layout.bin Check fallback/romstage Check fallback/coreboot_ram Check fallback/payload Check config Check No file header found at fffffc00, searching for header No file header found at fffffc40, searching for header No file header found at fffffc80, searching for header No file header found at fffffcc0, searching for header No file header found at fffffd00, searching for header No file header found at fffffd40, searching for header No file header found at fffffd80, searching for header No file header found at fffffdc0, searching for header No file header found at fffffe00, searching for header No file header found at fffffe40, searching for header No file header found at fffffe80, searching for header No file header found at fffffec0, searching for header No file header found at ffffff00, searching for header No file header found at ffffff40, searching for header No file header found at ffffff80, searching for header No file header found at ffffffc0, searching for header Could not find file 'pci1002,970f.rom'. PCI: 03:00.0 init Searching for pci1106,3403.rom Check cmos_layout.bin Check fallback/romstage Check fallback/coreboot_ram Check fallback/payload Check config Check No file header found at fffffc00, searching for header No file header found at fffffc40, searching for header No file header found at fffffc80, searching for header No file header found at fffffcc0, searching for header No file header found at fffffd00, searching for header No file header found at fffffd40, searching for header No file header found at fffffd80, searching for header No file header found at fffffdc0, searching for header No file header found at fffffe00, searching for header No file header found at fffffe40, searching for header No file header found at fffffe80, searching for header No file header found at fffffec0, searching for header No file header found at ffffff00, searching for header No file header found at ffffff40, searching for header No file header found at ffffff80, searching for header No file header found at ffffffc0, searching for header Could not find file 'pci1106,3403.rom'. PCI: 03:00.1 init Searching for pci1106,0415.rom Check cmos_layout.bin Check fallback/romstage Check fallback/coreboot_ram Check fallback/payload Check config Check No file header found at fffffc00, searching for header No file header found at fffffc40, searching for header No file header found at fffffc80, searching for header No file header found at fffffcc0, searching for header No file header found at fffffd00, searching for header No file header found at fffffd40, searching for header No file header found at fffffd80, searching for header No file header found at fffffdc0, searching for header No file header found at fffffe00, searching for header No file header found at fffffe40, searching for header No file header found at fffffe80, searching for header No file header found at fffffec0, searching for header No file header found at ffffff00, searching for header No file header found at ffffff40, searching for header No file header found at ffffff80, searching for header No file header found at ffffffc0, searching for header Could not find file 'pci1106,0415.rom'. On card, ROM address for PCI: 03:00.1 = d8200000 PCI expansion ROM, signature 0x0000, INIT size 0x0000, data ptr 0x0000 Incorrect expansion ROM header signature 0000 PCI: 04:00.0 init Searching for pci1b21,1042.rom Check cmos_layout.bin Check fallback/romstage Check fallback/coreboot_ram Check fallback/payload Check config Check No file header found at fffffc00, searching for header No file header found at fffffc40, searching for header No file header found at fffffc80, searching for header No file header found at fffffcc0, searching for header No file header found at fffffd00, searching for header No file header found at fffffd40, searching for header No file header found at fffffd80, searching for header No file header found at fffffdc0, searching for header No file header found at fffffe00, searching for header No file header found at fffffe40, searching for header No file header found at fffffe80, searching for header No file header found at fffffec0, searching for header No file header found at ffffff00, searching for header No file header found at ffffff40, searching for header No file header found at ffffff80, searching for header No file header found at ffffffc0, searching for header Could not find file 'pci1b21,1042.rom'. PNP: 002e.2 init PNP: 002e.5 init Keyboard init... No PS/2 keyboard detected. PCI: 06:00.0 init Searching for pci10ec,8168.rom Check cmos_layout.bin Check fallback/romstage Check fallback/coreboot_ram Check fallback/payload Check config Check No file header found at fffffc00, searching for header No file header found at fffffc40, searching for header No file header found at fffffc80, searching for header No file header found at fffffcc0, searching for header No file header found at fffffd00, searching for header No file header found at fffffd40, searching for header No file header found at fffffd80, searching for header No file header found at fffffdc0, searching for header No file header found at fffffe00, searching for header No file header found at fffffe40, searching for header No file header found at fffffe80, searching for header No file header found at fffffec0, searching for header No file header found at ffffff00, searching for header No file header found at ffffff40, searching for header No file header found at ffffff80, searching for header No file header found at ffffffc0, searching for header Could not find file 'pci10ec,8168.rom'. Devices initialized Show all devs...After init. Root Device: enabled 1 APIC_CLUSTER: 0: enabled 1 APIC: 00: enabled 1 PCI_DOMAIN: 0000: enabled 1 PCI: 00:18.0: enabled 1 PCI: 00:00.0: enabled 1 PCI: 00:01.0: enabled 1 PCI: 00:02.0: enabled 0 PCI: 00:03.0: enabled 0 PCI: 00:04.0: enabled 1 PCI: 00:05.0: enabled 0 PCI: 00:06.0: enabled 0 PCI: 00:07.0: enabled 0 PCI: 00:08.0: enabled 0 PCI: 00:09.0: enabled 1 PCI: 00:0a.0: enabled 1 PCI: 00:11.0: enabled 1 PCI: 00:12.0: enabled 1 PCI: 00:12.2: enabled 1 PCI: 00:13.0: enabled 1 PCI: 00:13.2: enabled 1 PCI: 00:14.0: enabled 1 I2C: 00:50: enabled 1 I2C: 00:51: enabled 1 I2C: 00:52: enabled 1 I2C: 00:53: enabled 1 PCI: 00:14.1: enabled 1 PCI: 00:14.2: enabled 1 PCI: 00:14.3: enabled 1 PNP: 002e.0: enabled 0 PNP: 002e.1: enabled 0 PNP: 002e.2: enabled 1 PNP: 002e.3: enabled 1 PNP: 002e.5: enabled 1 PNP: 002e.6: enabled 0 PNP: 002e.7: enabled 0 PNP: 002e.8: enabled 0 PNP: 002e.9: enabled 0 PNP: 002e.a: enabled 0 PNP: 002e.b: enabled 1 PCI: 00:14.4: enabled 0 PCI: 00:14.5: enabled 1 PCI: 00:14.6: enabled 0 PCI: 00:15.0: enabled 1 PCI: 00:15.1: enabled 1 PCI: 00:15.2: enabled 1 PCI: 00:15.3: enabled 1 PCI: 00:16.0: enabled 1 PCI: 00:16.2: enabled 1 PCI: 00:18.1: enabled 1 PCI: 00:18.2: enabled 1 PCI: 00:18.3: enabled 1 PCI: 00:18.4: enabled 1 APIC: 01: enabled 1 APIC: 02: enabled 1 APIC: 03: enabled 1 APIC: 04: enabled 1 APIC: 05: enabled 1 PCI: 00:18.0: enabled 1 PCI: 00:18.1: enabled 1 PCI: 00:18.2: enabled 1 PCI: 00:18.3: enabled 1 PCI: 00:18.4: enabled 1 PCI: 01:05.0: enabled 1 PCI: 01:05.1: enabled 1 PCI: 03:00.0: enabled 1 PCI: 03:00.1: enabled 1 PCI: 04:00.0: enabled 1 PCI: 06:00.0: enabled 1 Initializing CBMEM area to 0xafff0000 (65536 bytes) Adding CBMEM entry as no. 1 Moving GDT to afff0200...ok High Tables Base is afff0000. Writing IRQ routing tables to 0xf0000...write_pirq_routing_table done. Adding CBMEM entry as no. 2 Writing IRQ routing tables to 0xafff0400...write_pirq_routing_table done. PIRQ table: 48 bytes. Wrote the mp table end at: 000f0410 - 000f0594 Adding CBMEM entry as no. 3 Wrote the mp table end at: afff1410 - afff1594 MP table: 404 bytes. Adding CBMEM entry as no. 4 ACPI: Writing ACPI tables at afff2400... ACPI: * HPET at afff24c8 ACPI: added table 1/32, length now 40 ACPI: * MADT at afff2500 ACPI: added table 2/32, length now 44 ACPI: * SRAT at afff2580 SRAT: lapic cpu_index=00, node_id=00, apic_id=00 SRAT: lapic cpu_index=01, node_id=00, apic_id=01 SRAT: lapic cpu_index=02, node_id=00, apic_id=02 SRAT: lapic cpu_index=03, node_id=00, apic_id=03 SRAT: lapic cpu_index=04, node_id=00, apic_id=04 SRAT: lapic cpu_index=05, node_id=00, apic_id=05 set_srat_mem: dev PCI_DOMAIN: 0000, res->index=0010 startk=00000000, sizek=00000280 set_srat_mem: dev PCI_DOMAIN: 0000, res->index=0020 startk=00000300, sizek=002ffd00 set_srat_mem: dev PCI_DOMAIN: 0000, res->index=0030 startk=00400000, sizek=000c0000 ACPI: added table 3/32, length now 48 ACPI: * SLIT at afff2688 ACPI: added table 4/32, length now 52 ACPI: * SSDT at afff26c0 ACPI: added table 5/32, length now 56 ACPI: * SSDT for PState at afff2cf5 ACPI: * DSDT at afff2cf8 ACPI: * DSDT @ afff2cf8 Length 288b ACPI: * FACS at afff5588 ACPI: * FADT at afff55c8 pm_base: 0x0800 ACPI: added table 6/32, length now 60 ACPI: done. ACPI tables: 12988 bytes. Adding CBMEM entry as no. 5 smbios_write_tables: afffd800 Root Device (ASUS M5A88PM Mainboard) APIC_CLUSTER: 0 (AMD FAM10 Root Complex) APIC: 00 (socket AM3) PCI_DOMAIN: 0000 (AMD FAM10 Root Complex) PCI: 00:18.0 (AMD FAM10 Northbridge) PCI: 00:00.0 (ATI RS780) PCI: 00:01.0 (ATI RS780) PCI: 00:02.0 (ATI RS780) PCI: 00:03.0 (ATI RS780) PCI: 00:04.0 (ATI RS780) PCI: 00:05.0 (ATI RS780) PCI: 00:06.0 (ATI RS780) PCI: 00:07.0 (ATI RS780) PCI: 00:08.0 (ATI RS780) PCI: 00:09.0 (ATI RS780) PCI: 00:0a.0 (ATI RS780) PCI: 00:11.0 (ATI SB800) PCI: 00:12.0 (ATI SB800) PCI: 00:12.2 (ATI SB800) PCI: 00:13.0 (ATI SB800) PCI: 00:13.2 (ATI SB800) PCI: 00:14.0 (ATI SB800) I2C: 00:50 () I2C: 00:51 () I2C: 00:52 () I2C: 00:53 () PCI: 00:14.1 (ATI SB800) PCI: 00:14.2 (ATI SB800) PCI: 00:14.3 (ATI SB800) PNP: 002e.0 (ITE IT8721F Super I/O) PNP: 002e.1 (ITE IT8721F Super I/O) PNP: 002e.2 (ITE IT8721F Super I/O) PNP: 002e.3 (ITE IT8721F Super I/O) PNP: 002e.5 (ITE IT8721F Super I/O) PNP: 002e.6 (ITE IT8721F Super I/O) PNP: 002e.7 (ITE IT8721F Super I/O) PNP: 002e.8 (ITE IT8721F Super I/O) PNP: 002e.9 (ITE IT8721F Super I/O) PNP: 002e.a (ITE IT8721F Super I/O) PNP: 002e.b (ITE IT8721F Super I/O) PCI: 00:14.4 (ATI SB800) PCI: 00:14.5 (ATI SB800) PCI: 00:14.6 (ATI SB800) PCI: 00:15.0 (ATI SB800) PCI: 00:15.1 (ATI SB800) PCI: 00:15.2 (ATI SB800) PCI: 00:15.3 (ATI SB800) PCI: 00:16.0 (ATI SB800) PCI: 00:16.2 (ATI SB800) PCI: 00:18.1 (AMD FAM10 Northbridge) PCI: 00:18.2 (AMD FAM10 Northbridge) PCI: 00:18.3 (AMD FAM10 Northbridge) PCI: 00:18.4 (AMD FAM10 Northbridge) APIC: 01 () APIC: 02 () APIC: 03 () APIC: 04 () APIC: 05 () PCI: 00:18.0 () PCI: 00:18.1 () PCI: 00:18.2 () PCI: 00:18.3 () PCI: 00:18.4 () PCI: 01:05.0 () PCI: 01:05.1 () PCI: 03:00.0 () PCI: 03:00.1 () PCI: 04:00.0 () PCI: 06:00.0 () SMBIOS tables: 272 bytes. Adding CBMEM entry as no. 6 Writing high table forward entry at 0x00000500 Wrote coreboot table at: 00000500 - 00000518 checksum 6fde New low_table_end: 0x00000518 Now going to write high coreboot table at 0xafffe000 rom_table_end = 0xafffe000 Adjust low_table_end from 0x00000518 to 0x00001000 Adjust rom_table_end from 0xafffe000 to 0xb0000000 Adding high table area uma_memory_start=0xb0000000, uma_memory_size=0x10000000 coreboot memory table: 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES 1. 0000000000001000-000000000009ffff: RAM 2. 00000000000c0000-00000000affeffff: RAM 3. 00000000afff0000-00000000afffffff: CONFIGURATION TABLES 4. 00000000b0000000-00000000bfffffff: RESERVED 5. 00000000e0000000-00000000efffffff: RESERVED 6. 0000000100000000-000000012fffffff: RAM Wrote coreboot table at: afffe000 - afffe204 checksum c7c2 coreboot table: 516 bytes. Multiboot Information structure has been written. 0. FREE SPACE b0000000 00000000 1. GDT afff0200 00000200 2. IRQ TABLE afff0400 00001000 3. SMP TABLE afff1400 00001000 4. ACPI afff2400 0000b400 5. SMBIOS afffd800 00000800 6. COREBOOT afffe000 00002000 Searching for fallback/payload Check cmos_layout.bin Check fallback/romstage Check fallback/coreboot_ram Check fallback/payload Got a payload Loading segment from rom address 0xffe2b5b8 data (compression=1) New segment dstaddr 0xe8670 memsize 0x17990 srcaddr 0xffe2b5f0 filesize 0xbecb (cleaned up) New segment addr 0xe8670 size 0x17990 offset 0xffe2b5f0 filesize 0xbecb Loading segment from rom address 0xffe2b5d4 Entry Point 0x000fc4e7 Loading Segment: addr: 0x00000000000e8670 memsz: 0x0000000000017990 filesz: 0x000000000000becb lb: [0x0000000000200000, 0x0000000000328000) Post relocation: addr: 0x00000000000e8670 memsz: 0x0000000000017990 filesz: 0x000000000000becb using LZMA [ 0x000e8670, 00100000, 0x00100000) <- ffe2b5f0 dest 000e8670, end 00100000, bouncebuffer afda0000 Loaded segments Jumping to boot code at fc4e7 entry = 0x000fc4e7 lb_start = 0x00200000 lb_size = 0x00128000 adjust = 0xafcc8000 buffer = 0xafda0000 elf_boot_notes = 0x0021fa20 adjusted_boot_notes = 0xafee7a20 Start bios (version pre-0.6.2-20110903_235549-linux-rvv5.cn.oracle.com) Found mainboard ASUS M5A88PM Found CBFS header at 0xfffffbee Ram Size=0xafff0000 (0x0000000030000000 high) Relocating init from 0x000e8be0 to 0xaffd6450 (size 39560) CPU Mhz=800 Found 6 cpu(s) max supported 6 cpu(s) Copying PIR from 0xafff0400 to 0x000fd790 Copying MPTABLE from 0xafff1400/afff1410 to 0x000fd5f0 Copying ACPI RSDP from 0xafff2400 to 0x000fd5d0 SMBIOS ptr=0x000fd5b0 table=0xaffefdf0 Scan for VGA option rom EHCI init on dev 00:12.2 (regs=0xd8408420) EHCI init on dev 00:13.2 (regs=0xd8408520) OHCI init on dev 00:14.5 (regs=0xd8406000) EHCI init on dev 00:16.2 (regs=0xd8408620) Found 0 lpt ports Found 2 serial ports ATA controller 0 at 4020/4040/0 (irq 0 dev 88) ATA controller 1 at 4028/4044/0 (irq 0 dev 88) ATA controller 2 at 1f0/3f4/0 (irq 14 dev a1) ATA controller 3 at 170/374/0 (irq 15 dev a1) ATA controller 4 at 2410/2420/0 (irq 0 dev 301) ATA controller 5 at 2418/2424/0 (irq 0 dev 301) ata1-0: ST3250620NS ATA-7 Hard-Disk (232 GiBytes) Searching bootorder for: /pci@i0cf8/*@11/drive@1/disk@0 Got ps2 nak (status=51) All threads complete. Scan for option roms Press F12 for boot menu. drive 0x000fd520: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=488397168 Returned 61440 bytes of ZoneHigh e820 map has 7 items: 0: 0000000000000000 - 000000000009fc00 = 1 1: 000000000009fc00 - 00000000000a0000 = 2 2: 00000000000f0000 - 0000000000100000 = 2 3: 0000000000100000 - 00000000affef000 = 1 4: 00000000affef000 - 00000000c0000000 = 2 5: 00000000e0000000 - 00000000f0000000 = 2 6: 0000000100000000 - 0000000130000000 = 1 enter handle_19: NULL Booting from Hard Disk... Booting from 0000:7c00 pnp call arg1=0