Hello Coreboot Developers!
First, I want to say that it is really a joy to work with Coreboot. The code is well-written and of high-quality. :)
I'm currently trying to get Tianocore EDK2 running as a Coreboot payload in Qemu and meeting with limited success, though. I have a working configuration for the qemu q35 target. Building it for and running it with the 440fx/piix4 chipset results in the crash below.
Is PIIX4 supported with Coreboot/EDK2 or should this configuration be avoided?
I also appreciate any pointers in how to debug a situation like this. It looks like the crash happens in EDK2. Is there a way to get an ELF file that objdump understands, so I can see where in EDK2 code this issue originates from?
BS: BS_PAYLOAD_LOAD run times (exec / console): 64 / 2 ms Jumping to boot code at 0x008008c0(0x7ff9b000) !!!! X64 Exception Type - 00(#DE - Divide Error) CPU Apic ID - 00000000 !!!! RIP - 000000007F92FAB0, CS - 0000000000000038, RFLAGS - 0000000000000202 RAX - 000000007F938C20, RCX - 000000007F938C20, RDX - 0000000000000008 RBX - 0000000000000008, RSP - 000000007FF4B278, RBP - 000000007FF666E0 RSI - 000000007FF65910, RDI - 0000000000000001 R8 - 000000007FF63480, R9 - 0000000000000038, R10 - 000000007F93CF08 R11 - 000000007FF64F08, R12 - 0000000000000000, R13 - 0000000000000080 R14 - 000000007FF66760, R15 - 000000007FAA9118 DS - 0000000000000030, ES - 0000000000000030, FS - 0000000000000030 GS - 0000000000000030, SS - 0000000000000030 CR0 - 0000000080010011, CR2 - 0000000000000000, CR3 - 000000007FC01000 CR4 - 0000000000000228, CR8 - 0000000000000000 DR0 - 0000000000000000, DR1 - 0000000000000000, DR2 - 0000000000000000 DR3 - 0000000000000000, DR6 - 00000000FFFF0FF0, DR7 - 0000000000000400 GDTR - 000000007FBED718 0000000000000047, LDTR - 0000000000000000 IDTR - 000000007F93A018 0000000000000FFF, TR - 0000000000000000 FXSAVE_STATE - 000000007FF4AED0 !!!! Can't find image information. !!!!
Thanks! Julian