I would also like to chime in here…
Just because it might appear that nobody is using a board solution doesn’t mean nobody is using it. We use several Intel reference board coreboot solutions since we generally have (or can get) the corresponding boards from Intel, but the community in general probably isn’t aware that we are using those solutions. We get projects all the time that are ultimately a port from an Intel reference board, so having the reference implementation in coreboot is key for that effort. So, although we aren’t *currently* using this particular reference board for anything, I would prefer to see that all of the Intel reference board implementations remain unless there’s a really good reason to remove them, since we could get a project where we would like to use the reference board implementation as a baseline at any time.
As for the issue you noted, I’ll see if I can get someone at Intel to look at it. I agree that it is problematic when what’s on the public FSP GitHub isn’t the latest version of the FSP and headers and such that people are actually using. This should defiantly be corrected.
- Jay
Jay Talbott
Principal Consulting Engineer
SysPro Consulting, LLC
3057 E. Muirfield St.
Gilbert, AZ 85298
(480) 704-8045
(480) 445-9895 (FAX)
JayTalbott@sysproconsulting.com
http://www.sysproconsulting.com
From: Matt DeVillier [mailto:matt.devillier@gmail.com]
Sent: Saturday, April 13, 2019 1:38 PM
To: Nico Huber
Cc: coreboot
Subject: [coreboot] Re: Removal of mainboard Intel/Strago
one thing we don't want to is change however is 'Intel_Strago' as the default mainboard family for google/cyan variants, since at least one Braswell platform kernel driver uses that identifier to enable certain quirks
On Sat, Apr 13, 2019 at 2:45 PM Lance Zhao <lance.zhao@gmail.com> wrote: