Of course. Intel is open to feedback.  Near-term perhaps some of the issues you’ve observed could be posted to https://github.com/IntelFsp/FSP/issues ?

 

Vincent

From: Zaolin [mailto:zaolin@das-labor.org]
Sent: Thursday, May 16, 2019 9:01 AM
To: Desimone, Nathaniel L <nathaniel.l.desimone@intel.com>; coreboot@coreboot.org
Subject: [coreboot] Re: Intel® FSP External Architecture Specification v2.1 Has Been Released

 

Hey Nate,

Would it be possible for us to influence future specifications as well.

The community experienced some issues with the overall FSP-S design and

we would like to discuss that with your team.

 

Best Regards,

Philipp

On 16.05.19 04:36, Desimone, Nathaniel L wrote:

Hi Everyone,

 

We are pleased to announce that the FSP External Architecture Specification v2.1 has been posted to https://www.intel.com/fsp!

 

Highlights

 

 

 

 

Roadmap

 

AmberLakeFspBinPkg has been released on https://github.com/IntelFsp/FSP, which provides the first implementation of FSP 2.1. This FSP is backward compatible with Kaby Lake, so there should be a good amount of existing hardware available for those who are interested in trying FSP 2.1. Looking forward, our upcoming Ice Lake and Comet Lake platforms will have FSP 2.1 binaries once they are released.

 

Does Anything Need to Change in coreboot?

 

For the most part no. There are some new header structure definitions to bring in. Optionally, coreboot can now report any data provided by FSP_ERROR_INFO_HOB and a generic graphics driver can now be written leveraging EFI_PEI_GRAPHICS_DEVICE_INFO_HOB.



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