On Thursday 26 October 2006 10:19, Jiangbo W wrote:
When using cache as ram how can i ensure that the data in cache can not be swapped out?
From an old i486 datasheet I got this. And it works on my i486. Maybe it also works on other x86 CPUs.
[...] ; Trash all the cache entries, then enable the cache ; invd mov eax, cr0 and eax, 0x9FFFFFFF mov cr0, eax ; ; Now the cache is enabled, and empty, and not mapped anywhere. Force ; it to map down to _sdata..._heap by reading this space ; MOV ESI,_sdata MOV ECX,_heap SUB ECX,ESI SHR ECX,2 ; we are reading DWORDs ADD ECX,2 ; paranoic cld rep LODSD ; ; Disable the cache. This keeps it from shuffling data in and out, ; so now it is just like an 16K static RAM at location _sdata. ; mov eax, cr0 or eax, 0x60000000 mov cr0, eax [...]