Changes by Richard Smith and me from the LinuxBIOS symposium 2006.

Without CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 1 million outb():s are used for timer calibration and that takes over one second.
EPIA boards have the x86 timer2 so let's use it and make boot faster.

src/mainboard/via/epia*/reset.c is dead code so HARD_RESET should be 0. (entire file within #if 0)

Signed-off-by: Peter Stuge <peter@stuge.se>

Index: src/mainboard/via/epia-m/Options.lb
===================================================================
--- src/mainboard/via/epia-m/Options.lb	(revision 2570)
+++ src/mainboard/via/epia-m/Options.lb	(working copy)
@@ -38,6 +38,7 @@
 uses MAXIMUM_CONSOLE_LOGLEVEL
 uses CONFIG_CONSOLE_SERIAL8250
 uses CONFIG_UDELAY_TSC
+uses CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
 uses CONFIG_PCI_ROM_RUN
 uses CONFIG_CONSOLE_VGA
 uses CONFIG_MAX_PCI_BUSES 
@@ -66,11 +67,12 @@
 ## Use TSC for udelay.
 ##
 default CONFIG_UDELAY_TSC=1
+default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2=1
 
 ##
 ## Build code to reset the motherboard from linuxBIOS
 ##
-default HAVE_HARD_RESET=1
+default HAVE_HARD_RESET=0
 
 ##
 ## Build code to export a programmable irq routing table
Index: src/mainboard/via/epia/Options.lb
===================================================================
--- src/mainboard/via/epia/Options.lb	(revision 2570)
+++ src/mainboard/via/epia/Options.lb	(working copy)
@@ -10,7 +10,8 @@
 uses USE_FALLBACK_IMAGE
 uses HAVE_FALLBACK_BOOT
 uses HAVE_HARD_RESET
-uses CONFIG_UDELAY_IO
+uses CONFIG_UDELAY_TSC
+uses CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
 uses HAVE_OPTION_TABLE
 uses USE_OPTION_TABLE
 uses CONFIG_ROM_PAYLOAD
@@ -81,12 +82,13 @@
 ##
 ## Build code to reset the motherboard from linuxBIOS
 ##
-default HAVE_HARD_RESET=1
+default HAVE_HARD_RESET=0
 
 ##
-## use io based udelay function
+## use TSC based udelay function
 ##
-default CONFIG_UDELAY_IO=1
+default CONFIG_UDELAY_TSC=1
+default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2=1
 
 ##
 ## Build code to export a programmable irq routing table