> Both CPUs have PAE support, yes, but I think I have never even tried to
> boot a 32-bit kernel on them :)
This is one missing info. Because, so far, if you did not know, there are two types of 32-bit kernels: normal 32 bit, and PAE 32 bit. But, in contrary, x86_64 has only one type of kernel support regarding MMU.
Why? Because for i686 the following is true: Memory Management Unit (MMU) differently are expected to emulate the three-level page tables. For example, on the x86 without PAE enabled, only two page table levels are available.
With non PAE 32 kernels, the PA space is limited to 32 bits, thus making ONLY 4GB to be used/available! With PAE, PA is extended to 64GB. VA is limited (in both cases) to 4GB.
> But that does only indicate support not use of PAE... I don't see how
> this would be relevant to memtest or the 64-bit kernels anyway.
For x86_64 (good that you are using ONLY these types of kernels) VA is 64 bits, but in reality it is limited to 48 bits (256TB).
> However, cpuid with an x86_64 kernel shows (assumably via the cpuid op and edx):
PA supported is 52 bits (1000TBs). So, it is actually limited by number of DIMM memory slots you have in your system (4 X 8GB DIMM slots). In general cases up to 256GB, maybe few TB (server configuration wise).
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> The current raminit for Nehalem in coreboot is not able to train the two
> 8 GB DIMMs I have tested so far. I have added a debug output to
> choose_reg178 in the first loop before the margins are compared to
> STANDARD_MIN_MARGIN that shows that all margins are 0.