ron minnich wrote:
If somebody could ack this I can close out the recent dbe62 problems.
Acked-by: Marc Jones firstname.lastname@example.org
---------- Forwarded message ---------- From: ron minnich email@example.com Date: Fri, Apr 18, 2008 at 10:09 PM Subject: Re: DBE62 v3 strangeness since v3 rev 649 To: Carl-Daniel Hailfinger firstname.lastname@example.org Cc: Coreboot email@example.com
On Tue, Apr 15, 2008 at 2:52 PM, Carl-Daniel Hailfinger
this one is for you: Your commit 649 had a few probably unintended side effects:
- set_delay_control thinks zero DIMMs are installed because
SPD_PRIMARY_SDRAM_WIDTH does not exist in the SPD table.
- Due to that, the GLCP_DELAY_CONTROLS msr is set to 0.
Please confirm that you really wanted these settings.
This mistake arose out of my attempt to clean up the namings of things in the original initram. It had names from two sources.
This patch cleans up that error, and is my attempt at cleaning up the null pointer issue in device/device.c, which I actually don't understand.
This patch allows me to almost boot a Plan 9 kernel from flash.