Dear Michał,
Do you have a config for us to look at for your board? Are you using INTEL_CAR_NEM_ENHANCED ?
Based on the post code you observed last, I might guess that you overfilled the cache when doing the cache fill
operation, e.g. the next few lines in cache_as_ram.S after post-code 0x26; doing so will cause a MCE.
Do you know how much data you're trying to place in the cache (CONFIG_DCACHE_RAM_SIZE) and also how much LLC your SKU has?
FYI, Tiger Lake has some new requirements for CAR setup when using eNEM mode, which
should be taken care of by the default soc/intel/tigerlake/Kconfig file. Do you have local changes to that?
You can also see mb/google/volteer for an example of a functional TGL coreboot board, feel free to ask me
any other questions you have.
Cheers,
- Tim