CARing for the Intel Jarrell

Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>

Index: src/mainboard/intel/jarrell/Kconfig
===================================================================
--- src/mainboard/intel/jarrell/Kconfig	(revision 6429)
+++ src/mainboard/intel/jarrell/Kconfig	(working copy)
@@ -1,3 +1,23 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2011  Alexandru Gagniuc <mr.nuke.me@gmail.com>
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License, or
+## (at your option) any later version.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+##
+
 if BOARD_INTEL_JARRELL
 
 config BOARD_SPECIFIC_OPTIONS # dummy
@@ -8,7 +28,6 @@
 	select SOUTHBRIDGE_INTEL_PXHD
 	select SOUTHBRIDGE_INTEL_I82801EX
 	select SUPERIO_NSC_PC87427
-	select ROMCC
 	select HAVE_HARD_RESET
 	select BOARD_HAS_HARD_RESET
 	select HAVE_OPTION_TABLE
Index: src/mainboard/intel/jarrell/watchdog.c
===================================================================
--- src/mainboard/intel/jarrell/watchdog.c	(revision 6429)
+++ src/mainboard/intel/jarrell/watchdog.c	(working copy)
@@ -1,4 +1,26 @@
+/*
+ * This file is part of the coreboot project.
+ * 
+ * Copyright (C) 2011  Alexandru Gagniuc <mr.nuke.me@gmail.com>
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ */
+
 #include <device/pnp_def.h>
+#include <fallback.h>
+#include <pc80/mc146818rtc.h>
 
 #define NSC_WD_DEV PNP_DEV(0x2e, 0xa)
 #define NSC_WDBASE 0x600
Index: src/mainboard/intel/jarrell/romstage.c
===================================================================
--- src/mainboard/intel/jarrell/romstage.c	(revision 6429)
+++ src/mainboard/intel/jarrell/romstage.c	(working copy)
@@ -1,3 +1,23 @@
+/*
+ * This file is part of the coreboot project.
+ * 
+ * Copyright (C) 2011  Alexandru Gagniuc <mr.nuke.me@gmail.com>
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ */
+
 #include <stdint.h>
 #include <device/pci_def.h>
 #include <arch/io.h>
@@ -9,13 +29,18 @@
 #include "southbridge/intel/i82801ex/early_smbus.c"
 #include "northbridge/intel/e7520/raminit.h"
 #include "superio/nsc/pc87427/pc87427.h"
-#include "cpu/x86/lapic/boot_cpu.c"
 #include "cpu/x86/mtrr/earlymtrr.c"
 #include "watchdog.c"
 #include "reset.c"
 #include "power_reset_check.c"
 #include "jarrell_fixups.c"
+/* Some functions in early_init.c were excluded as they broke the build for
+ * other CAR boards. We trick the compiler into including those by pretending
+ * to be ROMCC just for this file
+ */
+#define __ROMCC__
 #include "superio/nsc/pc87427/early_init.c"
+#undef __ROMCC__
 #include "northbridge/intel/e7520/memory_initialized.c"
 #include "cpu/x86/bist.h"
 #include <spd.h>
@@ -37,9 +62,8 @@
 #include "northbridge/intel/e7520/raminit.c"
 #include "lib/generic_sdram.c"
 #include "debug.c"
-#include "arch/x86/lib/stages.c"
 
-static void main(unsigned long bist)
+void main(unsigned long bist)
 {
 	static const struct mem_controller mch[] = {
 		{
@@ -51,9 +75,9 @@
 
 	if (bist == 0) {
 		/* Skip this if there was a built in self test failure */
-		early_mtrr_init();
+		/* Early MTRR is now handled in cache_as_ram.inc */
 		if (memory_initialized())
-			skip_romstage();
+			return;
 	}
 
 	/* Setup the console */
Index: src/mainboard/intel/jarrell/debug.c
===================================================================
--- src/mainboard/intel/jarrell/debug.c	(revision 6429)
+++ src/mainboard/intel/jarrell/debug.c	(working copy)
@@ -1,5 +1,26 @@
+/*
+ * This file is part of the coreboot project.
+ * 
+ * Copyright (C) 2011  Alexandru Gagniuc <mr.nuke.me@gmail.com>
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ */
+
 #include <spd.h>
 
+#ifdef DEFINED_BUT_NOT_USED
 static void print_reg(unsigned char index)
 {
         unsigned char data;
@@ -326,3 +347,4 @@
 		print_debug("\n");
 	}
 }
+#endif /* DEFINED_BUT_NOT_USED */
Index: src/mainboard/intel/jarrell/jarrell_fixups.c
===================================================================
--- src/mainboard/intel/jarrell/jarrell_fixups.c	(revision 6429)
+++ src/mainboard/intel/jarrell/jarrell_fixups.c	(working copy)
@@ -1,5 +1,26 @@
+/*
+ * This file is part of the coreboot project.
+ * 
+ * Copyright (C) 2011  Alexandru Gagniuc <mr.nuke.me@gmail.com>
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ */
+
 #include <arch/romcc_io.h>
 
+#ifdef DEFINED_BUT_NOT_USED
 static void mch_reset(void)
 {
         device_t dev;
@@ -29,7 +50,7 @@
         }
         return;
 }
-
+#endif /* DEFINED_BUT_NOT_USED */
 static void mainboard_set_e7520_pll(unsigned bits)
 {
 	uint16_t gpio_index;
@@ -71,8 +92,6 @@
 
 static void mainboard_set_e7520_leds(void)
 {
-	uint8_t cnt;
-	uint8_t data;
 	device_t dev;
 
 	/* currently only handle the Jarrell/PC87427 case */
Index: src/mainboard/intel/jarrell/power_reset_check.c
===================================================================
--- src/mainboard/intel/jarrell/power_reset_check.c	(revision 6429)
+++ src/mainboard/intel/jarrell/power_reset_check.c	(working copy)
@@ -1,4 +1,24 @@
+/*
+ * This file is part of the coreboot project.
+ * 
+ * Copyright (C) 2011  Alexandru Gagniuc <mr.nuke.me@gmail.com>
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ */
 
+#include <fallback.h>
 static void power_down_reset_check(void)
 {
 	uint8_t cmos;
