Hi,
how does FSP play its role in Haswell/Broadwell/Skylake?
Take the Broadwell as the example, which I ported coreboot successfully.
I use the mrc.bin and vboot.bin from Chromebook BIOS image.
I use the ME tool, fitc, to add the IFD to the BIOS image.
The final image works well and boots linux.
But where is FSP? Or which is FSP?
Zheng
--
coreboot mailing list: coreboot@coreboot.org
https://mail.coreboot.org/mailman/listinfo/coreboot