Hi,
As these features are processor/SoC specific and they are part of FSPM, they should be configurable
during fsp early init in coreboot, though you may not find a KConfig option to enable/disable
Do you have access to them in
fsp_early_init through fsp_upd_data?
Regards
Ranga
-----Original Message-----
From: ashmita.chakraborty@ltts.com <ashmita.chakraborty@ltts.com>
Sent: Tuesday 2 July 2019 07:34
To: coreboot@coreboot.org
Subject: [coreboot] Does Coreboot support the following options to enable/disable?
Does the coreboot support the following options to enable/disable:
HyperThreading - Disabled
Execute Disable Bit - Enabled
Intel Virtualization Tech- Enabled
Intel (R) TXT- Disabled
Enhanced Error Containment Mode -Disabled
MLC Streamer -Enabled
MLC Spatial Prefetcher -Enabled
DUC Data Prefetcher -Enabled
DUC Instruction Prefetcher -Enabled
LLC Prefetch - Enabled
Intel Configurable TDB -Enabled
TDP Level -level 2
Please let me know.
Thanks in advance.
Regards,
Ashmita Chakraborty
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