Mainboard model: Bayley Bay FSP-based CRB

1. The size of CBFS is: 0x200000. Is it a fix size or should I change it according to my board (which is also bay trail) ?

2. According to "dmidecode" I ran on my target, "Address: 0xE0000"

Should I set this address in coreboot configuration ? How ?

3. In this board default configuration, "Configure defaults for the Intel FSP package" is not selected. Is it possible that this board does not use Intel FSP at all ?

Under "Generic Drivers", "Use Intel firmware Support Package' is also not selected.

4. Under "chipset", there is no option to set "Super I/O". Can you please tell why ?

5. I noticed that the minimum ROM size is 2MB. If I set 4MB, the size of coreboot.rom is also 4MB.

Thank you in advance,

Zvika