[coreboot] Re: Question On External Display

[Rao G]

Hi Nico,

Thanks for your email & response.

The problem originally I had was that on PortC, DP/HDMI did not work for
the external display in the OS, In BIOS it looked good,
so I configured PortC as an eDP interface then the external display started
working in the OS.

Now at runtime when there is no external display, the VBIOS is causing
delay, so I want to disable PortC for eDP at runtime when there is no
external display connected.
So am trying to find which MMIO register gets set when there is external
Display connected to DisplayPort

Thanks
Rao

On Fri, Jul 30, 2021 at 3:29 PM Rao G  wrote:
> Hi Nico,
>
> Thanks for your response, though I enabled Bits 29,28,27 in 0x61110h, the
> values in 0x61114h returned 0,
> I have configured the port as eDP in VBIOS not as HDMI/DP, will that
> make a difference?
> For eDP which MMIO register need to be checked?
>
> Thanks
> Rao
>
> On Fri, Jul 30, 2021 at 2:47 PM Nico Huber  wrote:
> > Hello Rao,
> >
> > On 30.07.21 13:53, Rao G wrote:
> > > trying to see the MMIO or VBIOS data when a external display device is
> > > plugged/unplugged with DP/HDMI interface, which MMIO register is set or
> > > cleared
> >
> > I think you are looking at the right register (last one below).
> > > Any inputs are appreciated, some of the registers tried on Port B/Port C
> > > are given below. when Display is connected and when Display is not
> > > connected, both these instances
> > > return the same data. Looking for register/bit that sets/clears when
> > > external display is connected/disconnected
> > >
> > > printk(BIOS_DEBUG, "Intel Gfx BAR GTTMMADR\n");
> > > printk(BIOS_DEBUG, " DP_B %X\n", read32(bar+0x180000+0x64100));
> > > printk(BIOS_DEBUG, " DP_C %X\n", read32(bar+0x180000+0x64200));
> > > printk(BIOS_DEBUG, " HDMIC %X\n", read32(bar+0x180000+0x61160));
> > > printk(BIOS_DEBUG, " HDMIB %X\n", read32(bar+0x180000+0x61140));
> > > printk(BIOS_DEBUG, " Hotplug control %X\n",
> >
> > read32(bar+0x180000+0x61164));
> > > printk(BIOS_DEBUG, " pipeA control %X\n", read32(bar+0x180000+0x61204));
> > > printk(BIOS_DEBUG, " pipeB control %X\n", read32(bar+0x180000+0x61304));
> > > printk(BIOS_DEBUG, " porthot plug stat %X\n",
> >
> > read32(bar+0x180000+0x61114));
> >
> > According to the datasheet, the bits in this register should change but
> > only if enabled in PORT_HOTPLUG_EN (0x61110).
> >
> > Nico
> >
> > NB. There is also libgfxinit support under review [1]. In case you are
> > trying to do some native graphics init ;)
> >
> > [1] https://review.coreboot.org/q/topic:%2522baytrail-libgfxinit%2522