One thing we should keep in mind for the shadow ram thing: Just about every chipset I have seen has shadow ram registers that can correctly be set with the following info:
VendorID, DeviceID, Function, register, AndMask, OrMask.
... I haven't stumbled across a chipset yet for which this would not work.
Except for the MediaGX/Geode which has this in the GX_BASE memory region which is not a pci configuration register. :-(
Also the stpc, which uses I/O base/index registers, not pci config.