Good Afternoon,
I was wondering if anyone could tell me what a valid input would be for coreboot's menuconfig->"console->Offset into CMOS to store POST codes"? I have tried values in the (empty) null area (below with arrow <<---) [both 0x100000 and 0x200000], enabling the "General Setup->Use CMOS for configuration values", as well as enabling both of the following: "General Setup->Use CMOS for configuration values" and "General Setup->Load default configuration values into CMOS on each boot (NEW)" - none of the above allow a successful compile. Would someone mind helping/directing me to when I can figure out what cmos offset to enter?
Thank you
H
from the bottom of a successful make:
Performing
operation on
'COREBOOT'
region...
Name
Offset Type Size
cbfs
master header
0x0
cbfs
header
32
apu/amdfw
0x80
raw
256
fallback/romstage
0x1c0
stage
380660
fallback/ramstage
0x5d140
stage
87603
config
0x727c0
raw
200
revision
0x728c0
raw
576
cmos_layout.bin
0x72b40
cmos_layout
1392
pci1002,
9835
.rom
0x73100
optionrom
59904
fallback/dsdt.aml
0x81b80
raw
5741
fallback/payload
0x83240
payload
61148
payload_config
0x92180
raw
1563
payload_revision
0x92800
raw
237
(empty)
0x92940
null
3592600 <<----
bootblock
0x3ffb00
bootblock
912
HOSTCC
cbfstool/rmodtool.o
HOSTCC
cbfstool/rmodtool (link)
HOSTCC
cbfstool/ifwitool.o
HOSTCC
cbfstool/ifwitool (link)
Built
asrock/imb-a180 (IMB-A180)